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2024-01-13Merge tag 'devicetree-for-6.8' of ↵Linus Torvalds1-1/+1
git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux Pull devicetree updates from Rob Herring: - Convert FPGA bridge, all TPMs (finally), and Rockchip HDMI bindings to schemas - Improvements in Samsung GPU schemas - A few more cases of dropping unneeded quotes in schemas - Merge QCom idle-states txt binding into common idle-states schema - Add X1E80100, SM8650, SM8650, and SDX75 SoCs to QCom Power Domain Controller - Add NXP i.mx8dl to SCU PD - Add synaptics r63353 panel controller - Clarify the wording around the use of 'wakeup-source' property - Add a DTS coding style doc - Add smi vendor prefix - Fix DT_SCHEMA_FILES incorrect matching of paths outside the kernel tree - Disable sysfb (e.g. EFI FB) when simple-framebuffer node is present - Fix double free in of_parse_phandle_with_args_map() - A couple of kerneldoc fixes * tag 'devicetree-for-6.8' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux: (37 commits) of: unittest: Fix of_count_phandle_with_args() expected value message dt-bindings: fpga: altera: Convert bridge bindings to yaml dt-bindings: fpga: Convert bridge binding to yaml dt-bindings: vendor-prefixes: Add smi dt-bindings: power: Clarify wording for wakeup-source property of: Fix double free in of_parse_phandle_with_args_map dt-bindings: ignore paths outside kernel for DT_SCHEMA_FILES drivers: of: Fixed kernel doc warning dt-bindings: tpm: Document Microsoft fTPM bindings dt-bindings: tpm: Convert IBM vTPM bindings to DT schema dt-bindings: tpm: Convert Google Cr50 bindings to DT schema dt-bindings: tpm: Consolidate TCG TIS bindings dt-bindings: display: rockchip,inno-hdmi: Document RK3128 compatible dt-bindings: arm: Add remote etm dt-binding dt-bindings: mmc: sdhci-pxa: Fix 'regs' typo media: dt-bindings: samsung,s5p-mfc: Fix iommu properties schemas dt-bindings: display: panel: Add synaptics r63353 panel controller dt-bindings: arm: merge qcom,idle-state with idle-state dt-bindings: drm: rockchip: convert inno_hdmi-rockchip.txt to yaml dt-bindings: cache: qcom,llcc: correct QDU1000 reg entries ...
2023-12-22Merge tag 'riscv-cache-for-v6.8' of ↵Arnd Bergmann1-1/+5
https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux into soc/drivers RISC-V cache drivers for v6.8 The SiFive composable cache driver moves to the cache driver subdirectory from the drivers/soc and grows support for non-coherent cache operations. The immediate user for these is the jh7100 SoC, that a rake of people have on VisionFive v1 or Beagle-V Starlight boards. Signed-off-by: Conor Dooley <conor.dooley@microchip.com> * tag 'riscv-cache-for-v6.8' of https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux: riscv: errata: Make ERRATA_STARFIVE_JH7100 depend on !DMA_DIRECT_REMAP riscv: errata: Add StarFive JH7100 errata soc: sifive: ccache: Add StarFive JH7100 support dt-bindings: cache: sifive,ccache0: Add StarFive JH7100 compatible soc: sifive: shunt ccache driver to drivers/cache Link: https://lore.kernel.org/r/20231221-catatonic-monday-d4c61283b136@spud Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2023-12-08dt-bindings: cache: qcom,llcc: correct QDU1000 reg entriesKrzysztof Kozlowski1-1/+1
Qualcomm QDU1000 DTSI comes with one LLCC0 base address as pointed by dtbs_check: qdu1000-idp.dtb: system-cache-controller@19200000: reg-names:2: 'llcc2_base' was expected Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Acked-by: Conor Dooley <conor.dooley@microchip.com> Acked-by: Mukesh Ojha <quic_mojha@quicinc.com> Link: https://lore.kernel.org/r/20231107080436.16747-1-krzysztof.kozlowski@linaro.org Signed-off-by: Rob Herring <robh@kernel.org>
2023-12-07dt-bindings: cache: qcom,llcc: Add X1E80100 compatibleRajendra Nayak1-0/+2
Add the compatible for X1E80100 platforms. Signed-off-by: Rajendra Nayak <quic_rjendra@quicinc.com> Co-developed-by: Sibi Sankar <quic_sibis@quicinc.com> Signed-off-by: Sibi Sankar <quic_sibis@quicinc.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20231117095315.2087-2-quic_sibis@quicinc.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-12-07dt-bindings: cache: qcom,llcc: Document the SM8650 Last Level Cache ControllerNeil Armstrong1-0/+1
Document the Last Level Cache Controller on the SM8650 platform. Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> Link: https://lore.kernel.org/r/20231030-topic-sm8650-upstream-llcc-v2-1-f281cec608e2@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-11-22dt-bindings: cache: sifive,ccache0: Add StarFive JH7100 compatibleEmil Renner Berthing1-1/+5
This cache controller is also used on the StarFive JH7100 SoC. Unfortunately it needs a quirk to work properly, so add dedicated compatible string to be able to match it. Signed-off-by: Emil Renner Berthing <emil.renner.berthing@canonical.com> Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
2023-11-02Merge tag 'soc-drivers-6.7' of ↵Linus Torvalds1-0/+10
git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc Pull SoC driver updates from Arnd Bergmann: "The highlights for the driver support this time are - Qualcomm platforms gain support for the Qualcomm Secure Execution Environment firmware interface to access EFI variables on certain devices, and new features for multiple platform and firmware drivers. - Arm FF-A firmware support gains support for v1.1 specification features, in particular notification and memory transaction descriptor changes. - SCMI firmware support now support v3.2 features for clock and DVFS configuration and a new transport for Qualcomm platforms. - Minor cleanups and bugfixes are added to pretty much all the active platforms: qualcomm, broadcom, dove, ti-k3, rockchip, sifive, amlogic, atmel, tegra, aspeed, vexpress, mediatek, samsung and more. In particular, this contains portions of the treewide conversion to use __counted_by annotations and the device_get_match_data helper" * tag 'soc-drivers-6.7' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (156 commits) soc: qcom: pmic_glink_altmode: Print return value on error firmware: qcom: scm: remove unneeded 'extern' specifiers firmware: qcom: scm: add a missing forward declaration for struct device firmware: qcom: move Qualcomm code into its own directory soc: samsung: exynos-chipid: Convert to platform remove callback returning void soc: qcom: apr: Add __counted_by for struct apr_rx_buf and use struct_size() soc: qcom: pmic_glink: fix connector type to be DisplayPort soc: ti: k3-socinfo: Avoid overriding return value soc: ti: k3-socinfo: Fix typo in bitfield documentation soc: ti: knav_qmss_queue: Use device_get_match_data() firmware: ti_sci: Use device_get_match_data() firmware: qcom: qseecom: add missing include guards soc/pxa: ssp: Convert to platform remove callback returning void soc/mediatek: mtk-mmsys: Convert to platform remove callback returning void soc/mediatek: mtk-devapc: Convert to platform remove callback returning void soc/loongson: loongson2_guts: Convert to platform remove callback returning void soc/litex: litex_soc_ctrl: Convert to platform remove callback returning void soc/ixp4xx: ixp4xx-qmgr: Convert to platform remove callback returning void soc/ixp4xx: ixp4xx-npe: Convert to platform remove callback returning void soc/hisilicon: kunpeng_hccs: Convert to platform remove callback returning void ...
2023-10-04dt-bindings: cache: andestech,ax45mp-cache: Fix unit address in exampleGeert Uytterhoeven1-1/+1
The unit address in the example does not match the reg property. Correct the unit address to match reality. Fixes: 3e7bf4685e42786d ("dt-bindings: cache: andestech,ax45mp-cache: Add DT binding documentation for L2 cache controller") Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Link: https://lore.kernel.org/r/7b93655219a6ad696dd3faa9f36fde6b094694a9.1696330005.git.geert+renesas@glider.be Signed-off-by: Rob Herring <robh@kernel.org>
2023-09-20dt-bindings: cache: qcom,llcc: Add LLCC compatible for QDU1000/QRU1000Komal Bajaj1-0/+10
Add LLCC compatible for QDU1000/QRU1000 SoCs and add optional nvmem-cells and nvmem-cell-names properties to support multiple configurations for multi channel DDR. Signed-off-by: Komal Bajaj <quic_kbajaj@quicinc.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20230830105654.28057-2-quic_kbajaj@quicinc.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-09-01dt-bindings: cache: andestech,ax45mp-cache: Add DT binding documentation for ↵Lad Prabhakar1-0/+81
L2 cache controller Add DT binding documentation for L2 cache controller found on RZ/Five SoC. The Renesas RZ/Five microprocessor includes a RISC-V CPU Core (AX45MP Single) from Andes. The AX45MP core has an L2 cache controller, this patch describes the L2 cache block. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Rob Herring <robh@kernel.org> Reviewed-by: Conor Dooley <conor.dooley@microchip.com> Tested-by: Conor Dooley <conor.dooley@microchip.com> # tyre-kicking on a d1 Link: https://lore.kernel.org/r/20230818135723.80612-5-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
2023-05-25dt-bindings: cache: qcom,llcc: Fix SM8550 descriptionKonrad Dybcio1-0/+1
SM8550 (LLCCv4.1) has 4 register regions, this was not described between its addition and the restructurization that happened in the commit referenced in the fixes tag. Fix it. Fixes: 43aa006e074c ("dt-bindings: arm: msm: Fix register regions used for LLCC banks") Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Acked-by: Manivannan Sadhasivam <mani@kernel.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230517-topic-kailua-llcc-v1-1-d57bd860c43e@linaro.org
2023-04-27Merge tag 'devicetree-for-6.4-1' of ↵Linus Torvalds8-0/+832
git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux Pull devicetree updates from Rob Herring: "Bindings: - Convert Qcom IOMMU, Amlogic timer, Freescale sec-v4.0, Toshiba TC358764 display bridge, Parade PS8622 display bridge, and Xilinx FPGA bindings to DT schema format - Add qdu1000 and sa8775p SoC support to Qcom PDC interrupt controller - Add MediaTek MT8365 UART and SYSIRQ bindings - Add Arm Cortex-A78C and X1C core compatibles - Add vendor prefix for Novatek - Remove bindings for stih415, sti416, stid127 platforms - Drop uneeded quotes in schema files. This is preparation for yamllint checking quoting for us. - Add missing (unevaluated|additional)Properties constraints on child node schemas - Clean-up schema comments formatting - Fix I2C and SPI node bus names in schema examples - Clean-up some display compatibles schema syntax - Fix incorrect references to lvds.yaml - Gather all cache controller bindings in a common directory DT core: - Convert unittest to new void .remove platform device hook - kerneldoc fixes for DT address of_pci_range_to_resource/ of_address_to_resource functions" * tag 'devicetree-for-6.4-1' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux: (46 commits) dt-bindings: rng: Drop unneeded quotes dt-bindings: arm/soc: mediatek: Drop unneeded quotes dt-bindings: soc: qcom: Drop unneeded quotes dt-bindings: i2c: samsung: Fix 'deprecated' value dt-bindings: display: Fix lvds.yaml references dt-bindings: display: simplify compatibles syntax dt-bindings: display: mediatek: simplify compatibles syntax dt-bindings: drm/bridge: ti-sn65dsi86: Fix the video-interfaces.yaml references dt-bindings: timer: Drop unneeded quotes dt-bindings: interrupt-controller: qcom,pdc: document qcom,qdu1000-pdc dt-bindings: interrupt-controller: qcom-pdc: add compatible for sa8775p dt-bindings: reset: remove stih415/stih416 reset dt-bindings: net: dwmac: sti: remove stih415/sti416/stid127 dt-bindings: irqchip: sti: remove stih415/stih416 and stid127 dt-bindings: iommu: Convert QCOM IOMMU to YAML dt-bindings: irqchip: ti,sci-inta: Add optional power-domains property dt-bindings: Add missing (unevaluated|additional)Properties on child node schemas of: address: Reshuffle to remove forward declarations of: address: Fix documented return value of of_pci_range_to_resource() of: address: Document return value of of_address_to_resource() ...
2023-04-04dt-bindings: move cache controller bindings to a cache directoryConor Dooley8-0/+729
There's a bunch of bindings for (mostly l2) cache controllers scattered to the four winds, move them to a common directory. I renamed the freescale l2cache.txt file, as while that might make sense when the parent dir is fsl, it's confusing after the move. The two Marvell bindings have had a "marvell," prefix added to match their compatibles. Signed-off-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/20230330173255.109731-1-conor@kernel.org Signed-off-by: Rob Herring <robh@kernel.org>