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2024-05-14Merge tag 'v6.10-p1' of ↵Linus Torvalds6-30/+189
git://git.kernel.org/pub/scm/linux/kernel/git/herbert/crypto-2.6 Pull crypto updates from Herbert Xu: "API: - Remove crypto stats interface Algorithms: - Add faster AES-XTS on modern x86_64 CPUs - Forbid curves with order less than 224 bits in ecc (FIPS 186-5) - Add ECDSA NIST P521 Drivers: - Expose otp zone in atmel - Add dh fallback for primes > 4K in qat - Add interface for live migration in qat - Use dma for aes requests in starfive - Add full DMA support for stm32mpx in stm32 - Add Tegra Security Engine driver Others: - Introduce scope-based x509_certificate allocation" * tag 'v6.10-p1' of git://git.kernel.org/pub/scm/linux/kernel/git/herbert/crypto-2.6: (123 commits) crypto: atmel-sha204a - provide the otp content crypto: atmel-sha204a - add reading from otp zone crypto: atmel-i2c - rename read function crypto: atmel-i2c - add missing arg description crypto: iaa - Use kmemdup() instead of kzalloc() and memcpy() crypto: sahara - use 'time_left' variable with wait_for_completion_timeout() crypto: api - use 'time_left' variable with wait_for_completion_killable_timeout() crypto: caam - i.MX8ULP donot have CAAM page0 access crypto: caam - init-clk based on caam-page0-access crypto: starfive - Use fallback for unaligned dma access crypto: starfive - Do not free stack buffer crypto: starfive - Skip unneeded fallback allocation crypto: starfive - Skip dma setup for zeroed message crypto: hisilicon/sec2 - fix for register offset crypto: hisilicon/debugfs - mask the unnecessary info from the dump crypto: qat - specify firmware files for 402xx crypto: x86/aes-gcm - simplify GCM hash subkey derivation crypto: x86/aes-gcm - delete unused GCM assembly code crypto: x86/aes-xts - simplify loop in xts_crypt_slowpath() hwrng: stm32 - repair clock handling ...
2024-04-26dt-bindings: crypto: starfive: Restore sort orderGeert Uytterhoeven1-1/+1
Restore alphabetical sort order of the list of supported compatible values. Fixes: 2ccf7a5d9c50f3ea ("dt-bindings: crypto: starfive: Add jh8100 support") Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2024-04-12dt-bindings: crypto: Add Tegra Security EngineAkhil R2-0/+104
Add DT binding document for Tegra Security Engine. The AES and HASH algorithms are handled independently by separate engines within the Security Engine. These engines are registered as two separate crypto engine drivers. Signed-off-by: Akhil R <akhilrajeev@nvidia.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2024-04-05dt-bindings: treewide: add access-controllers descriptionGatien Chevallier2-0/+8
access-controllers is an optional property that allows a peripheral to refer to one or more domain access controller(s). Description of this property is added to all peripheral binding files of the peripheral under the STM32 firewall controller. It allows an accurate representation of the hardware, where various peripherals are connected to a firewall bus. The firewall can then check the peripheral accesses before allowing its device to probe. Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2024-04-05dt-bindings: crypto: ti,omap-sham: Convert to dtschemaAnimesh Agarwal2-28/+56
Convert the OMAP SoC SHA crypto Module bindings to DT Schema. Signed-off-by: Animesh Agarwal <animeshagarwal28@gmail.com> Reviewed-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2024-04-02dt-bindings: crypto: ice: Document sc7280 inline crypto engineLuca Weiss1-0/+1
Document the compatible used for the inline crypto engine found on SC7280. Signed-off-by: Luca Weiss <luca.weiss@fairphone.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2024-04-02dt-bindings: crypto: starfive: Add jh8100 supportJia Jie Ho1-2/+28
Add compatible string and additional interrupt for StarFive JH8100 crypto engine. Signed-off-by: Jia Jie Ho <jiajie.ho@starfivetech.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2024-03-01dt-bindings: crypto: add sam9x7 in Atmel TDESVarshini Rajendran1-1/+5
Add DT bindings for atmel TDES. Signed-off-by: Varshini Rajendran <varshini.rajendran@microchip.com> Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Reviewed-by: Tudor Ambarus <tudor.ambarus@linaro.org> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2024-03-01dt-bindings: crypto: add sam9x7 in Atmel SHAVarshini Rajendran1-1/+5
Add DT bindings for atmel SHA. Signed-off-by: Varshini Rajendran <varshini.rajendran@microchip.com> Acked-by: Rob Herring <robh@kernel.org> Reviewed-by: Tudor Ambarus <tudor.ambarus@linaro.org> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2024-03-01dt-bindings: crypto: add sam9x7 in Atmel AESVarshini Rajendran1-1/+5
Add DT bindings for atmel AES. Signed-off-by: Varshini Rajendran <varshini.rajendran@microchip.com> Acked-by: Rob Herring <robh@kernel.org> Reviewed-by: Tudor Ambarus <tudor.ambarus@linaro.org> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2024-01-26dt-bindings: crypto: ice: Document SC7180 inline crypto engineDavid Wronek1-0/+1
Document the compatible used for the inline crypto engine found on SC7180. Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: David Wronek <davidwronek@gmail.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2024-01-26dt-bindings: qcom-qce: Add compatible for SM6350Luca Weiss1-0/+1
Add a compatible for the crypto block found on the SM6350 SoC. Signed-off-by: Luca Weiss <luca.weiss@fairphone.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2023-12-22dt-bindings: crypto: qcom-qce: document the SC7280 crypto engineOm Prakash Singh1-0/+1
Document the crypto engine on the SM7280 Platform. Signed-off-by: Om Prakash Singh <quic_omprsing@quicinc.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2023-12-22dt-bindings: crypto: qcom-qce: constrain clocks for SM8150-compatible QCEKrzysztof Kozlowski1-0/+11
All devices compatible with SM8150 QCE (so SM8250 and newer) do not have clock inputs (clocks are handled by secure firmware), so explicitly disallow the clocks in the bindings. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2023-12-22dt-bindings: crypto: qcom-qce: constrain clocks for IPQ9574 QCEKrzysztof Kozlowski1-0/+1
Binding marks several devices as compatible with IPQ4019 QCE. They have different number of clocks, thus the fallback does not define the clock constraints per variant and each specific compatible should have its clocks in if:then: section. Add missing clocks description for IPQ9574 QCE. Fixes: 1f5ce01d5d71 ("dt-bindings: crypto: qcom-qce: add SoC compatible string for ipq9574") Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2023-11-24dt-bindings: crypto: convert Inside Secure SafeXcel to the json-schemaRafał Miłecki2-40/+86
This helps validating DTS files. Cc: Antoine Tenart <atenart@kernel.org> Signed-off-by: Rafał Miłecki <rafal@milecki.pl> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2023-11-17dt-bindings: crypto: qcom,prng: document SM8650Neil Armstrong1-0/+1
Document SM8650 compatible for the True Random Number Generator. Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2023-11-17dt-bindings: crypto: qcom-qce: document the SM8650 crypto engineNeil Armstrong1-0/+1
Document the crypto engine on the SM8650 Platform. Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2023-11-17dt-bindings: crypto: qcom,inline-crypto-engine: document the SM8650 ICENeil Armstrong1-0/+1
Document the Inline Crypto Engine (ICE) on the SM8650 Platform. Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2023-10-27dt-bindings: crypto: qcom,prng: document SA8775P and SC7280Om Prakash Singh1-0/+2
Document SA8775P and SC7280 compatible for the True Random Number Generator. Signed-off-by: Om Prakash Singh <quic_omprsing@quicinc.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Bjorn Andersson <andersson@kernel.org> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2023-10-13dt-bindings: crypto: qcom,prng: document SM8550Neil Armstrong1-0/+1
Document SM8550 compatible for the True Random Number Generator. Reviewed-by: Om Prakash Singh <quic_omprsing@quicinc.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2023-10-13dt-bindings: crypto: qcom,prng: document that RNG on SM8450 is a TRNGNeil Armstrong1-5/+20
It has been reported at [1] the RNG HW on SM8450 is in fact a True Random Number Generator and no more Pseudo, document this by adding a new qcom,trng and the corresponding SoC specific sm8450 compatible. [1] https://lore.kernel.org/all/20230818161720.3644424-1-quic_omprsing@quicinc.com/ Suggested-by: Om Prakash Singh <quic_omprsing@quicinc.com> Suggested-by: Konrad Dybcio <konrad.dybcio@linaro.org> Reviewed-by: Om Prakash Singh <quic_omprsing@quicinc.com> Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2023-10-05dt-bindings: crypto: fsl-imx-sahara: Fix the number of irqsFabio Estevam1-1/+21
i.MX27 has only one Sahara interrupt. i.MX53 has two. Describe this difference. Signed-off-by: Fabio Estevam <festevam@denx.de> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2023-10-05dt-bindings: crypto: fsl-imx-sahara: Document the clocksFabio Estevam1-0/+17
Describe the clocks (ipg and ahb) needed by Sahara block to operate. Signed-off-by: Fabio Estevam <festevam@denx.de> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2023-10-05dt-bindings: crypto: fsl-imx-sahara: Shorten the titleFabio Estevam1-2/+2
In the title, there is no need to mention "included in some i.MX chips" as it is too vague. Remove it to make it simpler. While at it, also remove the extra space in the first reg entry. Signed-off-by: Fabio Estevam <festevam@denx.de> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2023-10-01dt-bindings: crypto: ice: document the sa8775p inline crypto engineBartosz Golaszewski1-0/+1
Add the compatible string for QCom ICE on sa8775p SoCs. Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2023-08-31Merge tag 'devicetree-for-6.6' of ↵Linus Torvalds3-1/+3
git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux Pull devicetree updates from Rob Herring: "DT core: - Add support for generating DT nodes for PCI devices. This is the groundwork for applying overlays to PCI devices containing non-discoverable downstream devices. - DT unittest additions to check reverted changesets, to test for refcount issues, and to test unresolved symbols. Also, various clean-ups of the unittest along the way. - Refactor node and property manipulation functions to better share code with old API and changeset API - Refactor changeset print functions to a common implementation - Move some platform_device specific functions into of_platform.c Bindings: - Treewide fixing of typos - Treewide clean-up of SPDX tags to use 'OR' consistently - Last chunk of dropping unnecessary quotes. With that, the check for unnecessary quotes is enabled in yamllint. - Convert ftgmac100, zynqmp-genpd, pps-gpio, syna,rmi4, and qcom,ssbi bindings to DT schema format - Add Allwinner V3s xHCI USB, Saef SF-TC154B display, QCom SM8450 Inline Crypto Engine, QCom SM6115 UFS, QCom SDM670 PDC interrupt controller, Arm 2022 Cortex cores, and QCom IPQ9574 Crypto bindings - Fixes for Rockchip DWC PCI binding - Ensure all properties are evaluated on USB connector schema - Fix dt-check-compatible script to find of_device_id instances with compiler annotations" * tag 'devicetree-for-6.6' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux: (64 commits) dt-bindings: usb: Add V3s compatible string for OHCI dt-bindings: usb: Add V3s compatible string for EHCI dt-bindings: display: panel: mipi-dbi-spi: add Saef SF-TC154B dt-bindings: vendor-prefixes: document Saef Technology dt-bindings: thermal: lmh: update maintainer address of: unittest: Fix of_unittest_pci_node() kconfig dependencies dt-bindings: crypto: ice: Document sm8450 inline crypto engine dt-bindings: ufs: qcom: Add ICE to sm8450 example dt-bindings: ufs: qcom: Add sm6115 binding dt-bindings: ufs: qcom: Add reg-names property for ICE dt-bindings: yamllint: Enable quoted string check dt-bindings: Drop remaining unneeded quotes of: unittest-data: Fix whitespace - angular brackets of: unittest-data: Fix whitespace - indentation of: unittest-data: Fix whitespace - blank lines of: unittest-data: Convert remaining overlay DTS files to sugar syntax of: overlay: unittest: Add test for unresolved symbol of: unittest: Add separators to of_unittest_overlay_high_level() of: unittest: Cleanup partially-applied overlays of: unittest: Merge of_unittest_apply{,_revert}_overlay_check() ...
2023-08-31Merge tag 'soc-dt-6.6' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/socLinus Torvalds1-1/+13
Pull ARM devicetree updates from Arnd Bergmann: "These are the devicetree updates for Arm and RISC-V based SoCs, mainly from Qualcomm, NXP/Freescale, Aspeed, TI, Rockchips, Samsung, ST and Starfive. Only a few new SoC got added: - TI AM62P5, a variant of the existing Sitara AM62x family - Intel Agilex5, an FPGFA platform that includes an Cortex-A76/A55 SoC. - Qualcomm ipq5018 is used in wireless access points - Qualcomm SM4450 (Snapdragon 4 Gen 2) is a new low-end mobile phone platform. In total, 29 machines get added, which is low because of the summer break. These cover SoCs from Aspeed, Broadcom, NXP, Samsung, ST, Allwinner, Amlogic, Intel, Qualcomm, Rockchip, TI and T-Head. Most of these are development and reference boards. Despite not adding a lot of new machines, there are over 700 patches in total, most of which are cleanups and minor fixes" * tag 'soc-dt-6.6' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (735 commits) arm64: dts: use capital "OR" for multiple licenses in SPDX ARM: dts: use capital "OR" for multiple licenses in SPDX arm64: dts: qcom: sdm845-db845c: Mark cont splash memory region as reserved ARM: dts: qcom: apq8064: add support to gsbi4 uart riscv: dts: change TH1520 files to dual license riscv: dts: thead: add BeagleV Ahead board device tree dt-bindings: riscv: Add BeagleV Ahead board compatibles ARM: dts: stm32: add SCMI PMIC regulators on stm32mp135f-dk board ARM: dts: stm32: STM32MP13x SoC exposes SCMI regulators dt-bindings: rcc: stm32: add STM32MP13 SCMI regulators IDs ARM: dts: stm32: support display on stm32f746-disco board ARM: dts: stm32: rename mmc_vcard to vcc-3v3 on stm32f746-disco ARM: dts: stm32: add pin map for LTDC on stm32f7 ARM: dts: stm32: add ltdc support on stm32f746 MCU arm64: dts: qcom: sm6350: Hook up PDC as wakeup-parent of TLMM arm64: dts: qcom: sdm670: Hook up PDC as wakeup-parent of TLMM arm64: dts: qcom: sa8775p: Hook up PDC as wakeup-parent of TLMM arm64: dts: qcom: sc8280xp: Hook up PDC as wakeup-parent of TLMM arm64: dts: qcom: sdm670: Add PDC riscv: dts: starfive: fix jh7110 qspi sort order ...
2023-08-25Revert "dt-bindings: crypto: qcom,prng: Add SM8450"Neil Armstrong1-19/+5
This reverts commit b9296bb41275 ("dt-bindings: crypto: qcom,prng: Add SM8450"), since the RNG HW on the SM8450 SoC is in fact a True Random Number Generator, a more appropriate compatible should be instead as reported at [1]. [1] https://lore.kernel.org/all/20230818161720.3644424-1-quic_omprsing@quicinc.com/ Suggested-by: Om Prakash Singh <quic_omprsing@quicinc.com> Suggested-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2023-08-24dt-bindings: crypto: ice: Document sm8450 inline crypto engineLuca Weiss1-0/+1
Document the compatible used for the inline crypto engine found on SM8450. Signed-off-by: Luca Weiss <luca.weiss@fairphone.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20230814-dt-binding-ufs-v6-4-fd94845adeda@fairphone.com Signed-off-by: Rob Herring <robh@kernel.org>
2023-08-23dt-bindings: use capital "OR" for multiple licenses in SPDXKrzysztof Kozlowski1-1/+1
Documentation/process/license-rules.rst and checkpatch expect the SPDX identifier syntax for multiple licenses to use capital "OR". Correct it to keep consistent format and avoid copy-paste issues. Correct also the format // -> .* in few Allwinner binding headers as pointed out by checkpatch: WARNING: Improper SPDX comment style for 'include/dt-bindings/reset/sun50i-h6-ccu.h', please use '/*' instead Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Acked-by: Guenter Roeck <linux@roeck-us.net> Acked-by: Stephen Boyd <sboyd@kernel.org> Link: https://lore.kernel.org/r/20230823084540.112602-1-krzysztof.kozlowski@linaro.org Signed-off-by: Rob Herring <robh@kernel.org>
2023-08-18dt-bindings: crypto: qcom,prng: Add SM8450Konrad Dybcio1-5/+19
SM8450's PRNG does not require a core clock reference. Add a new compatible with a qcom,prng-ee fallback and handle that. Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Acked-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2023-07-25dt-bindings: crypto: ti,sa2ul: make power-domains conditionalKamlesh Gurudasani1-1/+13
Devices specific to compatible ti,am62-sa3ul don't have control over power of SA3UL from main domain. "power-domains" property in crypto node tries to access the SA3UL power, for which it gets NACK and hence, driver doesn't probe properly for those particular devices. Make "power-domains" property as false for devices with compatible ti,am62-sa3ul. Fixes: 2ce9a7299bf6 ("dt-bindings: crypto: Add TI SA2UL crypto accelerator documentation") Reviewed-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Kamlesh Gurudasani <kamlesh@ti.com> Link: https://lore.kernel.org/r/20230614-sa3ul-v5-1-29dd2366fba3@ti.com Signed-off-by: Nishanth Menon <nm@ti.com>
2023-07-22dt-bindings: crypto: add new compatible for stm32-hashLionel Debieve1-0/+1
Add a new compatible for stm32mp13 support. Signed-off-by: Lionel Debieve <lionel.debieve@foss.st.com> Signed-off-by: Thomas Bourgoin <thomas.bourgoin@foss.st.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2023-07-14dt-bindings: crypto: qcom-qce: add SoC compatible string for ipq9574Anusha Rao1-0/+1
Document the compatible string for ipq9574. Acked-by: Conor Dooley <conor.dooley@microchip.com> Reviewed-by: Bhupesh Sharma <bhupesh.sharma@linaro.org> Signed-off-by: Anusha Rao <quic_anusha@quicinc.com> Link: https://lore.kernel.org/r/20230714093032.22400-1-quic_anusha@quicinc.com Signed-off-by: Rob Herring <robh@kernel.org>
2023-07-01Merge tag 'v6.5-p1' of ↵Linus Torvalds2-9/+111
git://git.kernel.org/pub/scm/linux/kernel/git/herbert/crypto-2.6 Pull crypto updates from Herbert Xu: "API: - Add linear akcipher/sig API - Add tfm cloning (hmac, cmac) - Add statesize to crypto_ahash Algorithms: - Allow only odd e and restrict value in FIPS mode for RSA - Replace LFSR with SHA3-256 in jitter - Add interface for gathering of raw entropy in jitter Drivers: - Fix race on data_avail and actual data in hwrng/virtio - Add hash and HMAC support in starfive - Add RSA algo support in starfive - Add support for PCI device 0x156E in ccp" * tag 'v6.5-p1' of git://git.kernel.org/pub/scm/linux/kernel/git/herbert/crypto-2.6: (85 commits) crypto: akcipher - Do not copy dst if it is NULL crypto: sig - Fix verify call crypto: akcipher - Set request tfm on sync path crypto: sm2 - Provide sm2_compute_z_digest when sm2 is disabled hwrng: imx-rngc - switch to DEFINE_SIMPLE_DEV_PM_OPS hwrng: st - keep clock enabled while hwrng is registered hwrng: st - support compile-testing hwrng: imx-rngc - fix the timeout for init and self check KEYS: asymmetric: Use new crypto interface without scatterlists KEYS: asymmetric: Move sm2 code into x509_public_key KEYS: Add forward declaration in asymmetric-parser.h crypto: sig - Add interface for sign/verify crypto: akcipher - Add sync interface without SG lists crypto: cipher - On clone do crypto_mod_get() crypto: api - Add __crypto_alloc_tfmgfp crypto: api - Remove crypto_init_ops() crypto: rsa - allow only odd e and restrict value in FIPS mode crypto: geniv - Split geniv out of AEAD Kconfig option crypto: algboss - Add missing dependency on RNG2 crypto: starfive - Add RSA algo support ...
2023-06-30Merge tag 'soc-dt-6.5' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/socLinus Torvalds1-2/+2
Pull ARM SoC devicetree updates from Arnd Bergmann: "The biggest change this time is for the 32-bit devicetree files, which are all moved to a new location, using separate subdirectories for each SoC vendor, following the same scheme that is used on arm64, mips and riscv. This has been discussed for many years, but so far we never did this as there was a plan to move the files out of the kernel entirely, which has never happened. The impact of this will be that all external patches no longer apply, and anything depending on the location of the dtb files in the build directory will have to change. The installed files after 'make dtbs_install' keep the current location. There are six added SoCs here that are largely variants of previously added chips. Two other chips are added in a separate branch along with their device drivers. - The Samsung Exynos 4212 makes its return after the Samsung Galaxy Express phone is addded at last. The SoC support was originally added in 2012 but removed again in 2017 as it was unused at the time. - Amlogic C3 is a Cortex-A35 based smart IP camera chip - Qualcomm MSM8939 (Snapdragon 615) is a more featureful variant of the still common MSM8916 (Snapdragon 410) phone chip that has been supported for a long time. - Qualcomm SC8180x (Snapdragon 8cx) is one of their earlier high-end laptop chips, used in the Lenovo Flex 5G, which is added along with the reference board. - Qualcomm SDX75 is the latest generation modem chip that is used as a peripherial in phones but can also run a standalone Linux. Unlike the prior 32-bit SDX65 and SDX55, this now has a 64-bit Cortex-A55. - Alibaba T-Head TH1520 is a quad-core RISC-V chip based on the Xuantie C910 core, a step up from all previously added rv64 chips. All of the above come with reference board implementations, those included there are 39 new board files, but only five more 32-bit this time, probably a new low: - Marantec Maveo board based on dhcor imx6ull module - Endian 4i Edge 200, based on the armv5 Marvell Kirkwood chip - Epson Moverio BT-200 AR glasses based on TI OMAP4 - PHYTEC STM32MP1-3 Dev board based on STM32MP15 PHYTEC SOM - ICnova ADB4006 board based on Allwinner A20 On the 64-bit side, there are also fewer addded machines than we had in the recent releases: - Three boards based on NXP i.MX8: Emtop SoM & Baseboard, NXP i.MX8MM EVKB board and i.MX8MP based Gateworks Venice gw7905-2x device. - NVIDIA IGX Orin and Jetson Orin Nano boards, both based on tegra234 - Qualcomm gains support for 6 reference boards on various members of their IPQ networking SoC series, as well as the Sony Xperia M4 Aqua phone, the Acer Aspire 1 laptop, and the Fxtec Pro1X board on top of the various reference platforms for their new chips. - Rockchips support for several newer boards: Indiedroid Nova (rk3588), Edgeble Neural Compute Module 6B (rk3588), FriendlyARM NanoPi R2C Plus (rk3328), Anbernic RG353PS (rk3566), Lunzn Fastrhino R66S/R68S (rk3568) - TI K3/AM625 based PHYTEC phyBOARD-Lyra-AM625 board and Toradex Verdin family with AM62 COM, carrier and dev boards Other changes to existing boards contain the usual minor improvements along with - continued updates to clean up dts files based on dtc warnings and binding checks, in particular cache properties and node names - support for devicetree overlays on at91, bcm283x - significant additions to existing SoC support on mediatek, qualcomm, ti k3 family, starfive jh71xx, NXP i.MX6 and i.MX8, ST STM32MP1 As usual, a lot more detail is available in the individual merge commits" * tag 'soc-dt-6.5' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (926 commits) ARM: mvebu: fix unit address on armada-390-db flash ARM: dts: Move .dts files to vendor sub-directories kbuild: Support flat DTBs install ARM: dts: Add .dts files missing from the build ARM: dts: allwinner: Use quoted #include ARM: dts: lan966x: kontron-d10: add PHY interrupts ARM: dts: lan966x: kontron-d10: fix SPI CS ARM: dts: lan966x: kontron-d10: fix board reset ARM: dts: at91: Enable device-tree overlay support for AT91 boards arm: dts: Enable device-tree overlay support for AT91 boards arm64: dts: exynos: Remove clock from Exynos850 pmu_system_controller ARM: dts: at91: use generic name for shutdown controller ARM: dts: BCM5301X: Add cells sizes to PCIe nodes dt-bindings: firmware: brcm,kona-smc: convert to YAML riscv: dts: sort makefile entries by directory riscv: defconfig: enable T-HEAD SoC MAINTAINERS: add entry for T-HEAD RISC-V SoC riscv: dts: thead: add sipeed Lichee Pi 4A board device tree riscv: dts: add initial T-HEAD TH1520 SoC device tree riscv: Add the T-HEAD SoC family Kconfig option ...
2023-06-24dt-bindings: crypto: drop unneeded quotesKrzysztof Kozlowski2-5/+5
Cleanup bindings dropping unneeded quotes. Once all these are fixed, checking for this can be enabled in yamllint. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Reviewed-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/20230621064403.9221-1-krzysztof.kozlowski@linaro.org Signed-off-by: Rob Herring <robh@kernel.org>
2023-06-15dt-bindings: crypto: fsl,sec-v4.0-mon: Add "linux,keycodes" and deprecate ↵Rob Herring1-0/+5
"linux,keycode" The "linux,keycode" property is non-standard. Add the common property "linux,keycodes" and mark "linux,keycode" deprecated so that the mistake is not propagated. Acked-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/20230613201231.2826352-2-robh@kernel.org Signed-off-by: Rob Herring <robh@kernel.org>
2023-06-15dt-bindings: crypto: fsl,sec-v4.0-mon: Add missing type for "linux,keycode"Rob Herring1-0/+1
The "linux,keycode" property is missing a type probably because it was confused with the common property "linux,keycodes". Reviewed-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/20230613201231.2826352-1-robh@kernel.org Signed-off-by: Rob Herring <robh@kernel.org>
2023-06-12dt-bindings: crypto: fsl-dcp: add imx6sl and imx6ull compatibleStefan Wahren1-3/+9
Currently the dtbs_check for imx6 generates warnings like this: 'fsl,imx6sl-dcp' is not one of ['fsl,imx23-dcp', 'fsl,imx28-dcp'] ['fsl,imx6sl-dcp', 'fsl,imx28-dcp'] is too long or 'fsl,imx6ull-dcp' is not one of ['fsl,imx23-dcp', 'fsl,imx28-dcp'] ['fsl,imx6ull-dcp', 'fsl,imx28-dcp'] is too long So add them to the devicetree binding. Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20230530100843.15072-2-stefan.wahren@i2se.com Signed-off-by: Rob Herring <robh@kernel.org>
2023-06-05dt-bindings: xilinx: Switch xilinx.com emails to amd.comMichal Simek1-2/+2
@xilinx.com is still working but better to switch to new amd.com after AMD/Xilinx acquisition. Acked-by: Sebastian Reichel <sebastian.reichel@collabora.com> Acked-by: Wolfram Sang <wsa@kernel.org> # for I2C Acked-by: Mark Brown <broonie@kernel.org> Acked-by: Jassi Brar <jassisinghbrar@gmail.com> Acked-by: Damien Le Moal <dlemoal@kernel.org> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Acked-by: Guenter Roeck <linux@roeck-us.net> Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/f5b2bd1e78407e4128fc8f0b5874ba723e710a88.1684245058.git.michal.simek@amd.com
2023-06-02dt-bindings: qcom-qce: Add compatibles for SM6115 and QCM2290Bhupesh Sharma1-9/+35
The core clock for the Crypto Engine block on Qualcomm SoCs SM6115 and QCM2290 are provided via the RPM block. So mark the compatibles for these SoCs to indicate that only 'core' clock is required for such SoCs. Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Tested-by: Anders Roxell <anders.roxell@linaro.org> Tested-by: Linux Kernel Functional Testing <lkft@linaro.org> Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2023-06-02dt-bindings: qcom-qce: Fix compatible combinations for SM8150 and IPQ4019 SoCsBhupesh Sharma1-0/+6
Currently the compatible list available in 'qce' dt-bindings does not support SM8150 and IPQ4019 SoCs directly which may lead to potential 'dtbs_check' error(s). Fix the same. Fixes: 00f3bc2db351 ("dt-bindings: qcom-qce: Add new SoC compatible strings for Qualcomm QCE IP") Reviewed-by: Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org> Acked-by: Rob Herring <robh@kernel.org> Tested-by: Anders Roxell <anders.roxell@linaro.org> Tested-by: Linux Kernel Functional Testing <lkft@linaro.org> Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2023-05-19dt-bindings: crypto: Add StarFive crypto moduleJia Jie Ho1-0/+70
Add documentation to describe StarFive cryptographic engine. Co-developed-by: Huan Feng <huan.feng@starfivetech.com> Signed-off-by: Huan Feng <huan.feng@starfivetech.com> Signed-off-by: Jia Jie Ho <jiajie.ho@starfivetech.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2023-04-27Merge tag 'devicetree-for-6.4-1' of ↵Linus Torvalds4-555/+424
git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux Pull devicetree updates from Rob Herring: "Bindings: - Convert Qcom IOMMU, Amlogic timer, Freescale sec-v4.0, Toshiba TC358764 display bridge, Parade PS8622 display bridge, and Xilinx FPGA bindings to DT schema format - Add qdu1000 and sa8775p SoC support to Qcom PDC interrupt controller - Add MediaTek MT8365 UART and SYSIRQ bindings - Add Arm Cortex-A78C and X1C core compatibles - Add vendor prefix for Novatek - Remove bindings for stih415, sti416, stid127 platforms - Drop uneeded quotes in schema files. This is preparation for yamllint checking quoting for us. - Add missing (unevaluated|additional)Properties constraints on child node schemas - Clean-up schema comments formatting - Fix I2C and SPI node bus names in schema examples - Clean-up some display compatibles schema syntax - Fix incorrect references to lvds.yaml - Gather all cache controller bindings in a common directory DT core: - Convert unittest to new void .remove platform device hook - kerneldoc fixes for DT address of_pci_range_to_resource/ of_address_to_resource functions" * tag 'devicetree-for-6.4-1' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux: (46 commits) dt-bindings: rng: Drop unneeded quotes dt-bindings: arm/soc: mediatek: Drop unneeded quotes dt-bindings: soc: qcom: Drop unneeded quotes dt-bindings: i2c: samsung: Fix 'deprecated' value dt-bindings: display: Fix lvds.yaml references dt-bindings: display: simplify compatibles syntax dt-bindings: display: mediatek: simplify compatibles syntax dt-bindings: drm/bridge: ti-sn65dsi86: Fix the video-interfaces.yaml references dt-bindings: timer: Drop unneeded quotes dt-bindings: interrupt-controller: qcom,pdc: document qcom,qdu1000-pdc dt-bindings: interrupt-controller: qcom-pdc: add compatible for sa8775p dt-bindings: reset: remove stih415/stih416 reset dt-bindings: net: dwmac: sti: remove stih415/sti416/stid127 dt-bindings: irqchip: sti: remove stih415/stih416 and stid127 dt-bindings: iommu: Convert QCOM IOMMU to YAML dt-bindings: irqchip: ti,sci-inta: Add optional power-domains property dt-bindings: Add missing (unevaluated|additional)Properties on child node schemas of: address: Reshuffle to remove forward declarations of: address: Fix documented return value of of_pci_range_to_resource() of: address: Document return value of of_address_to_resource() ...
2023-04-26Merge tag 'v6.4-p1' of ↵Linus Torvalds2-25/+123
git://git.kernel.org/pub/scm/linux/kernel/git/herbert/crypto-2.6 Pull crypto updates from Herbert Xu: "API: - Total usage stats now include all that returned errors (instead of just some) - Remove maximum hash statesize limit - Add cloning support for hmac and unkeyed hashes - Demote BUG_ON in crypto_unregister_alg to a WARN_ON Algorithms: - Use RIP-relative addressing on x86 to prepare for PIE build - Add accelerated AES/GCM stitched implementation on powerpc P10 - Add some test vectors for cmac(camellia) - Remove failure case where jent is unavailable outside of FIPS mode in drbg - Add permanent and intermittent health error checks in jitter RNG Drivers: - Add support for 402xx devices in qat - Add support for HiSTB TRNG - Fix hash concurrency issues in stm32 - Add OP-TEE firmware support in caam" * tag 'v6.4-p1' of git://git.kernel.org/pub/scm/linux/kernel/git/herbert/crypto-2.6: (139 commits) i2c: designware: Add doorbell support for Mendocino i2c: designware: Use PCI PSP driver for communication powerpc: Move Power10 feature PPC_MODULE_FEATURE_P10 crypto: p10-aes-gcm - Remove POWER10_CPU dependency crypto: testmgr - Add some test vectors for cmac(camellia) crypto: cryptd - Add support for cloning hashes crypto: cryptd - Convert hash to use modern init_tfm/exit_tfm crypto: hmac - Add support for cloning crypto: hash - Add crypto_clone_ahash/shash crypto: api - Add crypto_clone_tfm crypto: api - Add crypto_tfm_get crypto: x86/sha - Use local .L symbols for code crypto: x86/crc32 - Use local .L symbols for code crypto: x86/aesni - Use local .L symbols for code crypto: x86/sha256 - Use RIP-relative addressing crypto: x86/ghash - Use RIP-relative addressing crypto: x86/des3 - Use RIP-relative addressing crypto: x86/crc32c - Use RIP-relative addressing crypto: x86/cast6 - Use RIP-relative addressing crypto: x86/cast5 - Use RIP-relative addressing ...
2023-04-07dt-bindings: crypto: Add Qualcomm Inline Crypto EngineAbel Vesa1-0/+42
Add schema file for new Qualcomm Inline Crypto Engine driver. Signed-off-by: Abel Vesa <abel.vesa@linaro.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Eric Biggers <ebiggers@google.com> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230407105029.2274111-2-abel.vesa@linaro.org
2023-04-04dt-bindings: crypto: sec-v4.0-mon: add snvs power off supportPeng Fan1-0/+6
Add SNVS power off support. The SNVS_LP LPCR register could drive signal to PMIC to turn off system power. Signed-off-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20230323123907.103719-1-peng.fan@oss.nxp.com Signed-off-by: Rob Herring <robh@kernel.org>
2023-03-18dt-bindings: crypto: fsl,sec-v4.0: Convert to DT schemaRob Herring3-553/+416
Convert Freescale CAAM/SEC4 binding to DT schema format. The 'fsl,sec-v4.0' and 'fsl,sec-v4.0-mon' parts are independent, so split them into separate schema files. Add a bunch of missing compatibles for v5.0, v5.4, etc. Drop unused 'ranges', '#address-cells', and '#size-cells' from fsl,sec-v4.0-mon nodes. There's one DTB warning for LS1012a which has a 2nd 'reg' entry for 'fsl,sec-v4.0-rtic'. Leaving that as there is no clue as to what it is for. Reviewed-by: Gaurav Jain <gaurav.jain@nxp.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20230220213334.353779-1-robh@kernel.org Signed-off-by: Rob Herring <robh@kernel.org>
generated by cgit v1.2.3 (git 2.39.0) at 2024-08-20 10:36:12 +0300