starfive-tech/linux.git - StarFive Tech Linux Kernel for VisionFive (JH7110) boards (mirror)

Age	Commit message (Collapse)	Author	Files	Lines
2018-03-11	dmaengine: mv_xor_v2: Fix clock resource by adding a register clock	Gregory CLEMENT	1	-1/+5
	On the CP110 components which are present on the Armada 7K/8K SoC we need to explicitly enable the clock for the registers. However it is not needed for the AP8xx component, that's why this clock is optional. With this patch both clock have now a name, but in order to be backward compatible, the name of the first clock is not used. It allows to still use this clock with a device tree using the old binding. Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2016-07-12	dt-bindings: dma: add binding for the Marvell XOR v2 engine	Thomas Petazzoni	1	-0/+24
	This commit adds the Device Tree binding documentation for the Marvell XOR v2 engine, which is found on Marvell Armada 7K/8K ARM64 SoCs. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Vinod Koul <vinod.koul@intel.com>