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2022-11-18dt-bindings: arm-smmu: Add SM6350 GPU SMMUv2Konrad Dybcio1-0/+2
SM6350 has a qcom,smmu-v2-style SMMU just for Adreno and friends. Document it. Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20221117094422.11000-2-konrad.dybcio@linaro.org Signed-off-by: Will Deacon <will@kernel.org>
2022-11-14dt-bindings: arm-smmu: Add generic qcom,smmu-500 bindingsDmitry Baryshkov1-1/+28
Add generic bindings for the Qualcomm variant of the ARM MMU-500. It is expected that all future platforms will use the generic qcom,smmu-500 compat string in addition to SoC-specific and the generic arm,mmu-500 ones. Older bindings are now described as deprecated. Note: I have split the sdx55 and sdx65 from the legacy bindings. They are not supported by the qcom SMMU implementation. I can suppose that they are using the generic implementation rather than the Qualcomm-speicific one. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20221114170635.1406534-5-dmitry.baryshkov@linaro.org Signed-off-by: Will Deacon <will@kernel.org>
2022-11-14dt-bindings: arm-smmu: add special case for Google Cheza platformDmitry Baryshkov1-0/+4
Cheza fw does not properly program the GPU aperture to allow the GPU to update the SMMU pagetables for context switches. The board file works around this by dropping the "qcom,adreno-smmu" compat string. Add this usecase to arm,smmu.yaml schema. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20221114170635.1406534-4-dmitry.baryshkov@linaro.org Signed-off-by: Will Deacon <will@kernel.org>
2022-11-14dt-bindings: arm-smmu: fix clocks/clock-names schemaDmitry Baryshkov1-8/+121
Rework clocks/clock-names properties schema to properly describe possible usage cases. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20221114170635.1406534-3-dmitry.baryshkov@linaro.org Signed-off-by: Will Deacon <will@kernel.org>
2022-11-14dt-bindings: arm-smmu: Add missing Qualcomm SMMU compatiblesDmitry Baryshkov1-0/+11
Add missing compatibles used for Adreno SMMU on sc7280 and sm8450 platforms and for the Qualcomm v2 SMMU used on SDM630 platform. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20221114170635.1406534-2-dmitry.baryshkov@linaro.org Signed-off-by: Will Deacon <will@kernel.org>
2022-11-14dt-bindings: iommu: arm-smmu: add sdm670 compatibleRichard Acayan1-0/+1
The Snapdragon 670 needs the IOMMU for GENI I2C. Add a compatible string in the documentation to represent its support. Signed-off-by: Richard Acayan <mailingradian@gmail.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20221111003606.126795-2-mailingradian@gmail.com Signed-off-by: Will Deacon <will@kernel.org>
2022-11-14dt-bindings: arm-smmu: Add compatible for Qualcomm SM6115Adam Skladowski1-0/+1
Add compatible for the Qualcomm SM6115 platform to the ARM SMMU DeviceTree binding. Signed-off-by: Adam Skladowski <a39.skl@gmail.com> Signed-off-by: Iskren Chernev <iskren.chernev@gmail.com> Acked-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20221030094258.486428-5-iskren.chernev@gmail.com Signed-off-by: Will Deacon <will@kernel.org>
2022-11-14dt-bindings: arm-smmu: Add 'compatible' for QDU1000 and QRU1000Melody Olvera1-0/+1
Add compatible bindings for Qualcomm QDU1000 and QRU1000 platforms. Signed-off-by: Melody Olvera <quic_molvera@quicinc.com> Link: https://lore.kernel.org/r/20221026190534.4004945-2-quic_molvera@quicinc.com Signed-off-by: Will Deacon <will@kernel.org>
2022-10-24dt-bindings: iommu: dart: add t6000 compatibleSven Peter1-1/+3
The M1 Max/Pro SoCs come with a new DART variant that is incompatible with the previous one. Add a new compatible for those. Signed-off-by: Sven Peter <sven@svenpeter.dev> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Janne Grunau <j@jannau.net> Signed-off-by: Hector Martin <marcan@marcan.st>
2022-10-22dt-bindings: iommu: renesas,ipmmu-vmsa: R-Car V3U is R-Car Gen4Geert Uytterhoeven1-2/+4
Despite the name, R-Car V3U is the first member of the R-Car Gen4 family. Hence move its compatible value to the R-Car Gen4 section. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Acked-by: Joerg Roedel <jroedel@suse.de> Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Link: https://lore.kernel.org/r/c1fb71448a8400986fd30d51a1bb2704376c0306.1666361055.git.geert+renesas@glider.be Signed-off-by: Rob Herring <robh@kernel.org>
2022-10-10Merge tag 'iommu-updates-v6.1' of ↵Linus Torvalds2-10/+9
git://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu Pull iommu updates from Joerg Roedel: - remove the bus_set_iommu() interface which became unnecesary because of IOMMU per-device probing - make the dma-iommu.h header private - Intel VT-d changes from Lu Baolu: - Decouple PASID and PRI from SVA - Add ESRTPS & ESIRTPS capability check - Cleanups - Apple DART support for the M1 Pro/MAX SOCs - support for AMD IOMMUv2 page-tables for the DMA-API layer. The v2 page-tables are compatible with the x86 CPU page-tables. Using them for DMA-API prepares support for hardware-assisted IOMMU virtualization - support for MT6795 Helio X10 M4Us in the Mediatek IOMMU driver - some smaller fixes and cleanups * tag 'iommu-updates-v6.1' of git://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu: (59 commits) iommu/vt-d: Avoid unnecessary global DMA cache invalidation iommu/vt-d: Avoid unnecessary global IRTE cache invalidation iommu/vt-d: Rename cap_5lp_support to cap_fl5lp_support iommu/vt-d: Remove pasid_set_eafe() iommu/vt-d: Decouple PASID & PRI enabling from SVA iommu/vt-d: Remove unnecessary SVA data accesses in page fault path dt-bindings: iommu: arm,smmu-v3: Relax order of interrupt names iommu: dart: Support t6000 variant iommu/io-pgtable-dart: Add DART PTE support for t6000 iommu/io-pgtable: Add DART subpage protection support iommu/io-pgtable: Move Apple DART support to its own file iommu/mediatek: Add support for MT6795 Helio X10 M4Us iommu/mediatek: Introduce new flag TF_PORT_TO_ADDR_MT8173 dt-bindings: mediatek: Add bindings for MT6795 M4U iommu/iova: Fix module config properly iommu/amd: Fix sparse warning iommu/amd: Remove outdated comment iommu/amd: Free domain ID after domain_flush_pages iommu/amd: Free domain id in error path iommu/virtio: Fix compile error with viommu_capable() ...
2022-09-26Merge branches 'apple/dart', 'arm/mediatek', 'arm/omap', 'arm/smmu', ↵Joerg Roedel2-10/+9
'virtio', 'x86/vt-d', 'x86/amd' and 'core' into next
2022-09-26dt-bindings: iommu: arm,smmu-v3: Relax order of interrupt namesJean-Philippe Brucker1-10/+5
The QEMU devicetree uses a different order for SMMUv3 interrupt names, and there isn't a good reason for enforcing a specific order. Since all interrupt lines are optional, operating systems should not expect a fixed interrupt array layout; they should instead match each interrupt to its name individually. Besides, as a result of commit e4783856a2e8 ("dt-bindings: iommu: arm,smmu-v3: make PRI IRQ optional"), "cmdq-sync" and "priq" are already permutable. Relax the interrupt-names array entirely by allowing any permutation, incidentally making the schema more readable. Note that dt-validate won't allow duplicate names here so we don't need to specify maxItems or add additional checks, it's quite neat. Signed-off-by: Jean-Philippe Brucker <jean-philippe@linaro.org> Acked-by: Will Deacon <will@kernel.org> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20220916133145.1910549-1-jean-philippe@linaro.org Signed-off-by: Joerg Roedel <jroedel@suse.de>
2022-09-26dt-bindings: mediatek: Add bindings for MT6795 M4UAngeloGioacchino Del Regno1-0/+4
Add bindings for the MediaTek Helio X10 (MT6795) IOMMU/M4U. Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Acked-by: Rob Herring <robh@kernel.org> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com> Link: https://lore.kernel.org/r/20220913151148.412312-2-angelogioacchino.delregno@collabora.com Signed-off-by: Joerg Roedel <jroedel@suse.de>
2022-08-25dt-bindings: Remove 'Device Tree Bindings' from end of title:Andrew Lunn1-1/+1
As indicated in link: https://lore.kernel.org/all/20220822204945.GA808626-robh@kernel.org/ DT schema files should not have 'Device Tree Binding' as part of there title: line. Remove this in most .yaml files, so hopefully preventing developers copying it into new .yaml files, and being asked to remove it. Signed-off-by: Andrew Lunn <andrew@lunn.ch> Link: https://lore.kernel.org/r/20220825020427.3460650-1-andrew@lunn.ch Signed-off-by: Rob Herring <robh@kernel.org>
2022-07-29Merge branches 'arm/exynos', 'arm/mediatek', 'arm/msm', 'arm/smmu', ↵Joerg Roedel2-0/+18
'virtio', 'x86/vt-d', 'x86/amd' and 'core' into next
2022-07-22Merge tag 'arm-smmu-updates' of ↵Joerg Roedel1-0/+1
git://git.kernel.org/pub/scm/linux/kernel/git/will/linux into arm/smmu Arm SMMU updates for 5.20 - Add even more Qualcomm device-tree compatible strings - Support dumping of IMP DEF Qualcomm registers on TLB sync timeout - Fix reference count leak on device tree node in Qualcomm driver
2022-07-19dt-bindings: arm-smmu: Add compatible for Qualcomm SM6375Konrad Dybcio1-0/+1
Add a compatible for Qualcomm SM6375's broken-as-usual MMU500 impl. Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org> Link: https://lore.kernel.org/r/20220716193223.455859-1-konrad.dybcio@somainline.org Signed-off-by: Will Deacon <will@kernel.org>
2022-06-22dt-bindings: iommu: mediatek: Add mediatek,infracfg phandleAngeloGioacchino Del Regno1-0/+17
Add property "mediatek,infracfg" to let the mtk_iommu driver retrieve a phandle to the infracfg syscon instead of performing a per-soc compatible lookup in the entire devicetree and set it as a required property for MT2712 and MT8173. Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com> Link: https://lore.kernel.org/r/20220616110830.26037-2-angelogioacchino.delregno@collabora.com Signed-off-by: Joerg Roedel <jroedel@suse.de>
2022-06-06dt-bindings: Add xen,grant-dma IOMMU description for xen-grant DMA opsOleksandr Tyshchenko1-0/+39
The main purpose of this binding is to communicate Xen specific information using generic IOMMU device tree bindings (which is a good fit here) rather than introducing a custom property. Introduce Xen specific IOMMU for the virtualized device (e.g. virtio) to be used by Xen grant DMA-mapping layer in the subsequent commit. The reference to Xen specific IOMMU node using "iommus" property indicates that Xen grant mappings need to be enabled for the device, and it specifies the ID of the domain where the corresponding backend resides. The domid (domain ID) is used as an argument to the Xen grant mapping APIs. This is needed for the option to restrict memory access using Xen grant mappings to work which primary goal is to enable using virtio devices in Xen guests. Signed-off-by: Oleksandr Tyshchenko <oleksandr_tyshchenko@epam.com> Reviewed-by: Stefano Stabellini <sstabellini@kernel.org> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/1654197833-25362-6-git-send-email-olekstysh@gmail.com Signed-off-by: Juergen Gross <jgross@suse.com>
2022-05-31Merge tag 'iommu-updates-v5.19' of ↵Linus Torvalds3-23/+46
git://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu Pull iommu updates from Joerg Roedel: - Intel VT-d driver updates: - Domain force snooping improvement. - Cleanups, no intentional functional changes. - ARM SMMU driver updates: - Add new Qualcomm device-tree compatible strings - Add new Nvidia device-tree compatible string for Tegra234 - Fix UAF in SMMUv3 shared virtual addressing code - Force identity-mapped domains for users of ye olde SMMU legacy binding - Minor cleanups - Fix a BUG_ON in the vfio_iommu_group_notifier: - Groundwork for upcoming iommufd framework - Introduction of DMA ownership so that an entire IOMMU group is either controlled by the kernel or by user-space - MT8195 and MT8186 support in the Mediatek IOMMU driver - Make forcing of cache-coherent DMA more coherent between IOMMU drivers - Fixes for thunderbolt device DMA protection - Various smaller fixes and cleanups * tag 'iommu-updates-v5.19' of git://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu: (88 commits) iommu/amd: Increase timeout waiting for GA log enablement iommu/s390: Tolerate repeat attach_dev calls iommu/vt-d: Remove hard coding PGSNP bit in PASID entries iommu/vt-d: Remove domain_update_iommu_snooping() iommu/vt-d: Check domain force_snooping against attached devices iommu/vt-d: Block force-snoop domain attaching if no SC support iommu/vt-d: Size Page Request Queue to avoid overflow condition iommu/vt-d: Fold dmar_insert_one_dev_info() into its caller iommu/vt-d: Change return type of dmar_insert_one_dev_info() iommu/vt-d: Remove unneeded validity check on dev iommu/dma: Explicitly sort PCI DMA windows iommu/dma: Fix iova map result check bug iommu/mediatek: Fix NULL pointer dereference when printing dev_name iommu: iommu_group_claim_dma_owner() must always assign a domain iommu/arm-smmu: Force identity domains for legacy binding iommu/arm-smmu: Support Tegra234 SMMU dt-bindings: arm-smmu: Add compatible for Tegra234 SOC dt-bindings: arm-smmu: Document nvidia,memory-controller property iommu/arm-smmu-qcom: Add SC8280XP support dt-bindings: arm-smmu: Add compatible for Qualcomm SC8280XP ...
2022-05-26Merge tag 'arm-drivers-5.19' of ↵Linus Torvalds1-0/+52
git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc Pull ARM driver updates from Arnd Bergmann: "There are minor updates to SoC specific drivers for chips by Rockchip, Samsung, NVIDIA, TI, NXP, i.MX, Qualcomm, and Broadcom. Noteworthy driver changes include: - Several conversions of DT bindings to yaml format. - Renesas adds driver support for R-Car V4H, RZ/V2M and RZ/G2UL SoCs. - Qualcomm adds a bus driver for the SSC (Snapdragon Sensor Core), and support for more chips in the RPMh power domains and the soc-id. - NXP has a new driver for the HDMI blk-ctrl on i.MX8MP. - Apple M1 gains support for the on-chip NVMe controller, making it possible to finally use the internal disks. This also includes SoC drivers for their RTKit IPC and for the SART DMA address filter. For other subsystems that merge their drivers through the SoC tree, we have - Firmware drivers for the ARM firmware stack including TEE, OP-TEE, SCMI and FF-A get a number of smaller updates and cleanups. OP-TEE now has a cache for firmware argument structures as an optimization, and SCMI now supports the 3.1 version of the specification. - Reset controller updates to Amlogic, ASpeed, Renesas and ACPI drivers - Memory controller updates for Tegra, and a few updates for other platforms" * tag 'arm-drivers-5.19' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (159 commits) memory: tegra: Add MC error logging on Tegra186 onward memory: tegra: Add memory controller channels support memory: tegra: Add APE memory clients for Tegra234 memory: tegra: Add Tegra234 support nvme-apple: fix sparse endianess warnings soc/tegra: pmc: Document core domain fields soc: qcom: pdr: use static for servreg_* variables soc: imx: fix semicolon.cocci warnings soc: renesas: R-Car V3U is R-Car Gen4 soc: imx: add i.MX8MP HDMI blk-ctrl soc: imx: imx8m-blk-ctrl: Add i.MX8MP media blk-ctrl soc: imx: add i.MX8MP HSIO blk-ctrl soc: imx: imx8m-blk-ctrl: set power device name soc: qcom: llcc: Add sc8180x and sc8280xp configurations dt-bindings: arm: msm: Add sc8180x and sc8280xp LLCC compatibles soc/tegra: pmc: Select REGMAP dt-bindings: reset: st,sti-powerdown: Convert to yaml dt-bindings: reset: st,sti-picophyreset: Convert to yaml dt-bindings: reset: socfpga: Convert to yaml dt-bindings: reset: snps,axs10x-reset: Convert to yaml ...
2022-05-20Merge branches 'apple/dart', 'arm/mediatek', 'arm/msm', 'arm/smmu', ↵Joerg Roedel3-23/+46
'ppc/pamu', 'x86/vt-d', 'x86/amd' and 'vfio-notifier-fix' into next
2022-05-09dt-bindings: iommu: arm,smmu-v3: make PRI IRQ optionalAndre Przywara1-5/+11
The Page Request Interface (PRI) is an optional PCIe feature. As such, a SMMU would not need to handle it if the PCIe host bridge or the SMMU itself do not implement it. Also an SMMU could be connected to a platform device, without any PRI functionality whatsoever. In all cases there would be no SMMU PRI queue interrupt to be wired up to an interrupt controller. At the moment, with the "eventq,gerror,priq,cmdq-sync" order, we would need to sacrifice the command queue sync interrupt as well, which might not be desired. Relax the binding to allow specifying certain useful combinations of wired interrupts, for instance just the "gerror" interrupt, or omitting both "pri" and "cmdq-sync". Signed-off-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20220506140533.3566431-2-andre.przywara@arm.com
2022-05-06dt-bindings: arm-smmu: Add compatible for Tegra234 SOCThierry Reding1-2/+4
The NVIDIA Tegra234 SoC comes with one single-instance ARM SMMU used by isochronous memory clients and two dual-instance ARM SMMUs used by non- isochronous memory clients. Reviewed-by: Rob Herring <robh@kernel.org> Acked-by: Will Deacon <will@kernel.org> Signed-off-by: Thierry Reding <treding@nvidia.com> Link: https://lore.kernel.org/r/20220429082243.496000-3-thierry.reding@gmail.com Signed-off-by: Will Deacon <will@kernel.org>
2022-05-06dt-bindings: arm-smmu: Document nvidia,memory-controller propertyThierry Reding1-0/+17
On NVIDIA SoC's the ARM SMMU needs to interact with the memory controller in order to map memory clients to the corresponding stream IDs. Document how the nvidia,memory-controller property can be used to achieve this. Note that this is a backwards-incompatible change that is, however, necessary to ensure correctness. Without the new property, most of the devices would still work but it is not guaranteed that all will. Reviewed-by: Rob Herring <robh@kernel.org> Acked-by: Will Deacon <will@kernel.org> Signed-off-by: Thierry Reding <treding@nvidia.com> Link: https://lore.kernel.org/r/20220429082243.496000-2-thierry.reding@gmail.com Signed-off-by: Will Deacon <will@kernel.org>
2022-05-06dt-bindings: arm-smmu: Add compatible for Qualcomm SC8280XPBjorn Andersson1-0/+1
Add compatible for the Qualcomm SC8280XP platform to the ARM SMMU DeviceTree binding. Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20220503163429.960998-2-bjorn.andersson@linaro.org Signed-off-by: Will Deacon <will@kernel.org>
2022-05-06dt-bindings: arm-smmu: Add binding for SDX65 SMMURohit Agarwal1-0/+1
Add devicetree binding for Qualcomm SDX65 SMMU. Signed-off-by: Rohit Agarwal <quic_rohiagar@quicinc.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/1649670615-21268-5-git-send-email-quic_rohiagar@quicinc.com Signed-off-by: Will Deacon <will@kernel.org>
2022-05-04dt-bindings: mediatek: mt8186: Add binding for MM iommuYong Wu1-0/+4
Add mt8186 iommu binding. "-mm" means the iommu is for Multimedia. Signed-off-by: Yong Wu <yong.wu@mediatek.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> Reviewed-by: Rob Herring <robh@kernel.org> Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://lore.kernel.org/r/20220503071427.2285-4-yong.wu@mediatek.com Signed-off-by: Joerg Roedel <jroedel@suse.de>
2022-05-04dt-bindings: mediatek: mt8195: Add binding for infra IOMMUYong Wu1-1/+12
In mt8195, we have a new IOMMU that is for INFRA IOMMU. its masters mainly are PCIe and USB. Different with MM IOMMU, all these masters connect with IOMMU directly, there is no mediatek,larbs property for infra IOMMU. Another thing is about PCIe ports. currently the function "of_iommu_configure_dev_id" only support the id number is 1, But our PCIe have two ports, one is for reading and the other is for writing. see more about the PCIe patch in this patchset. Thus, I only list the reading id here and add the other id in our driver. Signed-off-by: Yong Wu <yong.wu@mediatek.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> Reviewed-by: Rob Herring <robh@kernel.org> Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com> Link: https://lore.kernel.org/r/20220503071427.2285-3-yong.wu@mediatek.com Signed-off-by: Joerg Roedel <jroedel@suse.de>
2022-05-04dt-bindings: mediatek: mt8195: Add binding for MM IOMMUYong Wu1-0/+7
This patch adds descriptions for mt8195 IOMMU which also use ARM Short-Descriptor translation table format. In mt8195, there are two smi-common HW and IOMMU, one is for vdo(video output), the other is for vpp(video processing pipe). They connects with different smi-larbs, then some setting(larbid_remap) is different. Differentiate them with the compatible string. Something like this: IOMMU(VDO) IOMMU(VPP) | | SMI_COMMON_VDO SMI_COMMON_VPP --------------- ---------------- | | ... | | ... larb0 larb2 ... larb1 larb3 ... Another change is that we have a new IOMMU that is for infra master like PCIe and USB. The infra master don't have the larb and ports, thus we rename the port header file to mt8195-memory-port.h rather than mt8195-larb-port.h. Also, the IOMMU is not only for MM, thus, we don't call it "m4u" which means "MultiMedia Memory Management UNIT". thus, use the "iommu" as the compatiable string. Signed-off-by: Yong Wu <yong.wu@mediatek.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> Reviewed-by: Rob Herring <robh@kernel.org> Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com> Link: https://lore.kernel.org/r/20220503071427.2285-2-yong.wu@mediatek.com Signed-off-by: Joerg Roedel <jroedel@suse.de>
2022-05-01dt-bindings: iommu: Add Apple SART DMA address filterSven Peter1-0/+52
Apple SoCs such as the M1 come with a simple DMA address filter called SART. Unlike a real IOMMU no pagetables can be configured but instead DMA transactions can be allowed for up to 16 paddr regions. The consumer also needs special support since not all DMA allocations have to be added to this filter. Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Sven Peter <sven@svenpeter.dev>
2022-04-28dt-bindings: iommu: Drop client node in examplesRob Herring2-20/+0
There's no need to show consumer side in provider examples. The ones used here are undocumented or undocumented in schemas which results in warnings. Signed-off-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20220422192104.2591462-1-robh@kernel.org Signed-off-by: Joerg Roedel <jroedel@suse.de>
2022-04-05dt-bindings: white-space cleanupsKrzysztof Kozlowski1-1/+0
Remove trailing white-spaces and trailing blank lines (yamllint with default options does not like them). Suggested-by: Corentin Labbe <clabbe@baylibre.com> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20220402192819.154691-1-krzysztof.kozlowski@linaro.org
2022-03-26Merge tag 'devicetree-for-5.18' of ↵Linus Torvalds2-2/+10
git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux Pull devicetree updates from Rob Herring: - Add Krzysztof Kozlowski as co-maintainer for DT bindings providing much needed help. - DT schema validation now takes DTB files as input rather than intermediate YAML files. This decouples the validation from the source level syntax information. There's a bunch of schema fixes as a result of switching to DTB based validation which exposed some errors and incomplete schemas and examples. - Kbuild improvements to explicitly warn users running 'make dt_binding_check' on missing yamllint - Expand DT_SCHEMA_FILES kbuild variable to take just a partial filename or path instead of the full path to 1 file. - Convert various bindings to schema format: mscc,vsc7514-switch, multiple GNSS bindings, ahci-platform, i2c-at91, multiple UFS bindings, cortina,gemini-sata-bridge, cortina,gemini-ethernet, Atmel SHA, Atmel TDES, Atmel AES, armv7m-systick, Samsung Exynos display subsystem, nuvoton,npcm7xx-timer, samsung,s3c2410-i2c, zynqmp_dma, msm/mdp4, rda,8810pl-uart - New schemas for u-boot environment variable partition, TI clksel - New compatible strings for Renesas RZ/V2L SoC - Vendor prefixes for Xen, HPE, deprecated Synopsys, deprecated HiSilicon - Add/fix schemas for QEMU Arm 'virt' machine - Drop unused of_alias_get_alias_list() function - Add a script to check DT unittest EXPECT message output. Pass messages also now print by default at PR_INFO level to help test automation. * tag 'devicetree-for-5.18' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux: (96 commits) dt-bindings: kbuild: Make DT_SCHEMA_LINT a recursive variable dt-bindings: nvmem: add U-Boot environment variables binding dt-bindings: ufs: qcom: Add SM6350 compatible string dt-bindings: dmaengine: sifive,fu540-c000: include generic schema dt-bindings: gpio: pca95xx: drop useless consumer example Revert "of: base: Introduce of_alias_get_alias_list() to check alias IDs" dt-bindings: virtio,mmio: Allow setting devices 'dma-coherent' dt-bindings: gnss: Add two more chips dt-bindings: gnss: Rewrite sirfstar binding in YAML dt-bindings: gnss: Modify u-blox to use common bindings dt-bindings: gnss: Rewrite common bindings in YAML dt-bindings: ata: ahci-platform: Add rk3568-dwc-ahci compatible dt-bindings: ata: ahci-platform: Add power-domains property dt-bindings: ata: ahci-platform: Convert DT bindings to yaml dt-bindings: kbuild: Use DTB files for validation dt-bindings: kbuild: Pass DT_SCHEMA_FILES to dt-validate dt-bindings: Add QEMU virt machine compatible dt-bindings: arm: Convert QEMU fw-cfg to DT schema dt-bindings: i2c: at91: Add SAMA7G5 compatible strings list dt-bindings: i2c: convert i2c-at91 to json-schema ...
2022-02-14dt-bindings: iommu: renesas,ipmmu-vmsa: add r8a779f0 supportYoshihiro Shimoda1-0/+4
Document the compatible values for the IPMMU-VMSA blocks in the Renesas R-Car S4-8 (R8A779F0) SoC and R-Car Gen4. Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20220208002030.1319984-2-yoshihiro.shimoda.uh@renesas.com Signed-off-by: Joerg Roedel <jroedel@suse.de>
2022-02-04dt-bindings: Improve phandle-array schemasRob Herring2-2/+10
The 'phandle-array' type is a bit ambiguous. It can be either just an array of phandles or an array of phandles plus args. Many schemas for phandle-array properties aren't clear in the schema which case applies though the description usually describes it. The array of phandles case boils down to needing: items: maxItems: 1 The phandle plus args cases should typically take this form: items: - items: - description: A phandle - description: 1st arg cell - description: 2nd arg cell With this change, some examples need updating so that the bracketing of property values matches the schema. Signed-off-by: Rob Herring <robh@kernel.org> Acked-by: Viresh Kumar <viresh.kumar@linaro.org> Acked-by: Vinod Koul <vkoul@kernel.org> Acked-by: Ulf Hansson <ulf.hansson@linaro.org> Acked-by: Georgi Djakov <djakov@kernel.org> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Mark Brown <broonie@kernel.org> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> Acked-by: Stephen Boyd <sboyd@kernel.org> Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Acked-by: Marc Kleine-Budde <mkl@pengutronix.de> Link: https://lore.kernel.org/r/20220119015038.2433585-1-robh@kernel.org
2022-01-13Merge tag 'iommu-updates-v5.17' of ↵Linus Torvalds1-0/+2
git://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu Pull iommu updates from Joerg Roedel: - Identity domain support for virtio-iommu - Move flush queue code into iommu-dma - Some fixes for AMD IOMMU suspend/resume support when x2apic is used - Arm SMMU Updates from Will Deacon: - Revert evtq and priq back to their former sizes - Return early on short-descriptor page-table allocation failure - Fix page fault reporting for Adreno GPU on SMMUv2 - Make SMMUv3 MMU notifier ops 'const' - Numerous new compatible strings for Qualcomm SMMUv2 implementations - Various smaller fixes and cleanups * tag 'iommu-updates-v5.17' of git://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu: (38 commits) iommu/iova: Temporarily include dma-mapping.h from iova.h iommu: Move flush queue data into iommu_dma_cookie iommu/iova: Move flush queue code to iommu-dma iommu/iova: Consolidate flush queue code iommu/vt-d: Use put_pages_list iommu/amd: Use put_pages_list iommu/amd: Simplify pagetable freeing iommu/iova: Squash flush_cb abstraction iommu/iova: Squash entry_dtor abstraction iommu/iova: Fix race between FQ timeout and teardown iommu/amd: Fix typo in *glues … together* in comment iommu/vt-d: Remove unused dma_to_mm_pfn function iommu/vt-d: Drop duplicate check in dma_pte_free_pagetable() iommu/vt-d: Use bitmap_zalloc() when applicable iommu/amd: Remove useless irq affinity notifier iommu/amd: X2apic mode: mask/unmask interrupts on suspend/resume iommu/amd: X2apic mode: setup the INTX registers on mask/unmask iommu/amd: X2apic mode: re-enable after resume iommu/amd: Restore GA log/tail pointer on host resume iommu/iova: Move fast alloc size roundup into alloc_iova_fast() ...
2021-12-14dt-bindings: arm-smmu: Add compatible for SM8450 SoCVinod Koul1-0/+1
Add the SoC specific compatible for SM8450 implementing arm,mmu-500. Signed-off-by: Vinod Koul <vkoul@kernel.org> Acked-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20211201073943.3969549-2-vkoul@kernel.org Signed-off-by: Will Deacon <will@kernel.org>
2021-12-14dt-bindings: arm-smmu: Add compatible for the SDX55 SoCDavid Heidelberg1-0/+1
Add missing compatible for the SDX55 SoC. Signed-off-by: David Heidelberg <david@ixit.cz> Link: https://lore.kernel.org/r/20211020231701.278846-1-david@ixit.cz Signed-off-by: Will Deacon <will@kernel.org>
2021-12-02dt-bindings: iommu: apple,dart: Add power-domains propertyHector Martin1-0/+3
This will bind to the PMGR pwrstate nodes that control power/clock gating to SoC blocks. The DART driver doesn't do runtime-pm yet, so initially this will just keep the domain on permanently. Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Hector Martin <marcan@marcan.st>
2021-11-01Merge branches 'apple/dart', 'arm/mediatek', 'arm/renesas', 'arm/smmu', ↵Joerg Roedel2-0/+3
'arm/tegra', 'iommu/fixes', 'x86/amd', 'x86/vt-d' and 'core' into next
2021-10-04dt-bindings: arm-smmu: Add compatible for QCM2290 SoCLoic Poulain1-0/+1
Add the SoC specific compatible for QCM2290 implementing arm,mmu-500. Signed-off-by: Loic Poulain <loic.poulain@linaro.org> Link: https://lore.kernel.org/r/1633096832-7762-2-git-send-email-loic.poulain@linaro.org [will: Sort by alphabetical order, rewrite commit message] Signed-off-by: Will Deacon <will@kernel.org>
2021-10-04dt-bindings: arm-smmu: Add compatible for SM6350 SoCKonrad Dybcio1-0/+1
Add the SoC specific compatible for SM6350 implementing arm,mmu-500. Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org> Acked-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20210820202906.229292-1-konrad.dybcio@somainline.org Signed-off-by: Will Deacon <will@kernel.org>
2021-09-28dt-bindings: iommu: renesas,ipmmu-vmsa: add r8a779a0 supportYoshihiro Shimoda1-0/+1
Add support for r8a779a0 (R-Car V3U). Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Acked-by: Rob Herring <robh@kernel.org> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/20210907083020.907648-2-yoshihiro.shimoda.uh@renesas.com Signed-off-by: Joerg Roedel <jroedel@suse.de>
2021-08-12dt-bindings: iommu: add DART iommu bindingsSven Peter1-0/+81
DART (Device Address Resolution Table) is the iommu found on Apple ARM SoCs such as the M1. Reviewed-by: Rob Herring <robh@kernel.org> Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Signed-off-by: Sven Peter <sven@svenpeter.dev> Link: https://lore.kernel.org/r/20210803121651.61594-3-sven@svenpeter.dev Signed-off-by: Joerg Roedel <jroedel@suse.de>
2021-07-18Merge tag 'soc-fixes-5.14-1' of ↵Linus Torvalds1-4/+2
git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc Pull ARM SoC fixes from Arnd Bergmann: "Here are the patches for this week that came as the fallout of the merge window: - Two fixes for the NVidia memory controller driver - multiple defconfig files get patched to turn CONFIG_FB back on after that is no longer selected by CONFIG_DRM - ffa and scmpi firmware drivers fixes, mostly addressing compiler and documentation warnings - Platform specific fixes for device tree files on ASpeed, Renesas and NVidia SoC, mostly for recent regressions. - A workaround for a regression on the USB PHY with devlink when the usb-nop-xceiv driver is not available until the rootfs is mounted. - Device tree compiler warnings in Arm Versatile-AB" * tag 'soc-fixes-5.14-1' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (35 commits) ARM: dts: versatile: Fix up interrupt controller node names ARM: multi_v7_defconfig: Make NOP_USB_XCEIV driver built-in ARM: configs: Update u8500_defconfig ARM: configs: Update Vexpress defconfig ARM: configs: Update Versatile defconfig ARM: configs: Update RealView defconfig ARM: configs: Update Integrator defconfig arm: Typo s/PCI_IXP4XX_LEGACY/IXP4XX_PCI_LEGACY/ firmware: arm_scmi: Fix range check for the maximum number of pending messages firmware: arm_scmi: Avoid padding in sensor message structure firmware: arm_scmi: Fix kernel doc warnings about return values firmware: arm_scpi: Fix kernel doc warnings firmware: arm_scmi: Fix kernel doc warnings ARM: shmobile: defconfig: Restore graphical consoles firmware: arm_ffa: Fix a possible ffa_linux_errmap buffer overflow firmware: arm_ffa: Fix the comment style firmware: arm_ffa: Simplify probe function firmware: arm_ffa: Ensure drivers provide a probe function firmware: arm_scmi: Fix possible scmi_linux_errmap buffer overflow firmware: arm_scmi: Ensure drivers provide a probe function ...
2021-07-16Merge tag 'memory-controller-drv-tegra-5.14-3' of ↵Arnd Bergmann1-4/+2
git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-mem-ctrl into arm/fixes Memory controller drivers for v5.14 - Tegra SoC, late fixes Two fixes for recent series of changes in Tegra SoC memory controller drivers: 1. Add a stub for tegra_mc_probe_device() to fix compile testing of arm-smmu without TEGRA_MC. 2. Fix arm-smmu dtschema syntax. * tag 'memory-controller-drv-tegra-5.14-3' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-mem-ctrl: dt-bindings: arm-smmu: Fix json-schema syntax memory: tegra: Add compile-test stub for tegra_mc_probe_device() Link: https://lore.kernel.org/r/20210625073604.13562-1-krzysztof.kozlowski@canonical.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-07-15dt-bindings: More dropping redundant minItems/maxItemsRob Herring1-2/+0
Another round of removing redundant minItems/maxItems from new schema in the recent merge window. If a property has an 'items' list, then a 'minItems' or 'maxItems' with the same size as the list is redundant and can be dropped. Note that is DT schema specific behavior and not standard json-schema behavior. The tooling will fixup the final schema adding any unspecified minItems/maxItems. This condition is partially checked with the meta-schema already, but only if both 'minItems' and 'maxItems' are equal to the 'items' length. An improved meta-schema is pending. Cc: Stephen Boyd <sboyd@kernel.org> Cc: Joerg Roedel <joro@8bytes.org> Cc: Will Deacon <will@kernel.org> Cc: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> Cc: Miquel Raynal <miquel.raynal@bootlin.com> Cc: Richard Weinberger <richard@nod.at> Cc: Vignesh Raghavendra <vigneshr@ti.com> Cc: Alessandro Zummo <a.zummo@towertech.it> Cc: Alexandre Belloni <alexandre.belloni@bootlin.com> Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Cc: Sureshkumar Relli <naga.sureshkumar.relli@xilinx.com> Cc: Brian Norris <computersforpeace@gmail.com> Cc: Kamal Dasu <kdasu.kdev@gmail.com> Cc: Linus Walleij <linus.walleij@linaro.org> Cc: Sebastian Siewior <bigeasy@linutronix.de> Cc: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Cc: linux-clk@vger.kernel.org Cc: iommu@lists.linux-foundation.org Cc: linux-mtd@lists.infradead.org Cc: linux-rtc@vger.kernel.org Cc: linux-usb@vger.kernel.org Signed-off-by: Rob Herring <robh@kernel.org> Reviewed-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Acked-by: Alexandre Belloni <alexandre.belloni@bootlin.com> Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Link: https://lore.kernel.org/r/20210713193453.690290-1-robh@kernel.org
2021-07-10Merge tag 'arm-drivers-5.14' of ↵Linus Torvalds1-2/+9
git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc Pull ARM driver updates from Olof Johansson: - Reset controllers: Adding support for Microchip Sparx5 Switch. - Memory controllers: ARM Primecell PL35x SMC memory controller driver cleanups and improvements. - i.MX SoC drivers: Power domain support for i.MX8MM and i.MX8MN. - Rockchip: RK3568 power domains support + DT binding updates, cleanups. - Qualcomm SoC drivers: Amend socinfo with more SoC/PMIC details, including support for MSM8226, MDM9607, SM6125 and SC8180X. - ARM FFA driver: "Firmware Framework for ARMv8-A", defining management interfaces and communication (including bus model) between partitions both in Normal and Secure Worlds. - Tegra Memory controller changes, including major rework to deal with identity mappings at boot and integration with ARM SMMU pieces. * tag 'arm-drivers-5.14' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (120 commits) firmware: turris-mox-rwtm: add marvell,armada-3700-rwtm-firmware compatible string firmware: turris-mox-rwtm: show message about HWRNG registration firmware: turris-mox-rwtm: fail probing when firmware does not support hwrng firmware: turris-mox-rwtm: report failures better firmware: turris-mox-rwtm: fix reply status decoding function soc: imx: gpcv2: add support for i.MX8MN power domains dt-bindings: add defines for i.MX8MN power domains firmware: tegra: bpmp: Fix Tegra234-only builds iommu/arm-smmu: Use Tegra implementation on Tegra186 iommu/arm-smmu: tegra: Implement SID override programming iommu/arm-smmu: tegra: Detect number of instances at runtime dt-bindings: arm-smmu: Add Tegra186 compatible string firmware: qcom_scm: Add MDM9607 compatible soc: qcom: rpmpd: Add MDM9607 RPM Power Domains soc: renesas: Add support to read LSI DEVID register of RZ/G2{L,LC} SoC's soc: renesas: Add ARCH_R9A07G044 for the new RZ/G2L SoC's dt-bindings: soc: rockchip: drop unnecessary #phy-cells from grf.yaml memory: emif: remove unused frequency and voltage notifiers memory: fsl_ifc: fix leak of private memory on probe failure memory: fsl_ifc: fix leak of IO mapping on probe failure ...
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