index
:
starfive-tech/linux.git
JH7100_VisionFive_OH_dev
JH7110_VisionFive2_510_devel
JH7110_VisionFive2_6.1.y_devel
JH7110_VisionFive2_6.6.y_devel
JH7110_VisionFive2_devel
JH7110_VisionFive2_upstream
beaglev-5.13.y
beaglev_fedora_devel
buildroot-upstream
esmil_starlight
fedora-vic-7100_5.10.6
master
openwrt-6.1.y
rt-ethercat-release
rt-linux-release
rtthread_AMP
starfive-5.13
starfive-5.15-dubhe
starfive-6.1-dubhe
starfive-6.1.65-dubhe
starfive-6.6.10-dubhe
starfive-6.6.31-dubhe
starlight-5.14.y
visionfive
visionfive-5.13.y-devel
visionfive-5.15.y
visionfive-5.15.y-devel
visionfive-5.15.y_fedora_devel
visionfive-5.16.y
visionfive-5.17.y
visionfive-5.18.y
visionfive-5.19.y
visionfive-6.4.y
visionfive_fedora_devel
StarFive Tech Linux Kernel for VisionFive (JH7110) boards (mirror)
Andrey V.Kosteltsev
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path:
root
/
arch
/
arc
/
include
/
asm
/
entry-compact.h
Age
Commit message (
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)
Author
Files
Lines
2020-10-06
ARC: [plat-eznps]: Drop support for EZChip NPS platform
Vineet Gupta
1
-27
/
+0
2019-10-28
ARCv2: mm: TLB Miss optim: SMP builds can cache pgd pointer in mmu scratch reg
Vineet Gupta
1
-2
/
+2
2019-07-08
ARC: entry: EV_Trap expects r10 (vs. r9) to have exception cause
Vineet Gupta
1
-2
/
+2
2019-06-19
treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 500
Thomas Gleixner
1
-4
/
+1
2018-07-09
ARC: [arcompact] entry.S: minor code movement
Vineet Gupta
1
-0
/
+6
2017-08-29
ARC: [plat-eznps] handle extra aux regs #2: kernel/entry exit
Liav Rehana
1
-0
/
+24
2016-05-30
Fix typos
Andrea Gelmini
1
-2
/
+2
2016-05-09
ARC: [plat-eznps] Use dedicated identity auxiliary register.
Noam Camus
1
-0
/
+6
2016-03-11
ARC: Fix misspellings in comments.
Adam Buchbinder
1
-1
/
+1
2015-10-17
ARC: [arcompact] entry.S: Improve early return from exception
Vineet Gupta
1
-7
/
+6
2015-06-19
ARC: intc: split into ARCompact ISA specific, common bits
Vineet Gupta
1
-0
/
+1
2015-06-19
ARC: entry.S: [arcompact] simplify SWITCH_TO_KERNEL_STK
Vineet Gupta
1
-36
/
+35
2015-06-19
ARC: entry.S: micro-optimize Trap handler
Vineet Gupta
1
-2
/
+3
2015-06-19
ARC: entry.S: split into ARCompact ISA specific, common bits
Vineet Gupta
1
-0
/
+306