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2023-12-17arm64: dts: qcom: sm8550: drop unneeded assigned-clocks from codec macrosKrzysztof Kozlowski1-14/+0
The MCLK clocks of codec macros have fixed 19.2 MHz frequency and assigning clock rates is redundant. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Link: https://lore.kernel.org/r/20231213162856.188566-5-krzysztof.kozlowski@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-12-17arm64: dts: qcom: sm8550: move Soundwire pinctrl to its nodesKrzysztof Kozlowski1-8/+12
Pin configuration for Soundwire bus should be set in Soundwire controller nodes, not in the associated macro codec node. This placement change should not have big impact in general, because macro codec is a clock provider for Soundwire controller, thus its devices is probed first. However it will have impact for disabled Soundwire buses, e.g. WSA2, because after this change the pins will be left in default state. We also follow similar approach in newer SoCs, like Qualcomm SM8650. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Link: https://lore.kernel.org/r/20231213162856.188566-4-krzysztof.kozlowski@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-12-17arm64: dts: qcom: sm8450: drop unneeded assigned-clocks from codec macrosKrzysztof Kozlowski1-16/+0
The MCLK clocks of codec macros have fixed 19.2 MHz frequency and assigning clock rates is redundant. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Link: https://lore.kernel.org/r/20231213162856.188566-3-krzysztof.kozlowski@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-12-17arm64: dts: qcom: sm8450: move Soundwire pinctrl to its nodesKrzysztof Kozlowski1-8/+12
Pin configuration for Soundwire bus should be set in Soundwire controller nodes, not in the associated macro codec node. This placement change should not have big impact in general, because macro codec is a clock provider for Soundwire controller, thus its devices is probed first. However it will have impact for disabled Soundwire buses, e.g. WSA2, because after this change the pins will be left in default state. We also follow similar approach in newer SoCs, like Qualcomm SM8650. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Link: https://lore.kernel.org/r/20231213162856.188566-2-krzysztof.kozlowski@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-12-17arm64: dts: qcom: sm8550: add missing two RX Soundwire ports in configurationKrzysztof Kozlowski1-12/+12
The Qualcomm SM8550 RX Soundwire port configuration was taken from downstream sources ("rx_frame_params_default"), but without two ports. Correct the DTS, even though no practical impact was observed. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Link: https://lore.kernel.org/r/20231212185415.228003-1-krzysztof.kozlowski@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-12-17arm64: dts: qcom: sm8650: drop unneeded assigned-clocks from WSA macroKrzysztof Kozlowski1-3/+0
Review of v1 patch resulting in commit 58872a54e4a8 ("arm64: dts: qcom: sm8650: add ADSP audio codec macros") pointed to remove unneeded assigned-clock-rates from macro codecs. One assignment was left in WSA macro codec, so drop it now as it is redundant: these clocks have fixed 19.2 MHz frequency. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/20231212133143.100575-1-krzysztof.kozlowski@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-12-17arm64: dts: qcom: sm6115: Hook up interconnectsKonrad Dybcio1-0/+277
Add interconnect provider nodes and hook up interconnects to consumer devices, including bwmon. Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/20231209-topic-6115iccdt-v1-2-f62da62b7276@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-12-16arm64: dts: qcom: ipq8074: add dedicated SDHCI compatibleKrzysztof Kozlowski1-1/+1
Add dedicated compatible for the SDHCI MMC controller, because usage of generic qcom,sdhci-msm-v4 compatible alone is deprecated. Cc: Chukun Pan <amadeus@jmu.edu.cn> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/20231211085830.25380-3-krzysztof.kozlowski@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-12-16arm64: dts: qcom: Fix coresight warnings in in-ports and out-portsMao Jinlong3-28/+6
When a node is only one in port or one out port, address-cells and size-cells are not required in in-ports and out-ports. And the number and reg of the port need to be removed. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Mao Jinlong <quic_jinlmao@quicinc.com> Link: https://lore.kernel.org/r/20231210072633.4243-5-quic_jinlmao@quicinc.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-12-16arm64: dts: qcom: msm8998: Fix 'out-ports' is a required propertyMao Jinlong1-12/+20
out-ports is a required property for coresight ETM. Add out-ports for ETM nodes to fix the warning. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Mao Jinlong <quic_jinlmao@quicinc.com> Link: https://lore.kernel.org/r/20231210072633.4243-4-quic_jinlmao@quicinc.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-12-16arm64: dts: qcom: msm8996: Fix 'in-ports' is a required propertyMao Jinlong1-0/+21
Add the inport of funnel@3023000 to fix 'in-ports' is a required property warning. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Mao Jinlong <quic_jinlmao@quicinc.com> Link: https://lore.kernel.org/r/20231210072633.4243-3-quic_jinlmao@quicinc.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-12-16arm64: dts: qcom: qrb5165-rb5: add the Bluetooth nodeBartosz Golaszewski1-0/+29
Add the Bluetooth node for RB5 as well as its dependencies in the form of the uart6 -> serial1 alias and the pin function for the Bluetooth enable GPIO. Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20231207090706.19134-1-brgl@bgdev.pl Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-12-16arm64: dts: qcom: sa8775p: Add missing space between node name and bracesManivannan Sadhasivam1-2/+2
Add missing space between node name and braces to match the style. Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Link: https://lore.kernel.org/r/20231206135540.17068-4-manivannan.sadhasivam@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-12-16arm64: dts: qcom: Use "pcie" as the node name instead of "pci"Manivannan Sadhasivam13-25/+25
Qcom SoCs doesn't support the legacy PCI, but only PCIe. So use the correct node name for the controller instances. Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Link: https://lore.kernel.org/r/20231206135540.17068-3-manivannan.sadhasivam@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-12-16arm64: dts: qcom: acer-aspire1: Add soundNikita Travkin1-0/+153
This laptop has two i2s speakers; an i2s audio codec for the headset jack; two DMIC microphones in the lid and the displayport audio channel. This commit adds the audio node that describes all of the above with the exception of the DMICs that require in-SoC digital codec to be brought up, which will be done later. Note that the displayport channel is connected here for completeness, but the displayport can't be used yet since the HPD signal is created by the embedded controller, which will be added later. Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Nikita Travkin <nikita@trvn.ru> Link: https://lore.kernel.org/r/20231205-aspire1-sound-v2-3-443b7ac0a06f@trvn.ru Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-12-16arm64: dts: qcom: acer-aspire1: Correct audio codec definitionNikita Travkin1-2/+15
When initially added, a mistake was made in the definition of the codec. Despite the fact that the DMIC line is connected on the side of the codec chip, and relevant passive components, including 0-ohm resistors connecting the dmics, are present, the dmic line is still cut in another place on the board, which was overlooked. Correct this by replacing the dmic configuration with a comment describing this hardware detail. While at it, also add missing regulators definitions. This is not a functional change as all the relevant regulators were already added via the other rail supplies. Fixes: 4a9f8f8f2ada ("arm64: dts: qcom: Add Acer Aspire 1") Signed-off-by: Nikita Travkin <nikita@trvn.ru> Link: https://lore.kernel.org/r/20231205-aspire1-sound-v2-2-443b7ac0a06f@trvn.ru Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-12-16arm64: dts: qcom: acer-aspire1: Enable RTCNikita Travkin1-0/+4
pm6150 has a read-only RTC that can be used to keep the time with some extra userspace tools. Enable it. Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Nikita Travkin <nikita@trvn.ru> Link: https://lore.kernel.org/r/20231205-aspire1-sound-v2-1-443b7ac0a06f@trvn.ru Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-12-16arm64: dts: qcom: sm8450: switch UFS QMP PHY to new style of bindingsDmitry Baryshkov1-18/+10
Change the UFS QMP PHY to use newer style of QMP PHY bindings (single resource region, no per-PHY subnodes). Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20231205032552.1583336-10-dmitry.baryshkov@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-12-16arm64: dts: qcom: sm8350: switch UFS QMP PHY to new style of bindingsDmitry Baryshkov1-18/+10
Change the UFS QMP PHY to use newer style of QMP PHY bindings (single resource region, no per-PHY subnodes). Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20231205032552.1583336-9-dmitry.baryshkov@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-12-16arm64: dts: qcom: sm8250: switch UFS QMP PHY to new style of bindingsDmitry Baryshkov1-14/+6
Change the UFS QMP PHY to use newer style of QMP PHY bindings (single resource region, no per-PHY subnodes). Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20231205032552.1583336-8-dmitry.baryshkov@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-12-16arm64: dts: qcom: sm8150: switch UFS QMP PHY to new style of bindingsDmitry Baryshkov1-14/+6
Change the UFS QMP PHY to use newer style of QMP PHY bindings (single resource region, no per-PHY subnodes). Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20231205032552.1583336-7-dmitry.baryshkov@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-12-16arm64: dts: qcom: sm6350: switch UFS QMP PHY to new style of bindingsDmitry Baryshkov1-14/+4
Change the UFS QMP PHY to use newer style of QMP PHY bindings (single resource region, no per-PHY subnodes). Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20231205032552.1583336-6-dmitry.baryshkov@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-12-16arm64: dts: qcom: sm6115: switch UFS QMP PHY to new style of bindingsDmitry Baryshkov1-12/+5
Change the UFS QMP PHY to use newer style of QMP PHY bindings (single resource region, no per-PHY subnodes). Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20231205032552.1583336-5-dmitry.baryshkov@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-12-16arm64: dts: qcom: sdm845: switch UFS QMP PHY to new style of bindingsDmitry Baryshkov1-14/+5
Change the UFS QMP PHY to use newer style of QMP PHY bindings (single resource region, no per-PHY subnodes). Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20231205032552.1583336-4-dmitry.baryshkov@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-12-16arm64: dts: qcom: msm8998: switch UFS QMP PHY to new style of bindingsDmitry Baryshkov1-14/+4
Change the UFS QMP PHY to use newer style of QMP PHY bindings (single resource region, no per-PHY subnodes). Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20231205032552.1583336-3-dmitry.baryshkov@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-12-16arm64: dts: qcom: msm8996: switch UFS QMP PHY to new style of bindingsDmitry Baryshkov1-16/+9
Change the UFS QMP PHY to use newer style of QMP PHY bindings (single resource region, no per-PHY subnodes). Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20231205032552.1583336-2-dmitry.baryshkov@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-12-16arm64: dts: qcom: sm8450-hdk: Enable the A730 GPUKonrad Dybcio1-0/+8
Enable the GPU and provide a path for the ZAP blob. Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/20231127-topic-a7xx_dt-v2-6-2a437588e563@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-12-16arm64: dts: qcom: sm8550-mtp: Enable the A740 GPUKonrad Dybcio1-0/+8
Enable the GPU and provide a path for the ZAP blob. Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/20231127-topic-a7xx_dt-v2-5-2a437588e563@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-12-16arm64: dts: qcom: sm8550-qrd: Enable the A740 GPUKonrad Dybcio1-0/+8
Enable the GPU and provide a path for the ZAP blob. Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Tested-by: Neil Armstrong <neil.armstrong@linaro.org> # on SM8550-QRD Link: https://lore.kernel.org/r/20231127-topic-a7xx_dt-v2-4-2a437588e563@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-12-16arm64: dts: qcom: sm8550: Add GPU nodesKonrad Dybcio1-0/+166
Add the required nodes to support the A740 GPU. Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Tested-by: Neil Armstrong <neil.armstrong@linaro.org> # on SM8550-QRD Link: https://lore.kernel.org/r/20231127-topic-a7xx_dt-v2-3-2a437588e563@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-12-16arm64: dts: qcom: sm8450: Add GPU nodesKonrad Dybcio1-0/+202
Add the required nodes to support the A730 GPU. Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/20231127-topic-a7xx_dt-v2-2-2a437588e563@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-12-16arm64: dts: qcom: msm8939: Make blsp_dma controlled-remotelyStephan Gerhold1-0/+1
The blsp_dma controller is shared between the different subsystems, which is why it is already initialized by the firmware. We should not reinitialize it from Linux to avoid potential other users of the DMA engine to misbehave. In mainline this can be described using the "qcom,controlled-remotely" property. In the downstream/vendor kernel from Qualcomm there is an opposite "qcom,managed-locally" property. This property is *not* set for the qcom,sps-dma@7884000 [1] so adding "qcom,controlled-remotely" upstream matches the behavior of the downstream/vendor kernel. Adding this seems to fix some weird issues with UART where both input/output becomes garbled with certain obscure firmware versions on some devices. [1]: https://git.codelinaro.org/clo/la/kernel/msm-3.10/-/blob/LA.BR.1.2.9.1-02310-8x16.0/arch/arm/boot/dts/qcom/msm8939-common.dtsi#L866-872 Cc: stable@vger.kernel.org # 6.5 Fixes: 61550c6c156c ("arm64: dts: qcom: Add msm8939 SoC") Signed-off-by: Stephan Gerhold <stephan@gerhold.net> Reviewed-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> Link: https://lore.kernel.org/r/20231204-msm8916-blsp-dma-remote-v1-2-3e49c8838c8d@gerhold.net Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-12-16arm64: dts: qcom: msm8916: Make blsp_dma controlled-remotelyStephan Gerhold1-0/+1
The blsp_dma controller is shared between the different subsystems, which is why it is already initialized by the firmware. We should not reinitialize it from Linux to avoid potential other users of the DMA engine to misbehave. In mainline this can be described using the "qcom,controlled-remotely" property. In the downstream/vendor kernel from Qualcomm there is an opposite "qcom,managed-locally" property. This property is *not* set for the qcom,sps-dma@7884000 [1] so adding "qcom,controlled-remotely" upstream matches the behavior of the downstream/vendor kernel. Adding this seems to fix some weird issues with UART where both input/output becomes garbled with certain obscure firmware versions on some devices. [1]: https://git.codelinaro.org/clo/la/kernel/msm-3.10/-/blob/LA.BR.1.2.9.1-02310-8x16.0/arch/arm/boot/dts/qcom/msm8916.dtsi#L1466-1472 Cc: stable@vger.kernel.org # 6.5 Fixes: a0e5fb103150 ("arm64: dts: qcom: Add msm8916 BLSP device nodes") Signed-off-by: Stephan Gerhold <stephan@gerhold.net> Reviewed-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> Link: https://lore.kernel.org/r/20231204-msm8916-blsp-dma-remote-v1-1-3e49c8838c8d@gerhold.net Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-12-16arm64: dts: qcom: msm8939: Add clock-frequency for broadcast timerStephan Gerhold1-0/+2
Looks like not all firmware versions used for MSM8939 program the timer frequency for both broadcast/MMIO timers, causing a WARNING at runtime: WARNING: CPU: 0 PID: 0 at kernel/time/clockevents.c:38 cev_delta2ns+0x74/0x90 pc : cev_delta2ns+0x74/0x90 lr : clockevents_config.part.0+0x64/0x8c Call trace: cev_delta2ns+0x74/0x90 clockevents_config_and_register+0x20/0x34 arch_timer_mem_of_init+0x374/0x534 timer_probe+0x88/0x110 time_init+0x14/0x4c start_kernel+0x2c0/0x640 Unfortunately there is no way to fix the firmware on most of these devices since it's proprietary and signed. As a workaround, specify the clock-frequency explicitly in the DT to fix the warning. Fixes: 61550c6c156c ("arm64: dts: qcom: Add msm8939 SoC") Reported-by: Vincent Knecht <vincent.knecht@mailoo.org> Signed-off-by: Stephan Gerhold <stephan@gerhold.net> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/20231204-msm8939-timer-v1-1-a2486c625786@gerhold.net Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-12-16arm64: dts: qcom: Add missing vio-supply for AW2013Stephan Gerhold5-0/+5
Add the missing vio-supply to all usages of the AW2013 LED controller to ensure that the regulator needed for pull-up of the interrupt and I2C lines is really turned on. While this seems to have worked fine so far some of these regulators are not guaranteed to be always-on. For example, pm8916_l6 is typically turned off together with the display if there aren't any other devices (e.g. sensors) keeping it always-on. Cc: stable@vger.kernel.org # 6.6 Signed-off-by: Stephan Gerhold <stephan@gerhold.net> Link: https://lore.kernel.org/r/20231204-qcom-aw2013-vio-v1-1-5d264bb5c0b2@gerhold.net Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-12-16arm64: dts: qcom: ipq6018: Add QUP5 SPI nodeChukun Pan1-0/+14
Add node to support the QUP5 SPI controller inside of IPQ6018. Some routers use this bus to connect SPI TPM chips. Signed-off-by: Chukun Pan <amadeus@jmu.edu.cn> Link: https://lore.kernel.org/r/20231203154003.532765-1-amadeus@jmu.edu.cn Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-12-16arm64: dts: qcom: ipq6018: Add remaining QUP UART nodeChukun Pan1-0/+50
Add node to support all the QUP UART node controller inside of IPQ6018. Some routers use these bus to connect Bluetooth chips. Signed-off-by: Chukun Pan <amadeus@jmu.edu.cn> Link: https://lore.kernel.org/r/20231203153914.532654-1-amadeus@jmu.edu.cn Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-12-16arm64: dts: qcom: qrb4210-rb2: Enable MPSS and Wi-FiKonrad Dybcio1-4/+20
Enable the remote processors and tighten up the regulators to enable Wi-Fi functionality on the RB2. For reference, the hw/sw identifies as: qmi chip_id 0x150 chip_family 0x4002 board_id 0xff soc_id 0x40670000 qmi fw_version 0x337302d3 fw_build_timestamp 2023-01-06 01:50 fw_build_id QC_IMAGE_VERSION_STRING=WLAN.HL.3.3.7.c2-00723-QCAHLSWMTPLZ-1 wcn3990 hw1.0 target 0x00000008 chip_id 0x00000000 sub 0000:0000 kconfig debug 0 debugfs 0 tracing 0 dfs 0 testmode 0 firmware ver api 5 features wowlan,mgmt-tx-by-reference,non-bmi crc32 b3d4b790 htt-ver 3.114 wmi-op 4 htt-op 3 cal file max-sta 32 raw 0 hwcrypto 1 Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/20231104-topic-rb2_wifi-v1-1-fd45ae535d2f@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-12-15arm64: dts: qcom: qrb5165-rb5: use u16 for DP altmode svidDmitry Baryshkov1-1/+1
Follow the bindings and use 16-bit value for AltMode SVID instead of using the full u32. Fixes: b3dea914127e ("arm64: dts: qcom: qrb5165-rb5: enable DP altmode") Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20231204020303.2287338-4-dmitry.baryshkov@linaro.org Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2023-12-09arm64: dts: qcom: qcm6490-fairphone-fp5: Enable WiFiLuca Weiss1-0/+5
Now that the WPSS remoteproc is enabled, enable wifi so we can use it. Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Luca Weiss <luca.weiss@fairphone.com> Link: https://lore.kernel.org/r/20231208-sc7280-remoteprocs-v3-11-6aa394d33edf@fairphone.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-12-09arm64: dts: qcom: qcm6490-fairphone-fp5: Enable various remoteprocsLuca Weiss1-0/+20
Enable the ADSP, CDSP, MPSS and WPSS that are found on the SoC. Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Luca Weiss <luca.weiss@fairphone.com> Link: https://lore.kernel.org/r/20231208-sc7280-remoteprocs-v3-10-6aa394d33edf@fairphone.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-12-09arm64: dts: qcom: sc7280: Add CDSP nodeLuca Weiss4-0/+151
Add the node for the ADSP found on the SC7280 SoC, using standard Qualcomm firmware. Remove the reserved-memory node from sc7280-chrome-common since CDSP is currently not used there. Acked-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Luca Weiss <luca.weiss@fairphone.com> Link: https://lore.kernel.org/r/20231208-sc7280-remoteprocs-v3-9-6aa394d33edf@fairphone.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-12-09arm64: dts: qcom: sc7280: Add ADSP nodeLuca Weiss5-10/+76
Add the node for the ADSP found on the SC7280 SoC, using standard Qualcomm firmware. Acked-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Luca Weiss <luca.weiss@fairphone.com> Link: https://lore.kernel.org/r/20231208-sc7280-remoteprocs-v3-8-6aa394d33edf@fairphone.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-12-09arm64: dts: qcom: sc7280: Use WPSS PAS instead of PILLuca Weiss2-13/+21
The wpss-pil driver wants to manage too many resources that cannot be touched with standard Qualcomm firmware. Use the compatible from the PAS driver and move the ChromeOS-specific bits to sc7280-chrome-common.dtsi. Signed-off-by: Luca Weiss <luca.weiss@fairphone.com> Link: https://lore.kernel.org/r/20231208-sc7280-remoteprocs-v3-7-6aa394d33edf@fairphone.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-12-09arm64: dts: qcom: qcm6490-fairphone-fp5: Enable UFSLuca Weiss1-2/+25
Enable the UFS phy and controller so that we can access the internal storage of the phone. At the same time we need to bump the minimum voltage used for UFS VCC, otherwise it doesn't initialize properly. The 2.952V is taken from the vcc-voltage-level property downstream. See also the following link for more information about the VCCQ/VCCQ2: https://gerrit-public.fairphone.software/plugins/gitiles/kernel/msm-extra/devicetree/+/1590a3739e7dc29d2597307881553236d492f188/fp5/yupik-idp-pm7250b.dtsi#207 Signed-off-by: Luca Weiss <luca.weiss@fairphone.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/20231002-fp5-ufs-v2-1-e2d7de522134@fairphone.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-12-09arm64: dts: qcom: msm8953: Set initial address for memoryLuca Weiss1-2/+2
The dtbs_check really doesn't like having memory without reg set. The base address depends on the amount of RAM you have: <= 2.00 GiB RAM: 0x80000000 = 3.00 GiB RAM: 0x40000000 = 3.75 GiB RAM: 0x10000000 (more does not fit into the 32-bit physical address space) So, let's pick one of the values, 0x10000000 which is used on devices with 3.75 GiB RAM. Since the bootloader will update it to what's present on the device it doesn't matter too much. Signed-off-by: Luca Weiss <luca@z3ntu.xyz> Link: https://lore.kernel.org/r/20231125-msm8953-misc-fixes-v2-1-df86655841d9@z3ntu.xyz Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-12-09arm64: dts: qcom: sc7280: Add UFS nodes for sc7280 IDP boardNitin Rawat1-0/+19
Add UFS host controller and PHY nodes for sc7280 IDP board. Signed-off-by: Nitin Rawat <quic_nitirawa@quicinc.com> Acked-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Signed-off-by: Luca Weiss <luca.weiss@fairphone.com> Link: https://lore.kernel.org/r/20231205-sc7280-ufs-v6-3-ad6ca7796de7@fairphone.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-12-09arm64: dts: qcom: sc7280: Add UFS nodes for sc7280 socNitin Rawat1-1/+72
Add UFS host controller and PHY nodes for sc7280 soc. Signed-off-by: Nitin Rawat <quic_nitirawa@quicinc.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Tested-by: Konrad Dybcio <konrad.dybcio@linaro.org> [luca: various cleanups and additions as written in the cover letter] Signed-off-by: Luca Weiss <luca.weiss@fairphone.com> Acked-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Link: https://lore.kernel.org/r/20231205-sc7280-ufs-v6-2-ad6ca7796de7@fairphone.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-12-08arm64: dts: qcom: sm8650: Add DisplayPort device nodesNeil Armstrong1-2/+118
Declare the displayport controller present on the Qualcomm SM8650 SoC and connected to the USB3/DP Combo PHY. Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> Link: https://lore.kernel.org/r/20231208-topic-sm8650-upstream-dp-v2-1-69dab3d074e4@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-12-08arm64: dts: qcom: pm8550: drop PWM address/size cellsKrzysztof Kozlowski1-3/+0
The address/size cells in PWM node are needed only if individual LEDs are listed. If multi-led is used, then this leads to dtc W=1 warnings: pm8550.dtsi:65.19-73.5: Warning (avoid_unnecessary_addr_size): /soc@0/spmi@c400000/pmic@1/pwm: unnecessary #address-cells/#size-cells without "ranges" or child "reg" property Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20231208124332.48636-1-krzysztof.kozlowski@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
generated by cgit v1.2.3 (git 2.39.0) at 2024-09-20 04:19:48 +0300