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The property "snps,usb2_gadget_lpm_disable" is wrong.
It should be fixed to "snps,usb2-gadget-lpm-disable".
Cc: stable@vger.kernel.org
Fixes: 19fee1a1096d ("arm64: dts: uniphier: Add USB-device support for PXs3 reference board")
Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Link: https://lore.kernel.org/r/20230207021429.28925-1-hayashi.kunihiko@socionext.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Add sociopnext,syscon-uhs-mode prpperty to the SD node to refer the handle
of the control logic node.
Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Link: https://lore.kernel.org/r/20230207023514.29783-9-hayashi.kunihiko@socionext.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Add "syscon" compatible string to the nodes for soc-glue-debug
according to the DT schema.
Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Link: https://lore.kernel.org/r/20230207023514.29783-8-hayashi.kunihiko@socionext.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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The nodes for some glue layers don't include necessary reg properties.
Add the properties according to the DT schema.
Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Link: https://lore.kernel.org/r/20230207023514.29783-7-hayashi.kunihiko@socionext.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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with bindings
The node names for SoC-dependent controllers and PHYs should be
generic ones according to the DT schemas.
Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Link: https://lore.kernel.org/r/20230207023514.29783-6-hayashi.kunihiko@socionext.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Add a L2 cache node referenced from CPU nodes as the missing cache hierarchy
information because the following warning was issued.
cacheinfo: Unable to detect cache hierarchy for CPU 0
Early cacheinfo failed, ret = -2
Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Link: https://lore.kernel.org/r/20220913042321.4817-11-hayashi.kunihiko@socionext.com'
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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The generic platform driver pcie-designware-plat.c doesn't work for
UniPhier PCIe host controller, because the controller has some
necessary initialization sequence for the controller-specific logic.
Currently the controller doesn't use "snps,dw-pcie" compatible,
so this is no longer needed. Remove the compatible string from the
pcie node.
Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Link: https://lore.kernel.org/r/20220913042321.4817-10-hayashi.kunihiko@socionext.com'
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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To fix dtbs_check warning:
uniphier-ld20-akebi96.dt.yaml: opp-table0: $nodename:0: 'opp-table0' does not match '^opp-table(-[a-z0-9]+)?$'
From schema: Documentation/devicetree/bindings/opp/opp-v2.yaml
Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Link: https://lore.kernel.org/r/20220913042321.4817-9-hayashi.kunihiko@socionext.com'
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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PXs3 reference board can change each USB port 0 and 1 to device mode
with jumpers. Prepare devicetree sources for USB port 0 and 1.
This specifies dr_mode, pinctrl, and some quirks and removes nodes for
unused phys and vbus-supply properties.
Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Link: https://lore.kernel.org/r/20220913042321.4817-8-hayashi.kunihiko@socionext.com'
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Add ahci core controller and glue layer nodes including reset-controller
and sata-phy.
This supports for PXs3 and the boards.
Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Link: https://lore.kernel.org/r/20220913042321.4817-7-hayashi.kunihiko@socionext.com'
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Use human-readable definitions for GIC interrupt type and flag, instead of
hard-coding the numbers. No functional change.
Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Link: https://lore.kernel.org/r/20220913042321.4817-6-hayashi.kunihiko@socionext.com'
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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According to gpio-hog schema, should add the suffix "-hog" to the node
names including gpio-hog to fix the following warning.
uniphier-ld11-ref.dtb: gpio@55000000: 'xirq0' does not match any of the regexes: '^.+-hog(-[0-9+)?$', 'pinctrl-[0-9]+'
From schema: Documentation/devicetree/bindings/gpio/socionext,uniphier-gpio.yaml
This applies to the devicetre for LD11, LD20 and PXs3 SoCs.
Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Link: https://lore.kernel.org/r/20220913042321.4817-5-hayashi.kunihiko@socionext.com'
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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This "usb-glue" stands for an external controller associated with USB core,
however, this is not common. So rename to "usb-controller".
Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Link: https://lore.kernel.org/r/20220913042321.4817-4-hayashi.kunihiko@socionext.com'
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Actual phy nodes are each child node. The parent node should be
usb-controller node as a representation of the phy integration.
This applies to the devicetree for LD11 SoC.
Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Link: https://lore.kernel.org/r/20220913042321.4817-3-hayashi.kunihiko@socionext.com'
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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The pvtctl node belongs to thermal-sensor, so the node name should be
renamed to thermal-sensor.
Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Link: https://lore.kernel.org/r/20220913042321.4817-2-hayashi.kunihiko@socionext.com'
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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An interrupt for USB device are shared with USB host. Set interrupt-names
property to common "dwc_usb3" instead of "host" and "peripheral".
Cc: stable@vger.kernel.org
Fixes: d7b9beb830d7 ("arm64: dts: uniphier: Add USB3 controller nodes")
Reported-by: Ryuta NAKANISHI <nakanishi.ryuta@socionext.com>
Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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RTL8211E
UniPhier LD20 and PXs3 boards have RTL8211E ethernet phy, and the phy have
the RX/TX delays of RGMII interface using pull-ups on the RXDLY and TXDLY
pins.
After the commit bbc4d71d6354 ("net: phy: realtek: fix rtl8211e rx/tx
delay config"), the delays are working correctly, however, "rgmii" means
no delay and the phy doesn't work. So need to set the phy-mode to
"rgmii-id" to show that RX/TX delays are enabled.
Fixes: c73730ee4c9a ("arm64: dts: uniphier: add AVE ethernet node")
Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
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This adds missing clock-names and reset-names to pcie-phy node according to
Documentation/devicetree/bindings/phy/socionext,uniphier-pcie.yaml.
Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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This renames the node name "ethphy" to "ethernet-phy" according to
Documentation/devicetree/bindings/net/mdio.yaml.
Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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Add this to the aliases node to make it more convenient.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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Since commit e69f5dc623f9 ("dt-bindings: serial: Convert 8250 to
json-schema"), the schema for "ns16550a" is checked.
Since then, 'make ARCH=arm64 dtbs_check' is so noisy because the
required property 'interrupts' is missing.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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Add the device tree for Akebi96. Akebi96 is a 96boards certified
development board based on UniPhir LD20.
( https://www.96boards.org/product/akebi96/ )
This board has;
- MAX3421 USB-SPI chip on SPI port3 (for USB gadget port)
- Simple frame buffer with 1080p fixed resolution.
- I2S port which is connected to aout1b instead of aout1.
- 3 serial ports, only serial3 has CTS/RTS.
- No NAND, only eMMC on the board.
- OP-TEE installed firmware.
Signed-off-by: Masami Hiramatsu <masami.hiramatsu@linaro.org>
Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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Documentation/devicetree/bindings/spi/spi-uniphier.txt requires
#address-cells and #size-cells, but they are missing in actual DT files.
Also, 'make ARCH=arm64 dtbs_check' is really noisy.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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The RGMII PHY implemented in PXs3 ref board needs to change
drive-strength properties of the Ethernet Tx pins to stabilize the PHY.
Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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Add 'aliases' properties for ethernet device.
U-Boot performs a fix-up of the MAC address and will overwrite the values
from the Linux devicetree for aliased ethernet device. The MAC address can
be inherited from U-Boot by adding aliases of ethernet devices.
Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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Add external DMA controller support implemented in UniPhier SoCs.
This supports for LD11, LD20 and PXs3.
Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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Currently common clock and reset IDs were used, however, each clock and
reset ID should be used for each channel.
Fixes: 925c5c32f31d ("arm64: dts: uniphier: add SPI node for LD20, LD11 and PXs3")
Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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Add nodes of thermal monitor and thermal zone for UniPhier PXs3 SoC.
The thermal monitor node is included in sysctrl. This patch gives the
default value for PXs3 in the same way as LD20.
Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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PXs3 reference board has 2 spi connectors. This enables spi0 and spi1,
and adds aliases properties for each spi to determine device name
assignments.
Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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Follow the standard nodename pattern "^nand-controller(@.*)?" defined
in Documentation/devicetree/bindings/mtd/nand-controller.yaml
Otherwise, after the dt-binding is converted to json-schema,
'make ARCH=arm64 dtbs_check' will show warnings like this:
nand@68000000: $nodename:0: 'nand@68000000' does not match '^nand-controller(@.*)?'
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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Follow the standard nodename pattern "^interrupt-controller(@[0-9a-f,]+)*$"
defined in schemas/interrupt-controller.yaml of dt-schema.
Otherwise, after the dt-binding is converted to json-schema,
'make ARCH=arm64 dtbs_check' will show warnings like this:
aidet@5fc20000: $nodename:0: 'aidet@5fc20000' does not match '^interrupt-controller(@[0-9a-f,]+)*$'
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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Follow the standard nodename pattern "^mmc(@.*)?$" defined in
Documentation/devicetree/bindings/mmc/mmc-controller.yaml
Otherwise, after the dt-binding is converted to json-schema,
'make ARCH=arm64 dtbs_check' will show warnings like this:
sdhc@5a000000: $nodename:0: 'sdhc@5a000000' does not match '^mmc(@.*)?$'
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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The Denali NAND controller IP has separate reset control for the
controller core and registers.
Add the reset-names, and one more phandle accordingly. This is the
approved DT-binding.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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The memory regions specified by /memreserve/ are passed to
early_init_dt_reserve_memory_arch() with nomap=false, so it is
not suitable for reserving memory for Trusted Firmware-A etc.
Use the more robust /reserved-memory node with the no-map property
to prevent the kernel from mapping it.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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With commit d8e8fd0ebf8b ("mtd: rawnand: denali: decouple controller
and NAND chips"), the Denali NAND controller driver migrated to the
new controller/chip representation.
Update DT for it.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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git://git.kernel.org/pub/scm/linux/kernel/git/masahiroy/linux-uniphier into arm/dt
UniPhier ARM64 SoC DT updates for v5.1
- Add PCI Express controller nodes
* tag 'uniphier-dt64-v5.1' of git://git.kernel.org/pub/scm/linux/kernel/git/masahiroy/linux-uniphier:
arm64: dts: uniphier: sort labels in the same order as in dtsi
arm64: dts: uniphier: Add PCIe host controller and PHY nodes
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Sort the labels in the same order as in the corresponding dtsi file,
in other words, the order of reg address.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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Add PCIe host controller and PHY nodes. This supports for LD20, PXs3 and
their boards.
This node defines PCIe memory, I/O, and config spaces as follows.
MEM: 20000000-2ffdffff (255MB)
I/O: 2ffe0000-2ffeffff ( 64KB)
CFG: 2fff0000-2fffffff ( 64KB)
Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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The 'arm,armv8' compatible string is only for software models. It adds
little value otherwise and is inconsistently used as a fallback on some
platforms. Remove it from those platforms.
This fixes warnings generated by the DT schema.
Reported-by: Michal Simek <michal.simek@xilinx.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Will Deacon <will.deacon@arm.com>
Acked-by: Antoine Tenart <antoine.tenart@bootlin.com>
Acked-by: Nishanth Menon <nm@ti.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Acked-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Acked-by: Chanho Min <chanho.min@lge.com>
Acked-by: Krzysztof Kozlowski <krzk@kernel.org>
Acked-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: Gregory CLEMENT <gregory.clement@bootlin.com>
Acked-by: Thierry Reding <treding@nvidia.com>
Acked-by: Heiko Stuebner <heiko@sntech.de>
Acked-by: Simon Horman <horms+renesas@verge.net.au>
Acked-by: Tero Kristo <t-kristo@ti.com>
Acked-by: Wei Xu <xuwei5@hisilicon.com>
Acked-by: Liviu Dudau <liviu.dudau@arm.com>
Acked-by: Matthias Brugger <matthias.bgg@gmail.com>
Acked-by: Michal Simek <michal.simek@xilinx.com>
Acked-by: Scott Branden <scott.branden@broadcom.com>
Acked-by: Kevin Hilman <khilman@baylibre.com>
Acked-by: Chunyan Zhang <zhang.lyra@gmail.com>
Acked-by: Robert Richter <rrichter@cavium.com>
Acked-by: Jisheng Zhang <Jisheng.Zhang@synaptics.com>
Acked-by: Dinh Nguyen <dinguyen@kernel.org>
Signed-off-by: Rob Herring <robh@kernel.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Each CPU can (and does) participate in cooling down the system but the
DT only captures a handful of them, normally CPU0, in the cooling maps.
Things work by chance currently as under normal circumstances its the
first CPU of each cluster which is used by the operating systems to
probe the cooling devices. But as soon as this CPU ordering changes and
any other CPU is used to bring up the cooling device, we will start
seeing failures.
Also the DT is rather incomplete when we list only one CPU in the
cooling maps, as the hardware doesn't have any such limitations.
Update cooling maps to include all devices affected by individual trip
points.
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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Add nodes of USB2 physical layer for UniPhier SoC. This supports LD11.
Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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Add USB3 controller nodes including usb-core, resets, regulator, ss-phy
and hs-phy. This supports for LD20, PXs3 and the boards. This includes
additional efuse nodes for obtaining PHY trimming values.
Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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Add SD controller nodes for LD20 and PXs3.
LD20 does not support the UHS mode, while PXs3 supports it.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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Add nodes of SPI controller for UniPhier SoCs.
Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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Catch up with the new binding of the Denali IP where three clocks,
"nand", "nand_x", "ecc" are required.
For UniPhier SoCs, the "nand_x" and "ecc" are tied up because they
are both 200MHz.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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git://git.kernel.org/pub/scm/linux/kernel/git/masahiroy/linux-uniphier into next/dt
UniPhier ARM64 SoC DT updates for v4.19
- Add missing #cooling-cells properties
- Add hp-det-gpio property to detect headphone via GPIO
* tag 'uniphier-dt64-v4.19' of git://git.kernel.org/pub/scm/linux/kernel/git/masahiroy/linux-uniphier:
arm64: dts: uniphier: add headphone detect gpio for LD11 global board
arm64: dts: uniphier: add headphone detect gpio for LD20 global board
arm64: dts: uniphier: Add missing cooling device properties for CPUs
Signed-off-by: Olof Johansson <olof@lixom.net>
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This patch adds GPIO for headphone detection on LD11 global board.
Signed-off-by: Katsuhiro Suzuki <suzuki.katsuhiro@socionext.com>
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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This patch adds GPIO for headphone detection on LD20 global board.
Signed-off-by: Katsuhiro Suzuki <suzuki.katsuhiro@socionext.com>
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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The cooling device properties, like "#cooling-cells" and
"dynamic-power-coefficient", should either be present for all the CPUs
of a cluster or none. If these are present only for a subset of CPUs of
a cluster then things will start falling apart as soon as the CPUs are
brought online in a different order. For example, this will happen
because the operating system looks for such properties in the CPU node
it is trying to bring up, so that it can register a cooling device.
Add such missing properties.
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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This patch fixes wrong name of headphone widget for receiving events
of insert/remove headphone plug from simple-card or audio-graph-card.
If we use wrong widget name then we get warning messages such as
"asoc-audio-graph-card sound: ASoC: DAPM unknown pin Headphones"
when the plug is inserted or removed from headphone jack.
Fixes: fb21a0acaa2b7 ("arm64: dts: uniphier: add sound node")
Signed-off-by: Katsuhiro Suzuki <suzuki.katsuhiro@socionext.com>
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
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