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2024-03-01Merge tag 'ti-k3-dt-for-v6.9' of ↵Arnd Bergmann120-1399/+5235
https://git.kernel.org/pub/scm/linux/kernel/git/ti/linux into soc/dt TI K3 device tree updates for v6.9 New Features across family / New SoCs: - J722s SoC and board support with OSPI NOR, CPSW ethernet - Camera capture support on mulitple J7xx SoCs, AM68, AM69 and AM62P SoCs - Wave5 Encoder/Decoder support for J721s2, J784s4 and AM62P Generic Cleanups/Fixes: - Stop spliting single mbox items - Adds MIT license along with GPL-2.0 for all TI DTS files - Moves PCIe EP nodes in overlays - VTM Power domain fixups for J7xx SoCs - Conversion of mmio mux users to reg-mux where possible - Drops unnecessary UART pinmuxes on J7xx SoCs - MMC TAP value updates for AM64/AM62A/AM62P for improved stability - DSS register space updates for AM65/AM62/AM62A SoC specific Fixes/Features: J7200: - Adds CAN support - New compatible for J7200 to support IO wakeup AM62A - HDMI Display (DSS) support - Move to simple-bus for main_conf node - eMMC, additional MMC/SD instance support AM62 - move to simple-bus for main_conf node AM654 - IOT2050-SM board support - IOT2050 DT refractoring. AM64 - SolidRun AM642 HummingBoard-T support and its DT overlays - ICSSG Ethernet support and associated peripherals Board specific fixes/Features: - Beagle Play MDIO and USB node fixes - TPM support on k3-am642-phyboard-electra and verdin-am62-mallow - Phycore-am64 ADC - PCIe + USB2.0 SERDES and PCIe + USB3.0 SERDES card support - USB1 support on verdin-am62 * tag 'ti-k3-dt-for-v6.9' of https://git.kernel.org/pub/scm/linux/kernel/git/ti/linux: (126 commits) arm64: dts: ti: hummingboard-t: add overlays for m.2 pci-e and usb-3 arm64: dts: add description for solidrun am642 som and evaluation board dt-bindings: arm: ti: Add bindings for SolidRun AM642 HummingBoard-T arm64: dts: ti: k3-am62p: Add Wave5 Video Encoder/Decoder Node arm64: dts: ti: k3-j721s2-main: Add Wave5 Video Encoder/Decoder Node arm64: dts: ti: k3-j784s4: Add Wave5 Video Encoder/Decoder Node arm64: dts: ti: k3-am69-sk: Add support for OSPI flash arm64: dts: ti: k3-am69-sk: Enable CAN interfaces for AM69 SK board arm64: dts: ti: Enable overlays for SK-AM62P arm64: dts: ti: k3-am62p: Add nodes for CSI-RX arm64: dts: ti: k3-am62p: Add DMASS1 for CSI arm64: dts: ti: k3-am62p: Fix memory ranges for DMSS arm64: dts: ti: k3-j722s-evm: Enable OSPI NOR support arm64: dts: ti: k3-j722s-evm: Enable CPSW3G RGMII1 arm64: dts: ti: k3-j784s4-main: Fix mux-reg-masks in serdes_ln_ctrl arm64: dts: ti: k3-j721e: Fix mux-reg-masks in hbmc_mux arm64: dts: ti: Add common1 register space for AM62A SoC arm64: dts: ti: Add common1 register space for AM62x SoC arm64: dts: ti: Add common1 register space for AM65x SoC arm64: dts: ti: k3-am642-evm: add overlay for ICSSG1 2nd port ... Link: https://lore.kernel.org/r/e7e984db-47b9-404a-9471-5d2ed0effe1d@ti.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2024-02-26arm64: dts: ti: hummingboard-t: add overlays for m.2 pci-e and usb-3Josua Mayer3-0/+95
HummingBoard-T features two M.2 connectors labeled "M1" and "M2". The single SerDes lane of the SoC can be routed to either M1 pci-e signals, or M2 usb-3 signals by a gpio-controlled mux. Add overlays for each configuration. Signed-off-by: Josua Mayer <josua@solid-run.com> Link: https://lore.kernel.org/r/20240219-add-am64-som-v7-4-0e6e95b0a05d@solid-run.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2024-02-26arm64: dts: add description for solidrun am642 som and evaluation boardJosua Mayer3-0/+887
Add description for the SolidRun AM642 SoM, and HummingBoard-T evaluation board. The SoM features: - 1x cpsw ethernet with phy - 2x pru ethernet with phy - eMMC - spi flash (assembly option) Additionally microSD and usb-2.0 otg are included in the SoM description as they are supported boot sources for the SOC boot-rom. The Carrier provides: - 3x RJ45 connector - 2x M.2 connector - USB-2.0 Hub - USB-A Connector - LEDs - 2x CAN transceiver - 1x RS485 transceiver - sensors The M.2 connectors support either USB-3.1 or PCI-E depending on status of a mux. By default the mux is switched off. Signed-off-by: Josua Mayer <josua@solid-run.com> Link: https://lore.kernel.org/r/20240219-add-am64-som-v7-3-0e6e95b0a05d@solid-run.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2024-02-21arm64: dts: ti: k3-am62p: Add Wave5 Video Encoder/Decoder NodeBrandon Brnich1-0/+8
This patch adds support for the Wave521cl on the AM62P. Signed-off-by: Brandon Brnich <b-brnich@ti.com> Link: https://lore.kernel.org/r/20240220191413.3355007-4-b-brnich@ti.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2024-02-21arm64: dts: ti: k3-j721s2-main: Add Wave5 Video Encoder/Decoder NodeDarren Etheridge1-0/+8
Add the Chips and Media wave521cl video decoder/encoder node on J721S2. Signed-off-by: Darren Etheridge <detheridge@ti.com> Signed-off-by: Brandon Brnich <b-brnich@ti.com> Link: https://lore.kernel.org/r/20240220191413.3355007-3-b-brnich@ti.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2024-02-21arm64: dts: ti: k3-j784s4: Add Wave5 Video Encoder/Decoder NodeBrandon Brnich2-0/+18
This patch adds support for the Wave521cl on the J784S4-evm. Signed-off-by: Brandon Brnich <b-brnich@ti.com> Link: https://lore.kernel.org/r/20240220191413.3355007-2-b-brnich@ti.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2024-02-21arm64: dts: ti: k3-am69-sk: Add support for OSPI flashDasnavis Sabiya1-0/+81
AM69 SK has S28HS512T OSPI flash connected to MCU OSPI0. Enable support for the same. Also describe the partition information according to the offsets in the bootloader. Reviewed-by: Udit Kumar <u-kumar1@ti.com> Signed-off-by: Dasnavis Sabiya <sabiya.d@ti.com> Link: https://lore.kernel.org/r/20240220162527.663394-3-sabiya.d@ti.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2024-02-21arm64: dts: ti: k3-am69-sk: Enable CAN interfaces for AM69 SK boardDasnavis Sabiya1-0/+82
AM69 SK board has several CAN bus interfaces on both MCU and MAIN domains. This enables the CAN interfaces on MCU and MAIN domain. Reviewed-by: Udit Kumar <u-kumar1@ti.com> Signed-off-by: Dasnavis Sabiya <sabiya.d@ti.com> Link: https://lore.kernel.org/r/20240220162527.663394-2-sabiya.d@ti.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2024-02-21arm64: dts: ti: Enable overlays for SK-AM62PJai Luthra1-0/+10
Enable symbols so that overlays can be applied on the base DTB for SK-AM62P. Also compile-test known-to-work camera sensor overlays for OV5640 and IMX219. Reviewed-by: Vaishnav Achath <vaishnav.a@ti.com> Signed-off-by: Jai Luthra <j-luthra@ti.com> Link: https://lore.kernel.org/r/20240220-am62p_csi-v2-4-3e71d9945571@ti.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2024-02-21arm64: dts: ti: k3-am62p: Add nodes for CSI-RXJai Luthra1-0/+61
AM62P supports image capture via the MIPI CSI-2 protocol, it uses three IPs to achieve this: Cadence DPHY, Cadence CSI-RX, and TI's pixelgrabber wrapper on top. Add nodes for these IPs in the devicetree, and keep them disabled here, so these may be enabled by the sensor overlays. Reviewed-by: Vaishnav Achath <vaishnav.a@ti.com> Signed-off-by: Jai Luthra <j-luthra@ti.com> Link: https://lore.kernel.org/r/20240220-am62p_csi-v2-3-3e71d9945571@ti.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2024-02-21arm64: dts: ti: k3-am62p: Add DMASS1 for CSIJai Luthra1-0/+37
On AM62P, CSI-RX uses a dedicated BCDMA instance (DMASS1) for transferring captured camera frames to DDR, so enable it. Reviewed-by: Vaishnav Achath <vaishnav.a@ti.com> Signed-off-by: Jai Luthra <j-luthra@ti.com> Link: https://lore.kernel.org/r/20240220-am62p_csi-v2-2-3e71d9945571@ti.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2024-02-21arm64: dts: ti: k3-am62p: Fix memory ranges for DMSSJai Luthra1-1/+1
The INTR module for DMASS1 (CSI specific DMASS) is outside the currently available ranges, as it starts at 0x4e400000. So fix the ranges property to enable programming the interrupts correctly. Fixes: 29075cc09f43 ("arm64: dts: ti: Introduce AM62P5 family of SoCs") Reviewed-by: Vaishnav Achath <vaishnav.a@ti.com> Signed-off-by: Jai Luthra <j-luthra@ti.com> Link: https://lore.kernel.org/r/20240220-am62p_csi-v2-1-3e71d9945571@ti.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2024-02-21arm64: dts: ti: k3-j722s-evm: Enable OSPI NOR supportVaishnav Achath1-0/+79
J722S EVM has S28HS512T 64 MiB Octal SPI NOR flash connected to the OSPI interface, add support for the flash and describe the partition information as per bootloader. Signed-off-by: Vaishnav Achath <vaishnav.a@ti.com> Link: https://lore.kernel.org/r/20240219090435.934383-3-vaishnav.a@ti.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com> Reviewed-by: Udit Kumar <u-kumar1@ti.com>
2024-02-21arm64: dts: ti: k3-j722s-evm: Enable CPSW3G RGMII1Siddharth Vadapalli1-0/+53
Enable MAC Port 1 of CPSW3G instance of CPSW Ethernet Switch in RGMII-RXID mode of operation. Port 2 is not connected on the EVM, thus keep it disabled. Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com> Signed-off-by: Vaishnav Achath <vaishnav.a@ti.com> Link: https://lore.kernel.org/r/20240219090435.934383-2-vaishnav.a@ti.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com> Reviewed-by: Udit Kumar <u-kumar1@ti.com>
2024-02-21arm64: dts: ti: k3-j784s4-main: Fix mux-reg-masks in serdes_ln_ctrlChintan Vankar1-6/+6
Change offset in mux-reg-masks property for serdes_ln_ctrl node since reg-mux property is used in compatible. Fixes: 2765149273f4 ("mux: mmio: use reg property when parent device is not a syscon") Signed-off-by: Chintan Vankar <c-vankar@ti.com> Acked-by: Andrew Davis <afd@ti.com> Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com> Link: https://lore.kernel.org/r/20240213080348.248916-1-s-vadapalli@ti.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2024-02-21arm64: dts: ti: k3-j721e: Fix mux-reg-masks in hbmc_muxAndrew Davis1-2/+2
Change offset in mux-reg-masks property for hbmc_mux node since reg-mux property is used in compatible. While here, update the reg region to include 4 bytes as this is a 32bit register. Fixes: 2765149273f4 ("mux: mmio: use reg property when parent device is not a syscon") Suggested-by: Peter Rosin <peda@axentia.se> Signed-off-by: Andrew Davis <afd@ti.com> Link: https://lore.kernel.org/r/20240215141957.13775-1-afd@ti.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2024-02-19arm64: dts: ti: Add common1 register space for AM62A SoCDevarsh Thakkar1-2/+3
This adds common1 register space for AM62A SoC which is using TI's Keystone display hardware and supporting it as described in Documentation/devicetree/bindings/display/ti/ti,am65x-dss.yaml Fixes: 3618811657b3 ("arm64: dts: ti: k3-am62a-main: Add node for Display SubSystem (DSS)") Signed-off-by: Devarsh Thakkar <devarsht@ti.com> Reviewed-by: Tomi Valkeinen <tomi.valkeinen@ideasonboard.com> Reviewed-by: Aradhya Bhatia <a-bhatia1@ti.com> Link: https://lore.kernel.org/r/20240216062426.4170528-5-devarsht@ti.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2024-02-19arm64: dts: ti: Add common1 register space for AM62x SoCDevarsh Thakkar1-2/+3
This adds common1 register space for AM62x SoC which is using TI's Keystone display hardware and supporting it as described in Documentation/devicetree/bindings/display/ti/ti,am65x-dss.yaml Fixes: 8ccc1073c7bb ("arm64: dts: ti: k3-am62-main: Add node for DSS") Signed-off-by: Devarsh Thakkar <devarsht@ti.com> Reviewed-by: Tomi Valkeinen <tomi.valkeinen@ideasonboard.com> Reviewed-by: Aradhya Bhatia <a-bhatia1@ti.com> Link: https://lore.kernel.org/r/20240216062426.4170528-4-devarsht@ti.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2024-02-19arm64: dts: ti: Add common1 register space for AM65x SoCDevarsh Thakkar1-2/+3
This adds common1 register space for AM65x SoC which is using TI's Keystone display hardware and supporting it as described in Documentation/devicetree/bindings/display/ti/ti,am65x-dss.yaml Fixes: fc539b90eda2 ("arm64: dts: ti: am654: Add DSS node") Signed-off-by: Devarsh Thakkar <devarsht@ti.com> Reviewed-by: Tomi Valkeinen <tomi.valkeinen@ideasonboard.com> Reviewed-by: Aradhya Bhatia <a-bhatia1@ti.com> Link: https://lore.kernel.org/r/20240216062426.4170528-3-devarsht@ti.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2024-02-19arm64: dts: ti: k3-am642-evm: add overlay for ICSSG1 2nd portMD Danish Anwar3-1/+85
The am642-evm doesn't allow to enable 2 x CPSW3g ports and 2 x ICSSG1 ports all together, so base k3-am642-evm.dts enables by default 2 x CPSW3g ports and 1 x ICSSG1 ports, but it is also possible to support 1 x CPSW3g ports and 2 x ICSSG1 ports configuration. This patch adds overlay to support 1 x CPSW3g ports and 2 x ICSSG1 ports configuration: - Add label name 'mdio_mux_1' for 'mdio-mux-1' node so that the node 'mdio-mux-1' can be disabled in the overlay using the label name. - disable 2nd CPSW3g port - update CPSW3g pinmuxes to not use RGMII2 - disable mdio-mux-1 and define mdio-mux-2 to route ICSSG1 MDIO to the shared DP83869 PHY - add and enable ICSSG1 RGMII2 pinmuxes - enable ICSSG1 MII1 port Reviewed-by: Ravi Gunasekaran <r-gunasekaran@ti.com> Reviewed-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: MD Danish Anwar <danishanwar@ti.com> Link: https://lore.kernel.org/r/20240215103036.2825096-4-danishanwar@ti.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2024-02-19arm64: dts: ti: k3-am642-evm: add ICSSG1 Ethernet supportMD Danish Anwar1-0/+95
ICSSG1 provides dual Gigabit Ethernet support with proper FW loaded. The ICSSG1 MII0 (RGMII1) has DP83869 PHY attached to it. The ICSSG1 shares MII1 (RGMII2) PHY DP83869 with CPSW3g and it's assigned by default to CPSW3g. The MDIO access to MII1 (RGMII2) PHY DP83869 is controlled by MDIO bus switch and also assigned to CPSW3g. Therefore the ICSSG1 MII1 (RGMII2) port is kept disable and ICSSG1 is enabled in single MAC mode by default. Reviewed-by: Ravi Gunasekaran <r-gunasekaran@ti.com> Signed-off-by: MD Danish Anwar <danishanwar@ti.com> Link: https://lore.kernel.org/r/20240215103036.2825096-3-danishanwar@ti.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2024-02-19arm64: dts: ti: k3-am64-main: Add ICSSG IEP nodesSuman Anna1-0/+24
The ICSSG IP on AM64x SoCs have two Industrial Ethernet Peripherals (IEPs) to manage/generate Industrial Ethernet functions such as time stamping. Each IEP sub-module is sourced from an internal clock mux that can be derived from either of the IP instance's ICSSG_IEP_GCLK or from another internal ICSSG CORE_CLK mux. Add both the IEP nodes for both the ICSSG instances. The IEP clock is currently configured to be derived indirectly from the ICSSG_ICLK running at 250 MHz. Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: Suman Anna <s-anna@ti.com> Reviewed-by: Ravi Gunasekaran <r-gunasekaran@ti.com> Reviewed-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: MD Danish Anwar <danishanwar@ti.com> Link: https://lore.kernel.org/r/20240215103036.2825096-2-danishanwar@ti.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2024-02-19arm64: dts: ti: k3-am6*: Add bootph-all property in MMC nodeJudith Mendez2-0/+2
Add missing bootph-all property for AM62p MMC0 and AM64x MMC0 nodes. Signed-off-by: Judith Mendez <jm@ti.com> Tested-by: Wadim Egorov <w.egorov@phytec.de> Link: https://lore.kernel.org/r/20240213235701.2438513-10-jm@ti.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2024-02-19arm64: dts: ti: k3-am6*: Fix bus-width property in MMC nodesJudith Mendez6-7/+6
Move bus-width property to *main.dtsi, above the OTAP/ITAP delay values. While there is no error with where it is currently at, it is easier to read the MMC node if the bus-width property is located above the OTAP/ITAP delay values consistently across MMC nodes. Add missing bus-width for MMC2 in k3-am62-main. Signed-off-by: Judith Mendez <jm@ti.com> Tested-by: Wadim Egorov <w.egorov@phytec.de> Link: https://lore.kernel.org/r/20240213235701.2438513-9-jm@ti.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2024-02-19arm64: dts: ti: k3-am6*: Fix ti,clkbuf-sel property in MMC nodesJudith Mendez3-4/+5
Move ti,clkbuf-sel property above the OTAP/ITAP delay values. While there is no error with where it is currently at, it is easier to read the MMC node if ti,clkbuf-sel is located above the OTAP/ITAP delay values consistently across MMC nodes. Add missing ti,clkbuf-sel for MMC0 in k3-am64-main. Signed-off-by: Judith Mendez <jm@ti.com> Tested-by: Wadim Egorov <w.egorov@phytec.de> Link: https://lore.kernel.org/r/20240213235701.2438513-8-jm@ti.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2024-02-19arm64: dts: ti: k3-am6*: Remove DLL properties for soft PHYsJudith Mendez17-23/+0
Remove DLL properties which are not applicable for soft PHYs since these PHYs do not have a DLL to enable. Acked-by: Francesco Dolcini <francesco.dolcini@toradex.com> # Verdin AM62 Signed-off-by: Judith Mendez <jm@ti.com> Tested-by: Wadim Egorov <w.egorov@phytec.de> Link: https://lore.kernel.org/r/20240213235701.2438513-7-jm@ti.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2024-02-19arm64: dts: ti: k3-am62p: Add ITAP/OTAP values for MMCJudith Mendez2-4/+41
Add OTAP/ITAP values to enable HS400 timing for MMC0 and SDR104 timing for MMC1/MMC2. Remove no-1-8-v property to enable the highest speed mode possible. Update MMC OTAP/ITAP values according to the datasheet [0], refer to Table 7-79 for MMC0 and Table 7-97 for MMC1/MMC2. [0] https://www.ti.com/lit/ds/symlink/am62p.pdf Signed-off-by: Judith Mendez <jm@ti.com> Link: https://lore.kernel.org/r/20240213235701.2438513-6-jm@ti.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2024-02-19arm64: dts: ti: k3-am64-main: Fix ITAP/OTAP values for MMCJudith Mendez1-1/+8
Update MMC0/MMC1 OTAP/ITAP values according to the datasheet [0], refer to Table 7-68 for MMC0 and Table 7-77 for MMC1. [0] https://www.ti.com/lit/ds/symlink/am6442.pdf Fixes: 8abae9389bdb ("arm64: dts: ti: Add support for AM642 SoC") Signed-off-by: Judith Mendez <jm@ti.com> Tested-by: Wadim Egorov <w.egorov@phytec.de> Link: https://lore.kernel.org/r/20240213235701.2438513-5-jm@ti.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2024-02-19arm64: dts: ti: k3-am62a7-sk: Enable eMMC supportNitin Yadav1-0/+26
Add support for 32GB eMMC card on AM62A7 SK. Includes adding mmc0 pins settings. Add mmc0 alias for sdhci0 in k3-am62a7-sk.dts. Signed-off-by: Nitin Yadav <n-yadav@ti.com> Signed-off-by: Judith Mendez <jm@ti.com> Link: https://lore.kernel.org/r/20240213235701.2438513-4-jm@ti.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2024-02-19arm64: dts: ti: k3-am62a-main: Add sdhci2 instanceJudith Mendez1-0/+24
Add sdhci2 DT node in k3-am62a-main for mmc2. Add otap/itap values according to the datasheet[0], Refer to Table 7-97. [0] https://www.ti.com/lit/ds/symlink/am62a3.pdf Signed-off-by: Judith Mendez <jm@ti.com> Link: https://lore.kernel.org/r/20240213235701.2438513-3-jm@ti.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2024-02-19arm64: dts: ti: k3-am62a-main: Add sdhci0 instanceNitin Yadav1-0/+18
Add sdhci0 DT node in k3-am62a-main for eMMC support. Add otap/itap values according to the datasheet[0], refer to Table 7-79. [0] https://www.ti.com/lit/ds/symlink/am62a3.pdf Signed-off-by: Nitin Yadav <n-yadav@ti.com> Signed-off-by: Judith Mendez <jm@ti.com> Link: https://lore.kernel.org/r/20240213235701.2438513-2-jm@ti.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2024-02-19arm64: dts: ti: k3-j784s4-evm: Remove Pinmux for CTS and RTS in wkup_uart0Bhavya Kapoor1-2/+0
Only Tx and Rx Signal lines for wkup_uart0 are brought out on the J784S4 EVM from SoC, but CTS and RTS signal lines are not brought on the EVM. Thus, remove pinmux for CTS and RTS signal lines for wkup_uart0 in J784S4. Fixes: 6fa5d37a2f34 ("arm64: dts: ti: k3-j784s4-evm: Add mcu and wakeup uarts") Signed-off-by: Bhavya Kapoor <b-kapoor@ti.com> Link: https://lore.kernel.org/r/20240214105846.1096733-5-b-kapoor@ti.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2024-02-19arm64: dts: ti: k3-j721s2-common-proc-board: Remove Pinmux for CTS and RTS ↵Bhavya Kapoor1-2/+0
in wkup_uart0 Only Tx and Rx Signal lines for wkup_uart0 are brought out on the Common Proc Board through SoM, but CTS and RTS signal lines are not brought on the board. Thus, remove pinmux for CTS and RTS signal lines for wkup_uart0 in J721S2. Fixes: f5e9ee0b354a ("arm64: dts: ti: k3-j721s2-common-proc-board: Add uart pinmux") Signed-off-by: Bhavya Kapoor <b-kapoor@ti.com> Link: https://lore.kernel.org/r/20240214105846.1096733-4-b-kapoor@ti.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2024-02-19arm64: dts: ti: k3-j7200-common-proc-board: Remove clock-frequency from ↵Bhavya Kapoor1-1/+0
mcu_uart0 Clock-frequency property is already present in mcu_uart0 node of the k3-j7200-mcu-wakeup.dtsi file. Thus, remove redundant clock-frequency property from mcu_uart0 node. Fixes: 3709ea7f960e ("arm64: dts: ti: k3-j7200-common-proc-board: Add uart pinmux") Signed-off-by: Bhavya Kapoor <b-kapoor@ti.com> Link: https://lore.kernel.org/r/20240214105846.1096733-3-b-kapoor@ti.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2024-02-19arm64: dts: ti: k3-j7200-common-proc-board: Modify Pinmux for wkup_uart0 and ↵Bhavya Kapoor1-8/+9
mcu_uart0 WKUP_PADCONFIG registers for wkup_uart0 and mcu_uart0 lies under wkup_pmx2 for J7200. Thus, modify pinmux for both of them. Fixes: 3709ea7f960e ("arm64: dts: ti: k3-j7200-common-proc-board: Add uart pinmux") Signed-off-by: Bhavya Kapoor <b-kapoor@ti.com> Link: https://lore.kernel.org/r/20240214105846.1096733-2-b-kapoor@ti.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2024-02-19arm64: dts: ti: k3-j721e-sk: Add overlay for IMX219Vaishnav Achath2-0/+178
RPi v2 Camera (IMX219) is an 8MP camera that can be used with SK-AM69, J721E SK, and AM68 SK through the 22-pin CSI-RX connector. Add a reference overlay for dual IMX219 RPI camera v2 modules which can be used across AM68 SK, AM69 SK, TDA4VM SK boards that have a 15/22-pin FFC connector. Also enable build testing and symbols for all the three platforms. Signed-off-by: Vaishnav Achath <vaishnav.a@ti.com> Reviewed-by: Jai Luthra <j-luthra@ti.com> Link: https://lore.kernel.org/r/20240215085518.552692-10-vaishnav.a@ti.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2024-02-19arm64: dts: ti: k3-j784s4-main: Add CSI2RX capture nodesVaishnav Achath1-1/+182
J784S4 has three CSI2RX capture subsystem featuring Cadence CSI2RX, DPHY and TI's pixel grabbing wrapper. Add nodes for the same and keep them disabled by default. J784S4 uses a dedicated BCDMA instance for CSI-RX traffic, so enable that as well. J784S4 TRM (Section 12.7 Camera Subsystem): https://www.ti.com/lit/zip/spruj52 Signed-off-by: Vaishnav Achath <vaishnav.a@ti.com> Reviewed-by: Jai Luthra <j-luthra@ti.com> Link: https://lore.kernel.org/r/20240215085518.552692-9-vaishnav.a@ti.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2024-02-19arm64: dts: ti: k3-j721s2-main: Add CSI2RX capture nodesVaishnav Achath1-1/+122
J721S2 has two CSI2RX capture subsystem featuring Cadence CSI2RX, DPHY and TI's pixel grabbing wrapper. Add nodes for the same and keep them disabled by default. J721S2 uses a dedicated BCDMA instance for CSI-RX traffic, so enable that as well. J721S2 TRM (Section 12.7 Camera Subsystem): https://www.ti.com/lit/zip/spruj28 Signed-off-by: Vaishnav Achath <vaishnav.a@ti.com> Reviewed-by: Jai Luthra <j-luthra@ti.com> Link: https://lore.kernel.org/r/20240215085518.552692-8-vaishnav.a@ti.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2024-02-19arm64: dts: ti: k3-j721e-main: Add CSI2RX capture nodesVaishnav Achath1-0/+122
J721E has two CSI2RX capture subsystem featuring Cadence CSI2RX, DPHY and TI's pixel grabbing wrapper. Add nodes for the same and keep them disabled by default. J721E TRM (Section 12.7 Camera Subsystem): https://www.ti.com/lit/zip/spruil1 Signed-off-by: Vaishnav Achath <vaishnav.a@ti.com> Reviewed-by: Jai Luthra <j-luthra@ti.com> Link: https://lore.kernel.org/r/20240215085518.552692-7-vaishnav.a@ti.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2024-02-19arm64: dts: ti: k3-j721e-sk: Model CSI2RX connector muxVaishnav Achath1-2/+17
J721E SK has the CSI2RX routed to a MIPI CSI connector and to 15-pin RPi camera connector through an analog mux with GPIO control, model that so that an overlay can control the mux state according to connected cameras. Also provide labels to the I2C mux bus instances so that a generic overlay can be used across multiple platforms. J721E SK schematics: https://www.ti.com/lit/zip/sprr438 Signed-off-by: Vaishnav Achath <vaishnav.a@ti.com> Reviewed-by: Jai Luthra <j-luthra@ti.com> Link: https://lore.kernel.org/r/20240215085518.552692-6-vaishnav.a@ti.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2024-02-19arm64: dts: ti: k3-am69-sk: Enable camera peripheralsVaishnav Achath1-0/+51
CSI cameras are controlled using I2C. On AM69 Starter Kit, this is routed to I2C-1, so enable the instance, TCA9543 I2C switch and the TCA6408 GPIO expander on the bus. AM69 SK has the CSI2RX routed to a MIPI CSI connector and to 22-pin RPi camera connector through an analog mux with GPIO control, model that so that an overlay can control the mux state according to connected cameras. AM69 SK schematics: https://www.ti.com/lit/zip/sprr466 Signed-off-by: Vaishnav Achath <vaishnav.a@ti.com> Reviewed-by: Jai Luthra <j-luthra@ti.com> Link: https://lore.kernel.org/r/20240215085518.552692-5-vaishnav.a@ti.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2024-02-19arm64: dts: ti: k3-am68-sk-base-board: Enable camera peripheralsVaishnav Achath1-0/+50
CSI cameras are controlled using I2C. On AM68 Starter Kit, this is routed to I2C-1, so enable the instance and the TCA9543 I2C switch on the bus. AM68 SK schematics: https://www.ti.com/lit/zip/sprr463 Signed-off-by: Vaishnav Achath <vaishnav.a@ti.com> Reviewed-by: Jai Luthra <j-luthra@ti.com> Link: https://lore.kernel.org/r/20240215085518.552692-4-vaishnav.a@ti.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2024-02-19arm64: dts: ti: k3-j784s4-evm: Enable camera peripheralsVaishnav Achath1-0/+25
CSI cameras are controlled using I2C. On J784S4 EVM, this is routed to I2C-5, so enable the instance and the TCA6408 GPIO expander on the bus. J784S4 EVM schematics: https://www.ti.com/lit/zip/sprr458 Signed-off-by: Vaishnav Achath <vaishnav.a@ti.com> Reviewed-by: Jai Luthra <j-luthra@ti.com> Link: https://lore.kernel.org/r/20240215085518.552692-3-vaishnav.a@ti.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2024-02-19arm64: dts: ti: k3-j721s2-common-proc-board: Enable camera peripheralsVaishnav Achath1-0/+25
CSI cameras are controlled using I2C. On J721S2 Common Processor Board, this is routed to I2C-5, so enable the instance and the TCA6408 GPIO expander on the bus. Common Processor Board schematics: https://www.ti.com/lit/zip/sprr411 J721S2 SoM schematics: https://www.ti.com/lit/zip/sprr439 Signed-off-by: Vaishnav Achath <vaishnav.a@ti.com> Reviewed-by: Jai Luthra <j-luthra@ti.com> Link: https://lore.kernel.org/r/20240215085518.552692-2-vaishnav.a@ti.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2024-02-17arm64: dts: ti: Add reserved memory for watchdogLi Hua Qian1-0/+10
This patch adds a reserved memory for the TI AM65X platform watchdog to reserve the specific info, triggering the watchdog reset in last boot, to know if the board reboot is due to a watchdog reset. Signed-off-by: Li Hua Qian <huaqian.li@siemens.com> Link: https://lore.kernel.org/r/20240117060654.109424-1-huaqian.li@siemens.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2024-02-15arm64: dts: ti: Add support for TI J722S Evaluation ModuleVaishnav Achath2-0/+254
Add basic support for the J722S EVM with UART console and MMC SD as rootfs. Schematics are available at: https://www.ti.com/lit/zip/sprr495 Co-developed-by: Jayesh Choudhary <j-choudhary@ti.com> Signed-off-by: Jayesh Choudhary <j-choudhary@ti.com> Signed-off-by: Vaishnav Achath <vaishnav.a@ti.com> Reviewed-by: Manorit Chawdhry <m-chawdhry@ti.com> Link: https://lore.kernel.org/r/20240206100608.127702-4-vaishnav.a@ti.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2024-02-15arm64: dts: ti: Introduce J722S family of SoCsVaishnav Achath2-0/+92
The J722S is a family of application processors built for Automotive and Linux Application development. J722S family of SoCs is a superset of the AM62P SoC family and shares similar memory map, thus the nodes are being reused from AM62P includes instead of duplicating the definitions. Some highlights of J722S SoC (in addition to AM62P SoC features) are: * Two Cortex-R5F for Functional Safety or general-purpose usage and two C7x floating point vector DSP with Matrix Multiply Accelerator for deep learning. * Vision Processing Accelerator (VPAC) with image signal processor and Depth and Motion Processing Accelerator (DMPAC). * 7xUARTs, 3xSPI, 5xI2C, 2xUSB2, 2xCAN-FD, 3xMMC and SD, GPMC for NAND/FPGA connection, OSPI memory controller, 5xMcASP for audio, 4xCSI-RX for Camera, 1 PCIe Gen3 controller, USB3.0 eCAP/eQEP, ePWM, among other peripherals. For those interested, more details about this SoC can be found in the Technical Reference Manual here: https://www.ti.com/lit/zip/sprujb3 Co-developed-by: Jayesh Choudhary <j-choudhary@ti.com> Signed-off-by: Jayesh Choudhary <j-choudhary@ti.com> Signed-off-by: Vaishnav Achath <vaishnav.a@ti.com> Reviewed-by: Manorit Chawdhry <m-chawdhry@ti.com> Link: https://lore.kernel.org/r/20240206100608.127702-3-vaishnav.a@ti.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2024-02-15arm64: dts: ti: iot2050: Support IOT2050-SM variantBaocheng Su2-0/+190
Main differences between the new variant and Advanced PG2: 1. Arduino interface is removed. Instead, an new ASIC is added for communicating with PLC 1200 signal modules. 2. USB 3.0 type A connector is removed, only USB 2.0 type A connector is available. 3. DP interface is removed. Instead, to communicate with PLC 1200 signal modules, a USB 3.0 type B connector is added but the signals are actually not USB. 4. DDR size is increased to 4 GB. 5. Two sensors are added, one tilt sensor and one light sensor. The light sensor it not yet added to the DT at this stage as it depends on to-be-added bindings. Co-developed-by: Chao Zeng <chao.zeng@siemens.com> Signed-off-by: Chao Zeng <chao.zeng@siemens.com> Co-developed-by: Li Hua Qian <huaqian.li@siemens.com> Signed-off-by: Li Hua Qian <huaqian.li@siemens.com> Signed-off-by: Baocheng Su <baocheng.su@siemens.com> [Jan: rebase over dtsi refactorings, split-out light sensor, improve LEDs] Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Link: https://lore.kernel.org/r/d24e920547986499f6e8e39c833e414679b12ab4.1707463401.git.jan.kiszka@siemens.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2024-02-15arm64: dts: ti: iot2050: Annotate LED nodesJan Kiszka1-7/+26
Add function and color properties and use the common scheme for the node name. We can't change the user-visible labels, though, due to existing userspace relying on the current format. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Link: https://lore.kernel.org/r/331f8756483e3f896a3e50e069b3e2c0fae7a8ac.1707463401.git.jan.kiszka@siemens.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2024-02-15arm64: dts: ti: iot2050: Factor out DP related bitsJan Kiszka6-89/+102
There is a variant coming which does not support the Display Port. Move all related bits into a separate dtsi so that only those variants supporting the interface can include it. Along that, remove a redundant clock setting from k3-am65-iot2050-common-pg1.dtsi. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Link: https://lore.kernel.org/r/3397d917d7c97f7aec05bc5f65eef3a6fe843650.1707463401.git.jan.kiszka@siemens.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
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