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2024-01-22arm64: zynqmp: Rename i2c?-gpio to i2c?-gpio-grpMichal Simek1-2/+2
Anything ending with gpio/gpios is taken as gpio phande/description which is reported as the issue coming from gpio-consumer.yaml schema. That's why rename the gpio suffix to gpio-grp to avoid name collision. Link: https://lore.kernel.org/r/94f633e26b7b16cabddb8c7210c2e79208c364da.1704728353.git.michal.simek@amd.com Signed-off-by: Michal Simek <michal.simek@amd.com>
2024-01-22arm64: zynqmp: Setup default si570 frequency to 156.25MHzMichal Simek1-1/+1
All si570 mgt chips have factory default 156.25MHz but DT changed it to 148.5MHz. After tracking it is pretty much c&p fault taken from Zynq zc702/zc706 boards where 148.5MHz was setup as default because it was requirement for AD7511 chip available on these boards. ZynqMP board don't contain this chip that's why factory default frequency can be used. Link: https://lore.kernel.org/r/65a53776cbc5e4586f58da57a4b99e4d5c6c26a7.1704728353.git.michal.simek@amd.com Signed-off-by: Michal Simek <michal.simek@amd.com>
2023-07-10arm64: zynqmp: Fix open drain warning on ZynqMPManikanta Guntupalli1-4/+4
Mark both GPIO lines as GPIO_OPEN_DRAIN which is required by i2c-gpio DT binding. Similar change was done by commit 8df80c1801c9 ("ARM: dts: exynos: Convert to new i2c-gpio bindings"). Signed-off-by: Manikanta Guntupalli <manikanta.guntupalli@amd.com> Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/a0faf488dde310e1c1c1a676c371e223db6bdca6.1686227712.git.michal.simek@amd.com
2023-06-05arm64: zynqmp: Set qspi tx-buswidth to 4Amit Kumar Mahapatra1-1/+1
All ZynqMP boards are setting up tx-buswidth to 1. Due to this the framework only issues 1-1-1 write commands to the GQSPI driver. But the GQSPI controller is capable of handling 1-4-4 write commands, so updated the tx-buswidth to 4. Using all 4 lines will increase the tx data transfer rate, as now the tx data will be transferred on four lines instead on single line. Signed-off-by: Amit Kumar Mahapatra <amit.kumar-mahapatra@xilinx.com> Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/1f1b0028106d83aa06e0777e91862a07df100fa1.1684767562.git.michal.simek@amd.com
2023-06-05arm64: zynqmp: Fix usb node drive strength and slew rateAshok Reddy Soma1-1/+4
As per design, all input/rx pins should have fast slew rate and 12mA drive strength. Rest all pins should be slow slew rate and 4mA drive strength. Fix usb nodes as per this and remove setting of slow slew rate for all the usb group pins. Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/379071f44ceb27a0e32d74e13221640922d989d1.1684767562.git.michal.simek@amd.com
2023-06-05arm64: zynqmp: Describe TI phy as ethernet-phy-idMichal Simek1-8/+15
TI DP83867 is using strapping based on MIO pins. Tristate setup can influence PHY address. That's why switch description with ethernet-phy-id compatible string which enable calling reset. PHY itself setups phy address after power up or reset. Phy reset is done via gpio. Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/b49904649a363f40dc9c4d3fa275e42129562082.1684767562.git.michal.simek@amd.com
2023-06-05arm64: zynqmp: Switch to amd.com emailsMichal Simek1-1/+1
Update my and DPs email address to match current setup. Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/108cbbbab29e13d386d38a779fd582f10844a030.1685443337.git.michal.simek@amd.com
2023-05-16arm64: zynqmp: Enable AMS on SOM and other zcu10x boardsMichal Simek1-0/+12
AMS is used for monitoring system. Used for measuring voltages and especially temperatures. Origin interface is IIO but via iio-hwmon it can be moved to hwmon framework too (done for SOM and zcu100). Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/e1e1621ac1cee7f36ef20606bb3795e130de9609.1683034376.git.michal.simek@amd.com
2023-05-12arm64: zynqmp: Add mali-400 gpu node for zynqmpParth Gajjar1-0/+4
Add mali-400 gpu node for zynqmp. Enabled gpu node for xilinx boards. Signed-off-by: Parth Gajjar <parth.gajjar@amd.com> Signed-off-by: Vishal Sagar <vishal.sagar@amd.com> Link: https://lore.kernel.org/r/20230321070619.29440-3-parth.gajjar@amd.com Signed-off-by: Michal Simek <michal.simek@amd.com>
2022-06-23arm64: dts: xilinx: align gpio-key node names with dtschemaKrzysztof Kozlowski1-1/+1
The node names should be generic and DT schema expects certain pattern (e.g. with key/button/switch). Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20220616005333.18491-30-krzysztof.kozlowski@linaro.org Signed-off-by: Michal Simek <michal.simek@amd.com>
2021-09-13arm64: zynqmp: Enable xlnx,zynqmp-dwc3 driver for xilinx boardsMichal Simek1-1/+7
The commit 84770f028fab ("usb: dwc3: Add driver for Xilinx platforms") finally add proper support for Xilinx dwc3 driver. This patch is adding DT description for it. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Michael Tretter <m.tretter@pengutronix.de> Link: https://lore.kernel.org/r/640a3bc0dc3e32560d3e84c2f78b5ae561396eb0.1628244703.git.michal.simek@xilinx.com
2021-09-13arm64: zynqmp: Remove not documented is-dual propertyMichal Simek1-2/+1
Remove is-dual not documented property and also update comment about QSPI sizes to reflect dual configuration as 16MB + 16MB. Only single configuration is supported now. Reported-by: Quanyang Wang <quanyang.wang@windriver.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Link: https://lore.kernel.org/r/876c53b92f99623bae45d5c0c5ae79ee3e24f745.1628239345.git.michal.simek@xilinx.com
2021-09-13arm64: zynqmp: Wire qspi on multiple boardsMichal Simek1-0/+15
Couple of boards have qspi on the board that's why enable controller and describe them. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Link: https://lore.kernel.org/r/01a69ee6590245b5bee70a2553f6faac0d31ca76.1623684253.git.michal.simek@xilinx.com
2021-09-13arm64: zynqmp: Add note about UHS mode on some boardsMichal Simek1-0/+4
Add note about UHS mode and add no-1-8-v property to zc1751-dc1 board. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Link: https://lore.kernel.org/r/462b95844e7aedb00768035913265d7af90c3b2f.1623684253.git.michal.simek@xilinx.com
2021-09-13arm64: zynqmp: List reset property for ethernet phyMichal Simek1-0/+1
Add information about reset gpio for ethernet phy in case someone wants to use it. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Link: https://lore.kernel.org/r/e153f0cda37a2a6ea1c6e11fb0a4af1d400f29e2.1623684253.git.michal.simek@xilinx.com
2021-09-13arm64: zynqmp: Add nvmem alises for eepromsMichal Simek1-0/+1
Use nvmem alias to point to eeprom memory which contains information about board. The change is done based on discussion in the link below. Link: https://lore.kernel.org/r/CAL_JsqLMDqpkyg-Q7mUfw-XH67-v068Q6e9wTq2UOoN=0-_coQ@mail.gmail.com Signed-off-by: Michal Simek <michal.simek@xilinx.com> Link: https://lore.kernel.org/r/9b860b47ec3ca64340b4d29317e92b667236d7d1.1623684253.git.michal.simek@xilinx.com
2021-09-13arm64: zynqmp: Remove additional newlineMichal Simek1-1/+0
This is sync between Linux and U-Boot. Trivial change. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Link: https://lore.kernel.org/r/16f6f41c8d748d3c7cd4f49b2839e63a5b41c944.1623684253.git.michal.simek@xilinx.com
2021-09-13arm64: zynqmp: Add phy description for usb3.0Michal Simek1-0/+3
usb3.0 requires serdes setting that's why also wire it up. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Link: https://lore.kernel.org/r/cd856e5f87bc967373691d04e79de3d0022ef424.1623684253.git.michal.simek@xilinx.com
2021-09-13arm64: zynqmp: Add pinctrl description for all boardsMichal Simek1-1/+289
The commit 1dccb5ec0123 ("dt-bindings: pinctrl: Add binding for ZynqMP pinctrl driver") and commit 8b242ca700f8 ("pinctrl: Add Xilinx ZynqMP pinctrl driver support") add support for Xilinx ZynqMP pinctrl driver that's why describe pins configuration for current boards. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Link: https://lore.kernel.org/r/d8bc42600da85f5a23d977d4b61e6528720573e5.1623684253.git.michal.simek@xilinx.com
2021-03-08arm64: dts: zynqmp: Remove si5328 device nodesQuanyang Wang1-19/+1
The function of_i2c_get_board_info will call of_modalias_node to check if a device_node contains "compatible" string. But for the device si5328 at zcu102/zcu106 boards, there is no proper DT bindings for them. So remove si5328 device nodes from dts files to eliminate the error info in the boot message: i2c i2c-10: of_i2c: modalias failure on /axi/i2c@ff030000/i2c-mux@74/i2c@4/clock-generator@69 i2c i2c-10: Failed to create I2C device for /axi/i2c@ff030000/i2c-mux@74/i2c@4/clock-generator@69 Signed-off-by: Quanyang Wang <quanyang.wang@windriver.com> Link: https://lore.kernel.org/r/20210308115437.2232847-1-quanyang.wang@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-02-01arm64: dts: zynqmp: Wire up the DisplayPort subsystemLaurent Pinchart1-0/+10
Enable the dpsub device and wire it up to the PS-GTR PHY lanes routed to the DisplayPort connector. Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Link: https://lore.kernel.org/r/9769d4d103b6eb75e3324825117f6832a746004e.1611232558.git.michal.simek@xilinx.com
2021-02-01arm64: dts: zynqmp: Add missing mio-bank properties to sdhcisMichal Simek1-0/+1
Add missing xlnx,mio-bank property to sdhci nodes. Also add properties with 0 value to have it listed in case that files are copied to different projects where default case doesn't need to be handled in the same way. That's why explicitly list them too. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Link: https://lore.kernel.org/r/dbdfcc1b25af8b28fc658a37ce18902978cb410d.1611224800.git.michal.simek@xilinx.com
2021-02-01arm64: dts: zynqmp: Enable phy driver for Sata on zcu102/zcu104/zcu106Michal Simek1-0/+10
Enable psgtr driver and write clocks property to get sata to work. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Link: https://lore.kernel.org/r/80b52ef97501968ee97fc152363bc4b9b7bb2cff.1611224800.git.michal.simek@xilinx.com
2021-02-01arm64: dts: zynqmp: Enable si5341 driver for zcu102/106/111Michal Simek1-1/+55
Enable si5341 driver is the main chip for providing preprogrammed clocks for the whole platform. # cat /sys/kernel/debug/clk/clk_summary ... refhdmi 1 1 0 114285000 0 0 50000 xtal_0 0 0 0 114285000 0 0 50000 pll_0 0 0 0 40731174000000 0 0 50000 clk1_0 0 0 0 27000000 0 0 50000 clk0_0 0 0 0 27000000 0 0 50000 ref48M 1 2 0 48000000 0 0 50000 si5341 0 4 0 14000000 0 0 50000 clock-generator.N4 0 0 0 0 0 0 50000 clock-generator.N3 0 1 0 733260000 0 0 50000 clock-generator.9 0 1 0 33330000 0 0 50000 clock-generator.N2 0 1 0 104000000 0 0 50000 clock-generator.2 0 1 0 26000000 0 0 50000 clock-generator.N1 0 2 0 594000000 0 0 50000 clock-generator.7 0 1 0 74250000 0 0 50000 clock-generator.0 0 1 0 27000000 0 0 50000 clock-generator.N0 0 4 0 1000000000 0 0 50000 clock-generator.8 0 0 0 0 0 0 50000 clock-generator.6 0 1 0 125000000 0 0 50000 clock-generator.5 0 1 0 100000000 0 0 50000 clock-generator.4 0 1 0 100000000 0 0 50000 clock-generator.3 0 1 0 125000000 0 0 50000 clock-generator.1 0 0 0 0 0 0 50000 ... Signed-off-by: Michal Simek <michal.simek@xilinx.com> Link: https://lore.kernel.org/r/b93f13297684704a60e8d7274009a20aa98d14f7.1611224800.git.michal.simek@xilinx.com
2021-02-01arm64: dts: zynqmp: Add DT description for si5328 for zcu102/zcu106Michal Simek1-0/+17
Origin DT binding just specify driver but wasn't aligned with DT binding which came later. Extend description for zcu102 and zcu106 to cover latest binding. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Link: https://lore.kernel.org/r/82b2b13006307f108ace81c50c213c3857078b57.1611224800.git.michal.simek@xilinx.com
2020-09-29arm64: dts: xilinx: align GPIO hog names with dtschemaKrzysztof Kozlowski1-4/+4
The convention for node names is to use hyphens, not underscores. dtschema for pca95xx expects GPIO hogs to end with 'hog' prefix. Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Link: https://lore.kernel.org/r/20200916155715.21009-8-krzk@kernel.org Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-01-09arm64: zynqmp: Add label property to all ina226 on zcu102Michal Simek1-0/+18
Label property is adding capability to distiguish chips from each other when iio framework is used. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-01-09arm64: zynqmp: Enable iio-hwmon for ina226 on zcu102Michal Simek1-18/+109
ina226 hwmon driver is deprecated and it is recommended to use new iio based driver. The patch is enabling iio-hwmon driver to export functionality from IIO to hwmon interface to be able to use lm-sensors package. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-01-09arm64: zynqmp: Setup clock-output-names for si570 chipsMichal Simek1-0/+2
If there are more instances of si570 clock-output-names property should be used for differentiation of clock output. The patch is adding this optional properties for all zynqmp boards with si570 chip. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-01-09arm64: zynqmp: Turn comment to gpio-line-namesMichal Simek1-34/+9
Label gpio lines properly. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-01-09arm64: zynqmp: Use ethernet-phy as node name for ethernet physMichal Simek1-1/+1
Ethernet phys based on devicetree specification should be using ethernet-phy@ node name instead of pure phy@. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-01-09arm64: dts: xilinx: Add the clock nodes for zynqmpRajan Vaja1-2/+2
Add clock nodes for zynqmp based on CCF. Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-12-12arm64: zynqmp: Add dr_mode property to usb nodeAnurag Kumar Vulisha1-0/+1
This patch adds dr_mode property to the usb node for zynqmp boards. Signed-off-by: Anurag Kumar Vulisha <anurag.kumar.vulisha@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-03-18arm64: zynqmp: dt: Add TI PHY quirkHarini Katakam1-0/+1
Add TI PHY strap ctrl quirk for all the HW where applicable. Signed-off-by: Harini Katakam <harini.katakam@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-11-16arm64: dts: zynqmp: Fix node names which contain "_"Michal Simek1-5/+5
s/_/-/ for node names. It fixes warnings like this: ... Warning (node_name_chars_strict): /cpu_opp_table: Character '_' not recommended in node name ... Issues reported by make dtbs W=12 Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-11-06arm64: dts: zynqmp: replace gpio-key,wakeup with wakeup-source propertySudeep Holla1-1/+1
Most of the legacy "gpio-key,wakeup" boolean property is already replaced with "wakeup-source". However few occurrences of old property has popped up again, probably from the remnants in downstream trees. This patch replaces the legacy properties with the unified "wakeup-source" property introduced by: "Input: gpio_keys - switch to using generic device properties" (sha1: 700a38b27eefc582099fdf69effacfad0ad738a4) Cc: Michal Simek <michal.simek@xilinx.com> Signed-off-by: Sudeep Holla <sudeep.holla@arm.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-07-19arm64: dts: zynqmp: Remove #address/#size-cells from gpio-keysMichal Simek1-2/+0
dts reports incorrect usage of these properties in gpio-keys node. Warning (avoid_unnecessary_addr_size): /gpio-keys: unnecessary The patch is removing these useless properties. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-03-08arm64: zynqmp: Add support for Xilinx zcu102Michal Simek1-0/+548
This patch is adding revA, revB and rev1.0. There are also other revisions between which should be backward compatible with previous versions. Unfortunately all revs are still in use. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Rob Herring <robh@kernel.org>
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