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starfive-tech/linux.git
JH7100_VisionFive_OH_dev
JH7110_VisionFive2_510_devel
JH7110_VisionFive2_6.1.y_devel
JH7110_VisionFive2_6.6.y_devel
JH7110_VisionFive2_devel
JH7110_VisionFive2_upstream
beaglev-5.13.y
beaglev_fedora_devel
buildroot-upstream
esmil_starlight
fedora-vic-7100_5.10.6
master
openwrt-6.1.y
rt-ethercat-release
rt-linux-release
rtthread_AMP
starfive-5.13
starfive-5.15-dubhe
starfive-6.1-dubhe
starfive-6.1.65-dubhe
starfive-6.6.10-dubhe
starfive-6.6.31-dubhe
starlight-5.14.y
visionfive
visionfive-5.13.y-devel
visionfive-5.15.y
visionfive-5.15.y-devel
visionfive-5.15.y_fedora_devel
visionfive-5.16.y
visionfive-5.17.y
visionfive-5.18.y
visionfive-5.19.y
visionfive-6.4.y
visionfive_fedora_devel
StarFive Tech Linux Kernel for VisionFive (JH7110) boards (mirror)
Andrey V.Kosteltsev
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path:
root
/
arch
/
openrisc
/
kernel
/
smp.c
Age
Commit message (
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)
Author
Files
Lines
2024-03-04
smp: Consolidate smp_prepare_boot_cpu()
Thomas Gleixner
1
-4
/
+0
2023-08-21
openrisc: Add missing prototypes for assembly called fnctions
Stafford Horne
1
-0
/
+2
2023-03-24
treewide: Trace IPIs sent via smp_send_reschedule()
Valentin Schneider
1
-1
/
+1
2022-07-30
profile: setup_profiling_timer() is moslty not implemented
Ben Dooks
1
-6
/
+0
2021-11-08
Merge tag 'for-linus' of git://github.com/openrisc/linux
Linus Torvalds
1
-2
/
+4
2021-11-03
openrisc: fix SMP tlb flush NULL pointer dereference
Stafford Horne
1
-2
/
+4
2021-10-20
openrisc: Use of_get_cpu_hwid()
Rob Herring
1
-5
/
+1
2021-05-12
sched/core: Initialize the idle task with preemption disabled
Valentin Schneider
1
-2
/
+0
2021-02-08
openrisc: Use devicetree to determine present cpus
Jan Henrik Weinstock
1
-6
/
+17
2020-08-04
openrisc: Implement proper SMP tlb flushing
Stafford Horne
1
-8
/
+77
2020-01-31
openrisc: use mmgrab
Julia Lawall
1
-1
/
+2
2017-11-03
openrisc: fix possible deadlock scenario during timer sync
Stafford Horne
1
-1
/
+1
2017-11-03
openrisc: add tick timer multi-core sync logic
Stafford Horne
1
-0
/
+3
2017-11-03
openrisc: add cacheflush support to fix icache aliasing
Jan Henrik Weinstock
1
-0
/
+15
2017-11-03
openrisc: sleep instead of spin on secondary wait
Stafford Horne
1
-0
/
+5
2017-11-03
openrisc: fix initial preempt state for secondary cpu tasks
Stafford Horne
1
-0
/
+1
2017-11-03
openrisc: initial SMP support
Stefan Kristiansson
1
-0
/
+235