index
:
starfive-tech/linux.git
JH7100_VisionFive_OH_dev
JH7110_VisionFive2_510_devel
JH7110_VisionFive2_6.1.y_devel
JH7110_VisionFive2_6.6.y_devel
JH7110_VisionFive2_devel
JH7110_VisionFive2_upstream
beaglev-5.13.y
beaglev_fedora_devel
buildroot-upstream
esmil_starlight
fedora-vic-7100_5.10.6
master
openwrt-6.1.y
rt-ethercat-release
rt-linux-release
rtthread_AMP
starfive-5.13
starfive-5.15-dubhe
starfive-6.1-dubhe
starfive-6.1.65-dubhe
starfive-6.6.10-dubhe
starfive-6.6.31-dubhe
starlight-5.14.y
visionfive
visionfive-5.13.y-devel
visionfive-5.15.y
visionfive-5.15.y-devel
visionfive-5.15.y_fedora_devel
visionfive-5.16.y
visionfive-5.17.y
visionfive-5.18.y
visionfive-5.19.y
visionfive-6.4.y
visionfive_fedora_devel
StarFive Tech Linux Kernel for VisionFive (JH7110) boards (mirror)
Andrey V.Kosteltsev
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path:
root
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arch
/
riscv
/
boot
/
dts
/
starfive
/
jh7100.dtsi
Age
Commit message (
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Author
Files
Lines
2024-07-22
riscv: dts: Add full JH7100, Starlight and VisionFive support
Emil Renner Berthing
1
-0
/
+389
2024-07-22
usb: cdns3: starfive: Initialize JH7100 host mode
Emil Renner Berthing
1
-0
/
+6
2024-07-22
riscv: dts: starfive: Add JH7100 USB node
Emil Renner Berthing
1
-0
/
+26
2024-07-22
riscv: dts: starfive: Add StarFive JH7100 audio reset node
Emil Renner Berthing
1
-0
/
+6
2024-07-22
riscv: dts: starfive: Add StarFive JH7100 audio clock node
Emil Renner Berthing
1
-0
/
+10
2024-07-22
riscv: dts: starfive: Add JH7100 high speed UARTs
Emil Renner Berthing
1
-0
/
+26
2024-05-01
riscv: dts: starfive: add 'cpus' label to jh7110 and jh7100 soc dtsi
Jisheng Zhang
1
-1
/
+1
2024-03-19
Merge tag 'soc-late-6.9' of git://git.kernel.org/pub/scm/linux/kernel/git/soc...
Linus Torvalds
1
-0
/
+45
2024-03-06
Merge tag 'riscv-dt-for-v6.9' of https://git.kernel.org/pub/scm/linux/kernel/...
Arnd Bergmann
1
-0
/
+45
2024-03-05
riscv: dts: starfive: jh7100: fix root clock names
Krzysztof Kozlowski
1
-0
/
+4
2024-02-13
riscv: dts: starfive: replace underscores in node names
Krzysztof Kozlowski
1
-6
/
+6
2024-01-31
riscv: dts: starfive: jh7100: Add sysmain and gmac DT nodes
Cristian Ciocaltea
1
-0
/
+36
2024-01-23
riscv: dts: starfive: jh7100: Add PWM node and pins configuration
William Qiu
1
-0
/
+9
2023-12-13
riscv: dts: starfive: Add JH7100 MMC nodes
Emil Renner Berthing
1
-0
/
+26
2023-12-13
riscv: dts: starfive: Add JH7100 cache controller
Emil Renner Berthing
1
-0
/
+13
2023-12-13
riscv: dts: starfive: Mark the JH7100 as having non-coherent DMAs
Emil Renner Berthing
1
-0
/
+1
2023-12-13
riscv: dts: starfive: Group tuples in interrupt properties
Geert Uytterhoeven
1
-4
/
+4
2023-10-15
riscv: dts: starfive: convert isa detection to new properties
Conor Dooley
1
-0
/
+6
2023-07-25
riscv: dts: starfive: jh7100: Add temperature sensor node and thermal-zones
Hal Feng
1
-0
/
+37
2023-05-15
riscv: dts: starfive: jh7100: Add watchdog node
Xingyu Wu
1
-0
/
+10
2022-08-11
riscv: dts: starfive: correct number of external interrupts
Mark Kettenis
1
-1
/
+1
2022-07-15
riscv: dts: starfive: Add JH7100 CPU topology
Jonas Hahnfeld
1
-2
/
+14
2021-12-16
RISC-V: Add initial StarFive JH7100 device tree
Emil Renner Berthing
1
-0
/
+230