index
:
starfive-tech/linux.git
JH7100_VisionFive_OH_dev
JH7110_VisionFive2_510_devel
JH7110_VisionFive2_6.1.y_devel
JH7110_VisionFive2_6.6.y_devel
JH7110_VisionFive2_devel
JH7110_VisionFive2_upstream
beaglev-5.13.y
beaglev_fedora_devel
buildroot-upstream
esmil_starlight
fedora-vic-7100_5.10.6
master
openwrt-6.1.y
rt-ethercat-release
rt-linux-release
rtthread_AMP
starfive-5.13
starfive-5.15-dubhe
starfive-6.1-dubhe
starfive-6.1.65-dubhe
starfive-6.6.10-dubhe
starfive-6.6.31-dubhe
starlight-5.14.y
visionfive
visionfive-5.13.y-devel
visionfive-5.15.y
visionfive-5.15.y-devel
visionfive-5.15.y_fedora_devel
visionfive-5.16.y
visionfive-5.17.y
visionfive-5.18.y
visionfive-5.19.y
visionfive-6.4.y
visionfive_fedora_devel
StarFive Tech Linux Kernel for VisionFive (JH7110) boards (mirror)
Andrey V.Kosteltsev
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path:
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/
arch
/
riscv
/
include
/
asm
/
bitops.h
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2024-03-22
Merge tag 'riscv-for-linus-6.9-mw2' of git://git.kernel.org/pub/scm/linux/ker...
Linus Torvalds
1
-114
/
+24
2024-02-10
work around gcc bugs with 'asm goto' with outputs
Linus Torvalds
1
-4
/
+4
2024-01-25
riscv: Avoid code duplication with generic bitops implementation
Xiao Wang
1
-114
/
+24
2024-01-18
riscv: Optimize hweight API with Zbb extension
Xiao Wang
1
-1
/
+3
2023-11-10
Merge tag 'riscv-for-linus-6.7-mw2' of git://git.kernel.org/pub/scm/linux/ker...
Linus Torvalds
1
-3
/
+251
2023-11-09
riscv: Optimize bitops with Zbb extension
Xiao Wang
1
-3
/
+251
2023-10-19
mm: delete checks for xor_unlock_is_negative_byte()
Matthew Wilcox (Oracle)
1
-1
/
+0
2023-10-19
riscv: implement xor_unlock_is_negative_byte
Matthew Wilcox (Oracle)
1
-0
/
+13
2022-01-15
include: move find.h from asm_generic to linux
Yury Norov
1
-1
/
+0
2019-06-17
Merge tag 'riscv-for-v5.2/fixes-rc6' of git://git.kernel.org/pub/scm/linux/ke...
Linus Torvalds
1
-5
/
+0
2019-06-17
riscv: remove unused barrier defines
Rolf Eike Beer
1
-5
/
+0
2019-06-05
treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 286
Thomas Gleixner
1
-9
/
+1
2017-11-29
RISC-V: __test_and_op_bit_ord should be strongly ordered
Palmer Dabbelt
1
-1
/
+1
2017-09-27
RISC-V: Atomic and Locking Code
Palmer Dabbelt
1
-0
/
+218