| Age | Commit message (Expand) | Author | Files | Lines |
|---|---|---|---|---|
| 2023-11-01 | RISC-V: Provide pgtable_l5_enabled on rv32 | Palmer Dabbelt | 1 | -0/+3 |
| 2022-05-12 | riscv: add RISC-V Svpbmt extension support | Heiko Stuebner | 1 | -0/+9 |
| 2022-05-12 | riscv: Fix accessing pfn bits in PTEs for non-32bit variants | Heiko Stuebner | 1 | -0/+8 |
| 2020-11-16 | arch: pgtable: define MAX_POSSIBLE_PHYSMEM_BITS where needed | Arnd Bergmann | 1 | -0/+2 |
| 2019-06-05 | treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 286 | Thomas Gleixner | 1 | -9/+1 |
| 2017-09-27 | RISC-V: Paging and MMU | Palmer Dabbelt | 1 | -0/+25 |
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index : starfive-tech/linux.git | |
| StarFive Tech Linux Kernel for VisionFive (JH7110) boards (mirror) | Andrey V.Kosteltsev |
| summaryrefslogtreecommitdiff |