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starfive-tech/linux.git
JH7100_VisionFive_OH_dev
JH7110_VisionFive2_510_devel
JH7110_VisionFive2_6.1.y_devel
JH7110_VisionFive2_6.6.y_devel
JH7110_VisionFive2_devel
JH7110_VisionFive2_upstream
beaglev-5.13.y
beaglev_fedora_devel
buildroot-upstream
esmil_starlight
fedora-vic-7100_5.10.6
master
openwrt-6.1.y
rt-ethercat-release
rt-linux-release
rtthread_AMP
starfive-5.13
starfive-5.15-dubhe
starfive-6.1-dubhe
starfive-6.1.65-dubhe
starfive-6.6.10-dubhe
starfive-6.6.31-dubhe
starlight-5.14.y
visionfive
visionfive-5.13.y-devel
visionfive-5.15.y
visionfive-5.15.y-devel
visionfive-5.15.y_fedora_devel
visionfive-5.16.y
visionfive-5.17.y
visionfive-5.18.y
visionfive-5.19.y
visionfive-6.4.y
visionfive_fedora_devel
StarFive Tech Linux Kernel for VisionFive (JH7110) boards (mirror)
Andrey V.Kosteltsev
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path:
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/
arch
/
riscv
/
include
/
asm
/
processor.h
Age
Commit message (
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Author
Files
Lines
2024-04-30
Merge patch series "riscv: Create and document PR_RISCV_SET_ICACHE_FLUSH_CTX ...
Palmer Dabbelt
1
-0
/
+10
2024-04-18
riscv: Include riscv_set_icache_flush_ctx prctl
Charlie Jenkins
1
-0
/
+10
2024-03-20
Merge patch series "riscv: Introduce compat-mode helpers & improve arch_get_m...
Palmer Dabbelt
1
-4
/
+8
2024-03-20
riscv: add compile-time test into is_compat_task()
Leonardo Bras
1
-2
/
+2
2024-03-20
riscv: Improve arch_get_mmap_end() macro
Leonardo Bras
1
-3
/
+9
2024-03-15
Merge patch series "riscv: mm: Extend mappable memory up to hint address"
Palmer Dabbelt
1
-16
/
+11
2024-03-14
riscv: mm: Use hint address in mmap if available
Charlie Jenkins
1
-16
/
+11
2024-01-16
Merge patch series "riscv: support kernel-mode Vector"
Palmer Dabbelt
1
-1
/
+40
2024-01-16
riscv: vector: allow kernel-mode Vector with preemption
Andy Chiu
1
-1
/
+29
2024-01-16
riscv: vector: make Vector always available for softirq context
Andy Chiu
1
-1
/
+2
2024-01-16
riscv: Add support for kernel mode vector
Greentime Hu
1
-1
/
+11
2024-01-11
riscv: mm: Fixup compat arch_get_mmap_end
Guo Ren
1
-1
/
+1
2023-11-10
Merge tag 'riscv-for-linus-6.7-mw2' of git://git.kernel.org/pub/scm/linux/ker...
Linus Torvalds
1
-0
/
+9
2023-11-01
riscv: add support for PR_SET_UNALIGN and PR_GET_UNALIGN
Clément Léger
1
-0
/
+9
2023-10-04
riscv: kdump: use generic interface to simplify crashkernel reservation
Baoquan He
1
-0
/
+2
2023-08-24
RISC-V: mm: Restrict address space for sv39,sv48,sv57
Charlie Jenkins
1
-6
/
+46
2023-06-23
Merge patch series "ISA string parser cleanups"
Palmer Dabbelt
1
-0
/
+1
2023-06-21
RISC-V: split early & late of_node to hartid mapping
Conor Dooley
1
-0
/
+1
2023-06-08
riscv: Add prctl controls for userspace vector management
Andy Chiu
1
-0
/
+10
2023-06-08
riscv: signal: Report signal frame size to userspace via auxv
Vincent Chen
1
-0
/
+2
2023-06-08
riscv: Add task switch support for vector
Greentime Hu
1
-0
/
+1
2022-09-12
kernel: exit: cleanup release_thread()
Kefeng Wang
1
-5
/
+0
2022-07-20
riscv: cpu: Add 64bit hartid support on RV64
Sunil V L
1
-2
/
+2
2022-04-26
riscv: compat: Support TASK_SIZE for compat mode
Guo Ren
1
-1
/
+5
2021-10-15
sched: Add wrapper for get_wchan() to keep task blocked
Kees Cook
1
-1
/
+1
2021-08-04
riscv: Implement thread_struct whitelist for hardened usercopy
Tong Tiangen
1
-0
/
+8
2021-03-10
riscv: process: Fix no prototype for arch_dup_task_struct
Nanyong Sun
1
-0
/
+1
2021-01-15
riscv: Add uprobes supported
Guo Ren
1
-0
/
+1
2020-06-11
riscv: use vDSO common flow to reduce the latency of the time-related functions
Vincent Chen
1
-10
/
+2
2020-06-10
RISC-V: Rename and move plic_find_hart_id() to arch directory
Anup Patel
1
-0
/
+1
2019-11-05
riscv: abstract out CSR names for supervisor vs machine mode
Christoph Hellwig
1
-1
/
+1
2019-06-05
treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 286
Thomas Gleixner
1
-9
/
+1
2019-01-25
riscv: Adjust mmap base address at a third of task size
Alexandre Ghiti
1
-1
/
+1
2018-10-31
treewide: remove current_text_addr
Nick Desaulniers
1
-6
/
+0
2018-10-23
RISC-V: Rename riscv_of_processor_hart to riscv_of_processor_hartid
Palmer Dabbelt
1
-1
/
+1
2017-09-27
RISC-V: Task implementation
Palmer Dabbelt
1
-0
/
+97