index
:
starfive-tech/linux.git
JH7100_VisionFive_OH_dev
JH7110_VisionFive2_510_devel
JH7110_VisionFive2_6.1.y_devel
JH7110_VisionFive2_6.6.y_devel
JH7110_VisionFive2_devel
JH7110_VisionFive2_upstream
beaglev-5.13.y
beaglev_fedora_devel
buildroot-upstream
esmil_starlight
fedora-vic-7100_5.10.6
master
openwrt-6.1.y
rt-ethercat-release
rt-linux-release
rtthread_AMP
starfive-5.13
starfive-5.15-dubhe
starfive-6.1-dubhe
starfive-6.1.65-dubhe
starfive-6.6.10-dubhe
starfive-6.6.31-dubhe
starlight-5.14.y
visionfive
visionfive-5.13.y-devel
visionfive-5.15.y
visionfive-5.15.y-devel
visionfive-5.15.y_fedora_devel
visionfive-5.16.y
visionfive-5.17.y
visionfive-5.18.y
visionfive-5.19.y
visionfive-6.4.y
visionfive_fedora_devel
StarFive Tech Linux Kernel for VisionFive (JH7110) boards (mirror)
Andrey V.Kosteltsev
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path:
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arch
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riscv
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lib
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Makefile
Age
Commit message (
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Author
Files
Lines
2024-01-18
Merge patch series "riscv: Add fine-tuned checksum functions"
Palmer Dabbelt
1
-1
/
+2
2024-01-18
riscv: Add checksum library
Charlie Jenkins
1
-0
/
+1
2024-01-16
riscv: lib: vectorize copy_to_user/copy_from_user
Andy Chiu
1
-1
/
+5
2024-01-16
riscv: Add vector extension XOR implementation
Greentime Hu
1
-0
/
+1
2023-03-15
RISC-V: Use Zicboz in clear_page when available
Andrew Jones
1
-0
/
+1
2023-01-31
RISC-V: add infrastructure to allow different str* implementations
Heiko Stuebner
1
-0
/
+3
2021-01-15
riscv: Add support for function error injection
Guo Ren
1
-0
/
+2
2020-12-11
riscv: provide memmove implementation
Nylon Chen
1
-0
/
+1
2020-10-04
riscv: use memcpy based uaccess for nommu again
Christoph Hellwig
1
-1
/
+1
2020-03-19
riscv: uaccess should be used in nommu mode
Greentime Hu
1
-1
/
+1
2019-11-18
riscv: add nommu support
Christoph Hellwig
1
-6
/
+5
2019-08-09
RISC-V: Remove udivdi3
Palmer Dabbelt
1
-2
/
+0
2019-05-21
treewide: Add SPDX license identifier - Makefile/Kconfig
Thomas Gleixner
1
-0
/
+1
2018-11-13
RISC-V: lib: Fix build error for 64-bit
Olof Johansson
1
-1
/
+1
2018-10-23
RISC-V: Build tishift only on 64-bit
Zong Li
1
-1
/
+2
2018-08-13
RISC-V: implement __lshrti3.
Alex Guo
1
-0
/
+1
2017-09-27
RISC-V: Build Infrastructure
Palmer Dabbelt
1
-0
/
+6