index
:
starfive-tech/linux.git
JH7100_VisionFive_OH_dev
JH7110_VisionFive2_510_devel
JH7110_VisionFive2_6.1.y_devel
JH7110_VisionFive2_6.6.y_devel
JH7110_VisionFive2_devel
JH7110_VisionFive2_upstream
beaglev-5.13.y
beaglev_fedora_devel
buildroot-upstream
esmil_starlight
fedora-vic-7100_5.10.6
master
openwrt-6.1.y
rt-ethercat-release
rt-linux-release
rtthread_AMP
starfive-5.13
starfive-5.15-dubhe
starfive-6.1-dubhe
starfive-6.1.65-dubhe
starfive-6.6.10-dubhe
starfive-6.6.31-dubhe
starlight-5.14.y
visionfive
visionfive-5.13.y-devel
visionfive-5.15.y
visionfive-5.15.y-devel
visionfive-5.15.y_fedora_devel
visionfive-5.16.y
visionfive-5.17.y
visionfive-5.18.y
visionfive-5.19.y
visionfive-6.4.y
visionfive_fedora_devel
StarFive Tech Linux Kernel for VisionFive (JH7110) boards (mirror)
Andrey V.Kosteltsev
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Author
Files
Lines
2018-01-12
x86/retpoline/ftrace: Convert ftrace assembler indirect jumps
David Woodhouse
2
-6
/
+8
2018-01-12
x86/retpoline/entry: Convert entry assembler indirect jumps
David Woodhouse
2
-5
/
+12
2018-01-12
x86/retpoline/crypto: Convert crypto assembler indirect jumps
David Woodhouse
4
-5
/
+9
2018-01-12
x86/spectre: Add boot time option to select Spectre v2 mitigation
David Woodhouse
3
-5
/
+167
2018-01-12
x86/retpoline: Add initial retpoline support
David Woodhouse
8
-0
/
+231
2018-01-12
x86/pti: Make unpoison of pgd for trusted boot work for real
Dave Hansen
1
-1
/
+11
2018-01-10
x86/alternatives: Fix optimize_nops() checking
Borislav Petkov
1
-2
/
+5
2018-01-09
x86/cpu/AMD: Use LFENCE_RDTSC in preference to MFENCE_RDTSC
Tom Lendacky
2
-2
/
+17
2018-01-09
x86/cpu/AMD: Make LFENCE a serializing instruction
Tom Lendacky
2
-0
/
+12
2018-01-08
x86/mm/pti: Remove dead logic in pti_user_pagetable_walk*()
Jike Song
1
-26
/
+6
2018-01-08
x86/tboot: Unbreak tboot with PTI enabled
Dave Hansen
1
-0
/
+1
2018-01-08
x86/cpu: Implement CPU vulnerabilites sysfs functions
Thomas Gleixner
2
-0
/
+30
2018-01-06
x86/cpufeatures: Add X86_BUG_SPECTRE_V[12]
David Woodhouse
2
-0
/
+5
2018-01-06
x86/pti: Unbreak EFI old_memmap
Jiri Kosina
1
-0
/
+2
2018-01-05
x86/pti: Rename BUG_CPU_INSECURE to BUG_CPU_MELTDOWN
Thomas Gleixner
3
-5
/
+5
2018-01-05
x86/alternatives: Add missing '\n' at end of ALTERNATIVE inline asm
David Woodhouse
1
-2
/
+2
2018-01-05
x86/tlb: Drop the _GPL from the cpu_tlbstate export
Thomas Gleixner
1
-1
/
+1
2018-01-05
x86/events/intel/ds: Use the proper cache flush method for mapping ds buffers
Peter Zijlstra
1
-0
/
+16
2018-01-05
x86/kaslr: Fix the vaddr_end mess
Thomas Gleixner
2
-24
/
+16
2018-01-05
x86/mm: Map cpu_entry_area at the same place on 4/5 level
Thomas Gleixner
2
-3
/
+3
2018-01-05
x86/mm: Set MODULES_END to 0xffffffffff000000
Andrey Ryabinin
1
-1
/
+1
2018-01-04
x86/process: Define cpu_tss_rw in same section as declaration
Nick Desaulniers
1
-1
/
+1
2018-01-04
x86/pti: Switch to kernel CR3 at early in entry_SYSCALL_compat()
Thomas Gleixner
1
-7
/
+6
2018-01-03
x86/dumpstack: Print registers for first stack frame
Josh Poimboeuf
1
-1
/
+2
2018-01-03
x86/dumpstack: Fix partial register dumps
Josh Poimboeuf
3
-13
/
+34
2018-01-03
x86/pti: Make sure the user/kernel PTEs match
Thomas Gleixner
1
-1
/
+2
2018-01-03
x86/cpu, x86/pti: Do not enable PTI on AMD processors
Tom Lendacky
1
-2
/
+2
2017-12-31
x86/ldt: Make LDT pgtable free conditional
Thomas Gleixner
1
-1
/
+2
2017-12-31
x86/ldt: Plug memory leak in error path
Thomas Gleixner
1
-1
/
+7
2017-12-31
x86/mm: Remove preempt_disable/enable() from __native_flush_tlb()
Thomas Gleixner
1
-6
/
+8
2017-12-31
x86/smpboot: Remove stale TLB flush invocations
Thomas Gleixner
1
-9
/
+0
2017-12-23
x86/ldt: Make the LDT mapping RO
Thomas Gleixner
3
-10
/
+10
2017-12-23
x86/mm/dump_pagetables: Allow dumping current pagetables
Thomas Gleixner
3
-6
/
+73
2017-12-23
x86/mm/dump_pagetables: Check user space page table for WX pages
Thomas Gleixner
3
-6
/
+27
2017-12-23
x86/mm/dump_pagetables: Add page table directory to the debugfs VFS hierarchy
Borislav Petkov
1
-5
/
+10
2017-12-23
x86/dumpstack: Indicate in Oops whether PTI is configured and enabled
Vlastimil Babka
1
-2
/
+4
2017-12-23
x86/mm: Clarify the whole ASID/kernel PCID/user PCID naming
Peter Zijlstra
1
-12
/
+43
2017-12-23
x86/mm: Use INVPCID for __native_flush_tlb_single()
Dave Hansen
3
-28
/
+60
2017-12-23
x86/mm: Optimize RESTORE_CR3
Peter Zijlstra
2
-4
/
+30
2017-12-23
x86/mm: Use/Fix PCID to optimize user/kernel switches
Peter Zijlstra
9
-33
/
+162
2017-12-23
x86/mm: Abstract switching CR3
Dave Hansen
1
-2
/
+20
2017-12-23
x86/mm: Allow flushing for future ASID switches
Dave Hansen
2
-8
/
+64
2017-12-23
x86/pti: Map the vsyscall page if needed
Andy Lutomirski
3
-3
/
+69
2017-12-23
x86/pti: Put the LDT in its own PGD if PTI is on
Andy Lutomirski
5
-16
/
+218
2017-12-23
x86/mm/64: Make a full PGD-entry size hole in the memory map
Andy Lutomirski
1
-2
/
+2
2017-12-23
x86/events/intel/ds: Map debug buffers in cpu_entry_area
Hugh Dickins
2
-45
/
+82
2017-12-23
x86/cpu_entry_area: Add debugstore entries to cpu_entry_area
Thomas Gleixner
5
-21
/
+81
2017-12-23
x86/mm/pti: Map ESPFIX into user space
Andy Lutomirski
1
-0
/
+11
2017-12-23
x86/mm/pti: Share entry text PMD
Thomas Gleixner
1
-0
/
+10
2017-12-23
x86/entry: Align entry text section to PMD boundary
Thomas Gleixner
1
-0
/
+8
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