index
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starfive-tech/linux.git
JH7100_VisionFive_OH_dev
JH7110_VisionFive2_510_devel
JH7110_VisionFive2_6.1.y_devel
JH7110_VisionFive2_6.6.y_devel
JH7110_VisionFive2_devel
JH7110_VisionFive2_upstream
beaglev-5.13.y
beaglev_fedora_devel
buildroot-upstream
esmil_starlight
fedora-vic-7100_5.10.6
master
openwrt-6.1.y
rt-ethercat-release
rt-linux-release
rtthread_AMP
starfive-5.13
starfive-5.15-dubhe
starfive-6.1-dubhe
starfive-6.1.65-dubhe
starfive-6.6.10-dubhe
starfive-6.6.31-dubhe
starlight-5.14.y
visionfive
visionfive-5.13.y-devel
visionfive-5.15.y
visionfive-5.15.y-devel
visionfive-5.15.y_fedora_devel
visionfive-5.16.y
visionfive-5.17.y
visionfive-5.18.y
visionfive-5.19.y
visionfive-6.4.y
visionfive_fedora_devel
StarFive Tech Linux Kernel for VisionFive (JH7110) boards (mirror)
Andrey V.Kosteltsev
summary
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path:
root
/
drivers
/
clk
/
ingenic
Age
Commit message (
Expand
)
Author
Files
Lines
2022-02-18
clk: jz4725b: fix mmc0 clock gating
Siarhei Volkau
1
-2
/
+1
2022-01-07
clk: ingenic: Add MDMA and BDMA clocks
Paul Cercueil
2
-0
/
+15
2021-11-14
Merge tag 'devicetree-fixes-for-5.16-1' of git://git.kernel.org/pub/scm/linux...
Linus Torvalds
7
-7
/
+7
2021-11-12
dt-bindings: Rename Ingenic CGU headers to ingenic,*.h
Paul Cercueil
7
-7
/
+7
2021-11-03
clk: ingenic: Fix bugs with divided dividers
Paul Cercueil
1
-3
/
+3
2021-06-28
clk: ingenic: Add support for the JZ4760
Paul Cercueil
4
-0
/
+441
2021-06-28
clk: ingenic: Support overriding PLLs M/N/OD calc algorithm
Paul Cercueil
2
-13
/
+30
2021-06-28
clk: ingenic: Remove pll_info.no_bypass_bit
Paul Cercueil
3
-8
/
+6
2021-06-28
clk: ingenic: Read bypass register only when there is one
Paul Cercueil
1
-8
/
+11
2021-06-28
clk: Support bypassing dividers
Paul Cercueil
5
-29
/
+42
2020-12-20
clk: ingenic: Fix divider calculation with div tables
Paul Cercueil
1
-4
/
+10
2020-10-14
clk: ingenic: Respect CLK_SET_RATE_PARENT in .round_rate
Paul Cercueil
1
-0
/
+2
2020-10-14
clk: ingenic: Don't tag custom clocks with CLK_SET_RATE_PARENT
Paul Cercueil
1
-7
/
+7
2020-10-14
clk: ingenic: Don't use CLK_SET_RATE_GATE for PLL
Paul Cercueil
1
-2
/
+7
2020-10-14
clk: ingenic: Use readl_poll_timeout instead of custom loop
Paul Cercueil
1
-26
/
+29
2020-10-14
clk: ingenic: Use to_clk_info() macro for all clocks
Paul Cercueil
1
-39
/
+15
2020-07-28
clk: X1000: Add support for calculat REFCLK of USB PHY.
周琰杰 (Zhou Yanjie)
1
-1
/
+83
2020-07-28
clk: JZ4780: Reformat the code to align it.
周琰杰 (Zhou Yanjie)
1
-45
/
+45
2020-07-28
clk: JZ4780: Add functions for enable and disable USB PHY.
周琰杰 (Zhou Yanjie)
1
-30
/
+35
2020-07-28
clk: Ingenic: Add RTC related clocks for Ingenic SoCs.
周琰杰 (Zhou Yanjie)
3
-0
/
+38
2020-05-29
clk: ingenic: Mark ingenic_tcu_of_match as __maybe_unused
Stephen Boyd
1
-1
/
+1
2020-05-29
clk: X1000: Add FIXDIV for SSI clock of X1000.
周琰杰 (Zhou Yanjie)
1
-6
/
+111
2020-05-29
clk: Ingenic: Add CGU driver for X1830.
周琰杰 (Zhou Yanjie)
3
-0
/
+459
2020-05-29
clk: Ingenic: Adjust cgu code to make it compatible with X1830.
周琰杰 (Zhou Yanjie)
7
-4
/
+41
2020-05-29
clk: Ingenic: Remove unnecessary spinlock when reading registers.
周琰杰 (Zhou Yanjie)
1
-11
/
+1
2020-03-21
clk: ingenic/TCU: Fix round_rate returning error
Paul Cercueil
1
-1
/
+1
2020-03-21
clk: ingenic/jz4770: Exit with error if CGU init failed
Paul Cercueil
1
-1
/
+3
2020-03-21
clk: JZ4780: Add function for enable the second core.
周琰杰 (Zhou Yanjie)
1
-5
/
+50
2020-03-21
clk: Ingenic: Add support for TCU of X1000.
周琰杰 (Zhou Yanjie)
1
-0
/
+8
2019-11-27
Merge branches 'clk-ingenic', 'clk-init-leak', 'clk-ux500' and 'clk-bitmain' ...
Stephen Boyd
3
-1
/
+286
2019-11-22
clk: ingenic: Allow drivers to be built with COMPILE_TEST
Stephen Boyd
1
-1
/
+1
2019-11-14
clk: Ingenic: Add CGU driver for X1000.
Zhou Yanjie
3
-0
/
+285
2019-11-08
drivers/clk: convert VL struct to struct_size
Stephen Kitt
1
-2
/
+1
2019-09-22
Merge tag 'mips_5.4' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux
Linus Torvalds
4
-1
/
+490
2019-08-12
clk: ingenic: Use CLK_OF_DECLARE_DRIVER macro
Paul Cercueil
4
-4
/
+4
2019-08-09
clk: jz4740: Add TCU clock
Paul Cercueil
1
-0
/
+6
2019-08-09
clk: ingenic: Add driver for the TCU clocks
Paul Cercueil
3
-1
/
+484
2019-08-08
clk: ingenic/jz4740: Fix "pll half" divider not read/written properly
Paul Cercueil
1
-1
/
+8
2019-07-17
Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/cl...
Linus Torvalds
9
-128
/
+192
2019-06-26
clk: ingenic: Remove unused functions
Paul Cercueil
1
-73
/
+0
2019-06-26
clk: ingenic: Handle setting the Low-Power Mode bit
Paul Cercueil
7
-32
/
+69
2019-06-26
clk: ingenic: Add missing header in cgu.h
Paul Cercueil
1
-0
/
+1
2019-06-07
clk: ingenic/jz4725b: Fix "pll half" divider not read/written properly
Paul Cercueil
1
-1
/
+8
2019-06-07
clk: ingenic/jz4725b: Fix incorrect dividers for main clocks
Paul Cercueil
1
-5
/
+24
2019-06-07
clk: ingenic/jz4770: Fix incorrect dividers for main clocks
Paul Cercueil
1
-6
/
+28
2019-06-07
clk: ingenic/jz4740: Fix incorrect dividers for main clocks
Paul Cercueil
1
-5
/
+24
2019-06-07
clk: ingenic: Add support for divider tables
Paul Cercueil
2
-6
/
+38
2019-05-30
treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 157
Thomas Gleixner
4
-40
/
+4
2019-05-21
treewide: Add SPDX license identifier - Makefile/Kconfig
Thomas Gleixner
2
-0
/
+2
2019-05-15
clk: Remove io.h from clk-provider.h
Stephen Boyd
4
-0
/
+4
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