index
:
starfive-tech/linux.git
JH7100_VisionFive_OH_dev
JH7110_VisionFive2_510_devel
JH7110_VisionFive2_6.1.y_devel
JH7110_VisionFive2_6.6.y_devel
JH7110_VisionFive2_devel
JH7110_VisionFive2_upstream
beaglev-5.13.y
beaglev_fedora_devel
buildroot-upstream
esmil_starlight
fedora-vic-7100_5.10.6
master
openwrt-6.1.y
rt-ethercat-release
rt-linux-release
rtthread_AMP
starfive-5.13
starfive-5.15-dubhe
starfive-6.1-dubhe
starfive-6.1.65-dubhe
starfive-6.6.10-dubhe
starfive-6.6.31-dubhe
starlight-5.14.y
visionfive
visionfive-5.13.y-devel
visionfive-5.15.y
visionfive-5.15.y-devel
visionfive-5.15.y_fedora_devel
visionfive-5.16.y
visionfive-5.17.y
visionfive-5.18.y
visionfive-5.19.y
visionfive-6.4.y
visionfive_fedora_devel
StarFive Tech Linux Kernel for VisionFive (JH7110) boards (mirror)
Andrey V.Kosteltsev
summary
refs
log
tree
commit
diff
log msg
author
committer
range
path:
root
/
drivers
/
clk
/
mediatek
Age
Commit message (
Expand
)
Author
Files
Lines
2016-10-18
clk: mediatek: Add hardware dependency
Jean Delvare
1
-0
/
+2
2016-09-21
clk: mediatek: clk-mt8173: Unmap region obtained by of_iomap
Arvind Yadav
1
-1
/
+3
2016-08-19
clk: mediatek: Refine the makefile to support multiple clock drivers
James Liao
2
-3
/
+24
2016-08-19
clk: mediatek: remove __init from clk registration functions
James Liao
3
-8
/
+8
2016-05-06
clk: mediatek: remove hdmitx_dig_cts from TOP clocks
Philipp Zabel
1
-1
/
+0
2016-05-06
clk: mediatek: Add hdmi_ref HDMI PHY PLL reference clock output
Philipp Zabel
1
-0
/
+5
2016-05-06
clk: mediatek: make dpi0_sel propagate rate changes
Philipp Zabel
2
-3
/
+18
2016-03-30
clk: mediatek: Make reset_control_ops const
Philipp Zabel
1
-1
/
+1
2016-03-03
clk: mediatek: Remove CLK_IS_ROOT
Stephen Boyd
1
-2
/
+2
2016-01-30
clk: mediatek: Fix memory leak on clock init fail
James Liao
1
-2
/
+4
2016-01-29
clk: move the common clock's to_clk_*(_hw) macros to clk-provider.h
Geliang Tang
2
-5
/
+5
2015-10-01
clk: mediatek: Add USB clock support in MT8173 APMIXEDSYS
James Liao
5
-7
/
+159
2015-10-01
clk: mediatek: Add subsystem clocks of MT8173
James Liao
1
-0
/
+267
2015-10-01
clk: mediatek: Fix rate and dependency of MT8173 clocks
James Liao
1
-6
/
+13
2015-10-01
clk: mediatek: Add fixed clocks support for Mediatek SoC.
James Liao
2
-0
/
+40
2015-10-01
clk: mediatek: Add __initdata and __init for data and functions
James Liao
3
-10
/
+11
2015-10-01
clk: mediatek: Remove unused code from MT8173.
James Liao
2
-4
/
+2
2015-10-01
clk: mediatek: Removed unused dpi_ck clock from MT8173
James Liao
1
-1
/
+0
2015-10-01
clk: mediatek: add 13mhz clock for MT8173
Joe.C
1
-0
/
+5
2015-07-28
Merge branch 'cleanup-clk-h-includes' into clk-next
Stephen Boyd
4
-2
/
+6
2015-07-28
clk: mediatek: Add MT8173 MMPLL change rate support
James Liao
3
-6
/
+42
2015-07-28
clk: mediatek: Fix calculation of PLL rate settings
James Liao
1
-2
/
+2
2015-07-28
clk: mediatek: Fix PLL registers setting flow
James Liao
1
-9
/
+12
2015-07-20
clk: mediatek: Properly include clk.h
Stephen Boyd
4
-2
/
+6
2015-07-07
clk: mediatek: mt8173: Fix enabling of critical clocks
Sascha Hauer
1
-5
/
+21
2015-06-05
clk: mediatek: Fix apmixedsys clock registration
James Liao
2
-2
/
+2
2015-05-20
clk: mediatek: Initialize clk_init_data
Ricky Liang
2
-2
/
+2
2015-05-06
clk: mediatek: Add basic clocks for Mediatek MT8173.
James Liao
2
-0
/
+831
2015-05-06
clk: mediatek: Add basic clocks for Mediatek MT8135.
James Liao
2
-0
/
+645
2015-05-06
clk: mediatek: Add reset controller support
Sascha Hauer
3
-0
/
+108
2015-05-06
clk: mediatek: Add initial common clock support for Mediatek SoCs.
James Liao
6
-0
/
+898