starfive-tech/linux.git - StarFive Tech Linux Kernel for VisionFive (JH7110) boards (mirror)

Age	Commit message (Expand)	Author	Files	Lines
2024-05-03	clk: meson: s4: fix module autoloading	Krzysztof Kozlowski	2	-0/+2
2024-04-10	clk: meson: fix module license to GPL only	Neil Armstrong	18	-18/+18
2024-04-10	clk: meson: g12a: make VCLK2 and ENCL clock path configurable by CCF	Neil Armstrong	2	-20/+57
2024-04-10	clk: meson: add vclk driver	Neil Armstrong	4	-0/+197
2024-03-29	clk: meson: pll: print out pll name when unable to lock it	Dmitry Rokosov	1	-2/+2
2024-03-29	clk: meson: s4: pll: determine maximum register in regmap config	Dmitry Rokosov	1	-0/+1
2024-03-29	clk: meson: s4: peripherals: determine maximum register in regmap config	Dmitry Rokosov	1	-0/+1
2024-03-29	clk: meson: a1: pll: determine maximum register in regmap config	Dmitry Rokosov	1	-0/+1
2024-03-29	clk: meson: a1: peripherals: determine maximum register in regmap config	Dmitry Rokosov	1	-0/+1
2024-02-05	clk: meson: Add missing clocks to axg_clk_regmaps	Igor Prusov	1	-0/+2
2023-11-24	clk: meson: g12a: add CSI & ISP gates clocks	Neil Armstrong	1	-0/+9
2023-11-24	clk: meson: g12a: add MIPI ISP clocks	Neil Armstrong	2	-0/+67
2023-11-24	clk: meson: g12a: add CTS_ENCL & CTS_ENCL_SEL clocks	Neil Armstrong	1	-0/+40
2023-10-23	clk: meson: S4: select CONFIG_COMMON_CLK_MESON_CLKC_UTILS	Arnd Bergmann	1	-0/+2
2023-09-27	clk: meson: S4: add support for Amlogic S4 SoC peripheral clock controller	Yu Tu	4	-0/+3881
2023-09-27	clk: meson: S4: add support for Amlogic S4 SoC PLL clock driver	Yu Tu	4	-0/+918
2023-08-31	Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/cl...	Linus Torvalds	28	-3287/+2727
2023-08-31	Merge branches 'clk-versa', 'clk-strdup', 'clk-amlogic', 'clk-allwinner' and ...	Stephen Boyd	28	-3279/+2719
2023-08-08	clk: meson: axg-audio: move bindings include to main driver	Neil Armstrong	2	-3/+2
2023-08-08	clk: meson: meson8b: move bindings include to main driver	Neil Armstrong	2	-7/+3
2023-08-08	clk: meson: a1: move bindings include to main driver	Neil Armstrong	4	-6/+4
2023-08-08	clk: meson: eeclk: move bindings include to main driver	Neil Armstrong	6	-9/+6
2023-08-08	clk: meson: aoclk: move bindings include to main driver	Neil Armstrong	6	-45/+9
2023-08-08	dt-bindings: clk: axg-audio-clkc: expose all clock ids	Neil Armstrong	1	-70/+0
2023-08-08	dt-bindings: clk: amlogic,a1-pll-clkc: expose all clock ids	Neil Armstrong	1	-15/+0
2023-08-08	dt-bindings: clk: amlogic,a1-peripherals-clkc: expose all clock ids	Neil Armstrong	1	-63/+0
2023-08-08	dt-bindings: clk: meson8b-clkc: expose all clock ids	Neil Armstrong	1	-108/+0
2023-08-08	dt-bindings: clk: g12a-aoclkc: expose all clock ids	Neil Armstrong	1	-17/+0
2023-08-08	dt-bindings: clk: g12a-clks: expose all clock ids	Neil Armstrong	1	-140/+0
2023-08-08	dt-bindings: clk: axg-clkc: expose all clock ids	Neil Armstrong	1	-58/+0
2023-08-08	dt-bindings: clk: gxbb-clkc: expose all clock ids	Neil Armstrong	1	-76/+0
2023-08-08	clk: meson: migrate axg-audio out of hw_onecell_data to drop NR_CLKS	Neil Armstrong	3	-428/+424
2023-08-08	clk: meson: migrate meson8b out of hw_onecell_data to drop NR_CLKS	Neil Armstrong	3	-658/+660
2023-08-08	clk: meson: migrate a1 clock drivers out of hw_onecell_data to drop NR_CLKS	Neil Armstrong	5	-180/+183
2023-08-08	clk: meson: migrate meson-aoclk out of hw_onecell_data to drop NR_CLKS	Neil Armstrong	9	-73/+68
2023-08-08	clk: meson: migrate meson-eeclk out of hw_onecell_data to drop NR_CLKS	Neil Armstrong	9	-1323/+1312
2023-08-08	clk: meson: introduce meson-clkc-utils	Neil Armstrong	4	-0/+48
2023-07-19	clk: Explicitly include correct DT includes	Rob Herring	8	-8/+8
2023-07-11	clk: meson: change usleep_range() to udelay() for atomic context	Dmitry Rokosov	1	-2/+2
2023-06-15	clk: meson: pll: remove unneeded semicolon	Jiapeng Chong	1	-1/+1
2023-06-13	clk: meson: a1: Staticize rtc clk	Stephen Boyd	1	-1/+1
2023-05-30	clk: meson: a1: add Amlogic A1 Peripherals clock controller driver	Dmitry Rokosov	4	-0/+2367
2023-05-30	clk: meson: a1: add Amlogic A1 PLL clock controller driver	Dmitry Rokosov	4	-0/+414
2023-05-30	clk: meson: introduce new pll power-on sequence for A1 SoC family	Dmitry Rokosov	2	-0/+25
2023-05-30	clk: meson: make pll rst bit as optional	Dmitry Rokosov	1	-7/+17
2023-01-13	clk: meson: clk-cpu-dyndiv: switch from .round_rate to .determine_rate	Martin Blumenstingl	1	-5/+4
2023-01-13	clk: meson: sclk-div: switch from .round_rate to .determine_rate	Martin Blumenstingl	1	-5/+6
2023-01-13	clk: meson: dualdiv: switch from .round_rate to .determine_rate	Martin Blumenstingl	1	-8/+13
2023-01-13	clk: meson: mpll: Switch from .round_rate to .determine_rate	Martin Blumenstingl	1	-7/+13
2022-12-12	Merge branches 'clk-bindings', 'clk-renesas', 'clk-amlogic', 'clk-allwinner' ...	Stephen Boyd	1	-8/+12