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starfive-tech/linux.git
JH7100_VisionFive_OH_dev
JH7110_VisionFive2_510_devel
JH7110_VisionFive2_6.1.y_devel
JH7110_VisionFive2_6.6.y_devel
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starfive-5.13
starfive-5.15-dubhe
starfive-6.1-dubhe
starfive-6.1.65-dubhe
starfive-6.6.10-dubhe
starfive-6.6.31-dubhe
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visionfive-5.16.y
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visionfive-5.18.y
visionfive-5.19.y
visionfive-6.4.y
visionfive_fedora_devel
StarFive Tech Linux Kernel for VisionFive (JH7110) boards (mirror)
Andrey V.Kosteltsev
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path:
root
/
drivers
/
clk
/
renesas
/
r8a7796-cpg-mssr.c
Age
Commit message (
Expand
)
Author
Files
Lines
2023-08-15
clk: renesas: rcar-gen3: Add ADG clocks
Kuninori Morimoto
1
-0
/
+1
2023-07-27
clk: renesas: r8a7796: Add 3DGE and ZG support
Geert Uytterhoeven
1
-0
/
+2
2022-04-13
clk: renesas: Move RPC core clocks
Geert Uytterhoeven
1
-5
/
+4
2021-11-19
clk: renesas: rcar-gen3: Add SDnH clock
Wolfram Sang
1
-4
/
+8
2021-10-15
clk: renesas: r8a779[56]x: Add MLP clocks
Andrey Gusakov
1
-0
/
+1
2020-12-28
clk: renesas: r8a7796: Add TMU clocks
Niklas Söderlund
1
-0
/
+5
2020-06-22
clk: renesas: rcar-gen3: Mark RWDT clocks as critical
Ulrich Hecht
1
-1
/
+1
2020-02-10
clk: renesas: r8a7796: Add RPC clocks
Dirk Behme
1
-0
/
+8
2020-02-10
clk: renesas: rcar-gen3: Add CCREE clocks
Geert Uytterhoeven
1
-0
/
+2
2019-11-01
clk: renesas: r8a7796: Add R8A77961 CPG/MSSR support
Geert Uytterhoeven
1
-4
/
+20
2019-05-21
clk: renesas: r8a7796: Add CMM clocks
Jacopo Mondi
1
-0
/
+3
2019-05-21
clk: renesas: r8a779{5|6|65}: Add TPU clock
Cao Van Dong
1
-0
/
+1
2019-04-02
clk: renesas: rcar-gen3: Rename DRIF clocks
Takeshi Kihara
1
-8
/
+8
2019-04-02
clk: renesas: rcar-gen3: Correct parent clock of Audio-DMAC
Takeshi Kihara
1
-2
/
+2
2019-04-02
clk: renesas: rcar-gen3: Correct parent clock of SYS-DMAC
Takeshi Kihara
1
-2
/
+2
2019-04-02
clk: renesas: rcar-gen3: Correct parent clock of HS-USB
Kazuya Mizuguchi
1
-1
/
+1
2019-04-02
clk: renesas: rcar-gen3: Correct parent clock of EHCI/OHCI
Kazuya Mizuguchi
1
-2
/
+2
2019-04-02
clk: renesas: rcar-gen3: Remove CLK_TYPE_GEN3_Z2
Simon Horman
1
-1
/
+1
2019-04-02
clk: renesas: rcar-gen3: Parameterise Z and Z2 clock offset
Simon Horman
1
-2
/
+2
2019-04-02
clk: renesas: rcar-gen3: Parameterise Z and Z2 clock fixed divisor
Takeshi Kihara
1
-2
/
+3
2018-12-04
clk: renesas: r8a7796: Add CPEX clock
Geert Uytterhoeven
1
-0
/
+1
2018-10-19
Merge branch 'clk-renesas' into clk-next
Stephen Boyd
1
-33
/
+34
2018-08-31
clk: renesas: use SPDX identifier for Renesas drivers
Wolfram Sang
1
-4
/
+1
2018-08-27
clk: renesas: r8a7796: Add OSC EXTAL predivider configuration
Geert Uytterhoeven
1
-33
/
+33
2018-08-27
clk: renesas: rcar-gen3: Rename rint to .r
Geert Uytterhoeven
1
-1
/
+2
2018-02-12
clk: renesas: r8a7796: Add Z2 clock
Takeshi Kihara
1
-0
/
+1
2018-02-12
clk: renesas: r8a7796: Add Z clock
Takeshi Kihara
1
-0
/
+1
2018-01-05
clk: renesas: r8a7796: Add FDP clock
ABE Hiroshige
1
-0
/
+1
2017-10-16
clk: renesas: r8a7796: Correct parent clock of INTC-AP
Geert Uytterhoeven
1
-1
/
+1
2017-08-17
clk: renesas: r8a7796: Add USB3.0 clock
Hiromitsu Yamasaki
1
-0
/
+1
2017-08-16
clk: renesas: rcar-gen3: Add divider support for PLL1 and PLL3
Geert Uytterhoeven
1
-17
/
+17
2017-05-15
clk: renesas: r8a7796: Add INTC-EX clock
Takeshi Kihara
1
-0
/
+1
2017-05-15
clk: renesas: r8a7796: Add PCIe clocks
Harunobu Kurokawa
1
-0
/
+2
2017-05-15
clk: renesas: r8a7796: Add PWM clock
Ryo Kodama
1
-0
/
+1
2017-05-15
clk: renesas: r8a7796: Add HS-USB clock
Kazuya Mizuguchi
1
-0
/
+1
2017-05-15
clk: renesas: r8a7796: Add Sound DVC clocks
Kazuya Mizuguchi
1
-0
/
+2
2017-05-15
clk: renesas: r8a7796: Add Sound SRC clock
Kazuya Mizuguchi
1
-0
/
+13
2017-05-15
clk: renesas: r8a7796: Add Sound SSI clock
Kazuya Mizuguchi
1
-0
/
+11
2017-05-15
clk: renesas: r8a7796: Add USB-DMAC clocks
Hiromitsu Yamasaki
1
-0
/
+2
2017-05-15
clk: renesas: r8a7796: Add Audio-DMAC clocks
Hiromitsu Yamasaki
1
-0
/
+2
2017-05-15
clk: renesas: r8a7796: Add EHCI/OHCI clocks
Kazuya Mizuguchi
1
-0
/
+2
2017-05-15
clk: renesas: r8a7796: Add HDMI clock
Koji Matsuoka
1
-0
/
+2
2017-03-21
clk: renesas: rcar-gen3-cpg: Pass mode pins to rcar_gen3_cpg_init()
Geert Uytterhoeven
1
-1
/
+1
2017-03-21
clk: renesas: r8a7796: Reformat core clock table
Geert Uytterhoeven
1
-6
/
+6
2017-03-21
clk: renesas: r8a7796: Correct name of watchdog clock
Geert Uytterhoeven
1
-1
/
+1
2017-03-06
clk: renesas: r8a7796: Add IMR clocks
Sergei Shtylyov
1
-0
/
+2
2017-01-27
clk: renesas: r8a7796: Add IIC-DVFS clock
Khiem Nguyen
1
-0
/
+1
2016-12-27
clk: renesas: r8a7796: Add MSIOF controller clocks
Hiromitsu Yamasaki
1
-0
/
+5
2016-12-27
clk: renesas: r8a7796: Add CAN FD peripheral clock
Chris Paterson
1
-0
/
+1
2016-12-27
clk: renesas: r8a7796: Add CANFD clock
Chris Paterson
1
-0
/
+1
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