index
:
starfive-tech/linux.git
JH7100_VisionFive_OH_dev
JH7110_VisionFive2_510_devel
JH7110_VisionFive2_6.1.y_devel
JH7110_VisionFive2_6.6.y_devel
JH7110_VisionFive2_devel
JH7110_VisionFive2_upstream
beaglev-5.13.y
beaglev_fedora_devel
buildroot-upstream
esmil_starlight
fedora-vic-7100_5.10.6
master
openwrt-6.1.y
rt-ethercat-release
rt-linux-release
rtthread_AMP
starfive-5.13
starfive-5.15-dubhe
starfive-6.1-dubhe
starfive-6.1.65-dubhe
starfive-6.6.10-dubhe
starfive-6.6.31-dubhe
starlight-5.14.y
visionfive
visionfive-5.13.y-devel
visionfive-5.15.y
visionfive-5.15.y-devel
visionfive-5.15.y_fedora_devel
visionfive-5.16.y
visionfive-5.17.y
visionfive-5.18.y
visionfive-5.19.y
visionfive-6.4.y
visionfive_fedora_devel
StarFive Tech Linux Kernel for VisionFive (JH7110) boards (mirror)
Andrey V.Kosteltsev
summary
refs
log
tree
commit
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log msg
author
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path:
root
/
drivers
/
clk
/
rockchip
/
clk-cpu.c
Age
Commit message (
Expand
)
Author
Files
Lines
2022-11-14
clk: rockchip: allow additional mux options for cpu-clock frequency changes
Elaine Zhang
1
-0
/
+41
2022-11-14
clk: rockchip: add register offset of the cores select parent
Elaine Zhang
1
-8
/
+20
2021-03-21
clk: rockchip: support more core div setting
Elaine Zhang
1
-24
/
+29
2021-01-26
clk: rockchip: Remove unused/undocumented struct members from clk-cpu
Lee Jones
1
-4
/
+0
2019-06-19
treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 500
Thomas Gleixner
1
-4
/
+1
2017-09-28
clk: rockchip: Remove superfluous error message in rockchip_clk_register_cpuc...
Markus Elfring
1
-2
/
+0
2016-11-14
clk: rockchip: validity should be checked prior to cpu clock rate change
Elaine Zhang
1
-0
/
+9
2016-05-30
clk: rockchip: fix cpuclk registration error handling
Xing Zheng
1
-2
/
+2
2016-03-27
clk: rockchip: allow varying mux parameters for cpuclk pll-sources
Xing Zheng
1
-11
/
+18
2016-02-16
clk: rockchip: fix coding style for clk-cpu.c
Shawn Lin
1
-1
/
+1
2016-02-16
clk: rockchip: disable alt_parent clk in err cases when registering cpuclk
Shawn Lin
1
-2
/
+4
2015-12-10
clk: rockchip: allow more than 2 parents for cpuclk
Jeffy Chen
1
-2
/
+2
2015-07-20
clk: rockchip: Properly include clk.h
Stephen Boyd
1
-0
/
+1
2015-06-05
clk: make several parent names const
Uwe Kleine-König
1
-1
/
+1
2015-01-17
clk: rockchip: fix deadlock possibility in cpuclk
Heiko Stübner
1
-4
/
+6
2014-09-27
clk: rockchip: add new clock-type for the cpuclk
Heiko Stuebner
1
-0
/
+329