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starfive-tech/linux.git
JH7100_VisionFive_OH_dev
JH7110_VisionFive2_510_devel
JH7110_VisionFive2_6.1.y_devel
JH7110_VisionFive2_6.6.y_devel
JH7110_VisionFive2_devel
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starfive-5.13
starfive-5.15-dubhe
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starfive-6.1.65-dubhe
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starfive-6.6.31-dubhe
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visionfive-5.18.y
visionfive-5.19.y
visionfive-6.4.y
visionfive_fedora_devel
StarFive Tech Linux Kernel for VisionFive (JH7110) boards (mirror)
Andrey V.Kosteltsev
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path:
root
/
drivers
/
clk
/
samsung
/
clk-exynos7.c
Age
Commit message (
Expand
)
Author
Files
Lines
2021-04-07
clk: exynos7: Mark aclk_fsys1_200 as critical
Paweł Chmiel
1
-1
/
+6
2019-06-19
treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 500
Thomas Gleixner
1
-5
/
+1
2018-02-23
clk: samsung: Add compile time PLL rate validators
Andrzej Hajda
1
-1
/
+1
2018-02-23
clk: samsung: exynos7: Fix PLL rates
Andrzej Hajda
1
-1
/
+1
2016-06-02
clk: samsung: exynos7: Constify all clock initializers
Krzysztof Kozlowski
1
-57
/
+57
2016-06-02
clk: samsung: exynos7: Don't gate CMU_{CCORE, FSYS0} blocks clock
Alim Akhtar
1
-2
/
+3
2016-03-03
clk: samsung: Remove CLK_IS_ROOT
Stephen Boyd
1
-7
/
+5
2015-10-02
clk: samsung: exynos7: Staticize file scope symbols
Stephen Boyd
1
-2
/
+2
2015-09-15
clk: samsung: exynos7: Add required clock tree for UFS
Alim Akhtar
1
-0
/
+107
2015-09-15
clk: samsung: exynos7: Add missing fixed_clks to cmu_info
Alim Akhtar
1
-0
/
+2
2015-09-15
clk: samsung: exynos7: Correct CMU_FSYS1 clocks names
Alim Akhtar
1
-6
/
+10
2015-09-15
clk: samsung: exynos7: Correct CMU_FSYS0 clocks names
Alim Akhtar
1
-10
/
+14
2015-09-15
clk: samsung: exynos7: Correct CMU_PERIS clocks names
Alim Akhtar
1
-2
/
+2
2015-09-15
clk: samsung: exynos7: Correct CMU_PERIC1 clocks names
Alim Akhtar
1
-18
/
+20
2015-09-15
clk: samsung: exynos7: Correct CMU_PERIC0 clocks names
Alim Akhtar
1
-4
/
+8
2015-09-15
clk: samsung: exynos7: Correct CMU_CCORE clocks names
Alim Akhtar
1
-2
/
+2
2015-09-15
clk: samsung: exynos7: Correct CMU_TOP1 clocks names
Alim Akhtar
1
-23
/
+27
2015-09-15
clk: samsung: exynos7: Correct CMU_TOP0 clocks names
Alim Akhtar
1
-30
/
+37
2015-09-15
clk: samsung: exynos7: Adds missing clocks gates of CMU_TOPC
Alim Akhtar
1
-0
/
+27
2015-09-15
clk: samsung: exynos7: Change the CMU_TOPC block clock names
Alim Akhtar
1
-33
/
+37
2015-09-15
clk: samsung: exynos7: Correct nr_clk_ids for fsys1
Alim Akhtar
1
-1
/
+1
2015-09-15
clk: samsung: exynos7: Correct nr_clk_ids for fsys0
Alim Akhtar
1
-4
/
+4
2015-09-15
clk: samsung: exynos7: Fix CMU TOP1 block
Alim Akhtar
1
-9
/
+15
2015-09-15
clk: samsung: exynos7: Fix CMU TOPC block clock
Alim Akhtar
1
-6
/
+6
2015-07-20
clk: samsung: Properly include clk.h and clkdev.h
Stephen Boyd
1
-2
/
+0
2015-01-15
clk: samsung: exynos7: add clocks for audio block
Padmavathi Venna
1
-2
/
+141
2015-01-15
clk: samsung: exynos7: add clocks for SPI block
Padmavathi Venna
1
-0
/
+73
2015-01-15
clk: samsung: exynos7: add gate clock for DMA block
Padmavathi Venna
1
-0
/
+4
2014-12-23
clk: samsung: exynos7: Add required clock tree for USB
Vivek Gautam
1
-0
/
+64
2014-12-23
clk: samsung: exynos7: Add clocks for MSCL block
Tony K Nadackal
1
-0
/
+124
2014-10-31
clk: samsung: exynos7: add gate clock for ADC block
Abhilash Kesavan
1
-0
/
+2
2014-10-31
clk: samsung: exynos7: add gate clocks for WDT, TMU and PWM blocks
Naveen Krishna Ch
1
-0
/
+14
2014-10-31
clk: samsung: exynos7: add clocks for RTC block
Naveen Krishna Ch
1
-0
/
+54
2014-10-31
clk: samsung: exynos7: add clocks for MMC block
Naveen Krishna Ch
1
-0
/
+224
2014-10-31
clk: samsung: exynos7: add clocks for I2C block
Naveen Krishna Ch
1
-0
/
+24
2014-10-31
clk: samsung: add initial clock support for Exynos7 SoC
Naveen Krishna Ch
1
-0
/
+425