index
:
starfive-tech/linux.git
JH7100_VisionFive_OH_dev
JH7110_VisionFive2_510_devel
JH7110_VisionFive2_6.1.y_devel
JH7110_VisionFive2_6.6.y_devel
JH7110_VisionFive2_devel
JH7110_VisionFive2_upstream
beaglev-5.13.y
beaglev_fedora_devel
buildroot-upstream
esmil_starlight
fedora-vic-7100_5.10.6
master
openwrt-6.1.y
rt-ethercat-release
rt-linux-release
rtthread_AMP
starfive-5.13
starfive-5.15-dubhe
starfive-6.1-dubhe
starfive-6.1.65-dubhe
starfive-6.6.10-dubhe
starfive-6.6.31-dubhe
starlight-5.14.y
visionfive
visionfive-5.13.y-devel
visionfive-5.15.y
visionfive-5.15.y-devel
visionfive-5.15.y_fedora_devel
visionfive-5.16.y
visionfive-5.17.y
visionfive-5.18.y
visionfive-5.19.y
visionfive-6.4.y
visionfive_fedora_devel
StarFive Tech Linux Kernel for VisionFive (JH7110) boards (mirror)
Andrey V.Kosteltsev
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path:
root
/
drivers
/
clk
/
starfive
/
Kconfig
Age
Commit message (
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)
Author
Files
Lines
2023-07-19
clk: starfive: Add StarFive JH7110 Video-Output clock driver
Xingyu Wu
1
-0
/
+8
2023-07-19
clk: starfive: Add StarFive JH7110 Image-Signal-Process clock driver
Xingyu Wu
1
-0
/
+8
2023-07-19
clk: starfive: Add StarFive JH7110 System-Top-Group clock driver
Emil Renner Berthing
1
-0
/
+8
2023-07-19
clk: starfive: jh7110-sys: Add PLL clocks source from DTS
Xingyu Wu
1
-0
/
+1
2023-07-19
clk: starfive: Add StarFive JH7110 PLL clock driver
Xingyu Wu
1
-0
/
+8
2023-05-03
clk: starfive: Fix RESET_STARFIVE_JH7110 can't be selected in a specified case
Hal Feng
1
-4
/
+1
2023-04-05
clk: starfive: Add StarFive JH7110 always-on clock driver
Emil Renner Berthing
1
-0
/
+11
2023-04-05
clk: starfive: Add StarFive JH7110 system clock driver
Emil Renner Berthing
1
-0
/
+11
2023-04-05
clk: starfive: Factor out common JH7100 and JH7110 code
Emil Renner Berthing
1
-0
/
+5
2023-04-05
clk: starfive: Replace SOC_STARFIVE with ARCH_STARFIVE
Hal Feng
1
-3
/
+3
2022-03-11
clk: starfive: Add JH7100 audio clock driver
Emil Renner Berthing
1
-0
/
+8
2021-12-16
clk: starfive: Add JH7100 clock generator driver
Geert Uytterhoeven
1
-0
/
+9