index
:
starfive-tech/linux.git
JH7100_VisionFive_OH_dev
JH7110_VisionFive2_510_devel
JH7110_VisionFive2_6.1.y_devel
JH7110_VisionFive2_6.6.y_devel
JH7110_VisionFive2_devel
JH7110_VisionFive2_upstream
beaglev-5.13.y
beaglev_fedora_devel
buildroot-upstream
esmil_starlight
fedora-vic-7100_5.10.6
master
openwrt-6.1.y
rt-ethercat-release
rt-linux-release
rtthread_AMP
starfive-5.13
starfive-5.15-dubhe
starfive-6.1-dubhe
starfive-6.1.65-dubhe
starfive-6.6.10-dubhe
starfive-6.6.31-dubhe
starlight-5.14.y
visionfive
visionfive-5.13.y-devel
visionfive-5.15.y
visionfive-5.15.y-devel
visionfive-5.15.y_fedora_devel
visionfive-5.16.y
visionfive-5.17.y
visionfive-5.18.y
visionfive-5.19.y
visionfive-6.4.y
visionfive_fedora_devel
StarFive Tech Linux Kernel for VisionFive (JH7110) boards (mirror)
Andrey V.Kosteltsev
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path:
root
/
drivers
/
clk
/
sunxi-ng
/
ccu_common.c
Age
Commit message (
Expand
)
Author
Files
Lines
2024-04-16
clk: sunxi-ng: common: Support minimum and maximum rate
Frank Oltmanns
1
-0
/
+19
2023-08-09
clk: sunxi-ng: Add helper function to find closest rate
Frank Oltmanns
1
-0
/
+12
2021-11-23
clk: sunxi-ng: Allow the CCU core to be built as a module
Samuel Holland
1
-0
/
+3
2021-11-22
clk: sunxi-ng: Export symbols used by CCU drivers
Samuel Holland
1
-0
/
+3
2021-09-13
clk: sunxi-ng: Use a separate lock for each CCU instance
Samuel Holland
1
-4
/
+5
2021-09-13
clk: sunxi-ng: Unregister clocks/resets when unbinding
Samuel Holland
1
-14
/
+75
2019-08-16
clk: sunxi: Don't call clk_hw_get_name() on a hw that isn't registered
Stephen Boyd
1
-2
/
+3
2019-07-17
Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/cl...
Linus Torvalds
1
-1
/
+1
2019-06-18
clk: sunxi-ng: switch to of_clk_hw_register() for registering clks
Chen-Yu Tsai
1
-1
/
+1
2019-05-30
treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 157
Thomas Gleixner
1
-10
/
+1
2017-04-19
Merge tag 'sunxi-clk-for-4.12' of https://git.kernel.org/pub/scm/linux/kernel...
Stephen Boyd
1
-2
/
+2
2017-04-13
clk: sunxi-ng: Add clk notifier to gate then ungate PLL clocks
Chen-Yu Tsai
1
-0
/
+49
2017-04-06
clk: sunxi-ng: Display index when clock registration fails
Priit Laes
1
-2
/
+2
2017-02-07
clk: sunxi-ng: Check kzalloc() for errors and cleanup error path
Stephen Boyd
1
-0
/
+15
2017-01-30
clk: sunxi-ng: Support separately grouped PLL lock status register
Chen-Yu Tsai
1
-2
/
+7
2016-08-11
clk: sunxi-ng: Fix inverted test condition in ccu_helper_wait_for_lock
Chen-Yu Tsai
1
-1
/
+1
2016-07-09
clk: sunxi-ng: Add common infrastructure
Maxime Ripard
1
-0
/
+90