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path: root/drivers/clk
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2020-01-10clk: tegra: divider: Check UART's divider enable-bit state on rate's recalcul...Dmitry Osipenko1-2/+7
2020-01-10clk: tegra: clk-dfll: Remove call to pm_runtime_irq_safe()Sowjanya Komatineni1-2/+1
2020-01-09clk: qcom: Add ipq6018 Global Clock Controller supportSricharan R3-0/+4644
2020-01-08Merge tag 'cpuidle_psci-v5.5-rc4' of git://git.linaro.org/people/ulf.hansson/...Olof Johansson12-31/+56
2020-01-08clk: tegra: Mark fuse clock as criticalStephen Warren1-1/+5
2020-01-08clk: renesas: Prepare for split of R-Car H3 config symbolGeert Uytterhoeven1-1/+1
2020-01-08clk: divider: Add support for specifying parents via DT/pointersStephen Boyd1-81/+10
2020-01-07clk: meson: meson8b: make the CCF use the glitch-free mali muxMartin Blumenstingl1-4/+7
2020-01-07clk: gate: Add support for specifying parents via DT/pointersStephen Boyd1-17/+18
2020-01-07clk: mux: Add support for specifying parents via DT/pointersStephen Boyd1-40/+18
2020-01-07clk: asm9260: Use parent accuracy in fixed rate clkStephen Boyd1-4/+4
2020-01-07clk: fixed-rate: Add clk flags for parent accuracyStephen Boyd1-1/+6
2020-01-06clk: mmp2: Add HSIC clocksLubomir Rintel1-0/+6
2020-01-06clk: mmp2: Fix the order of timer mux parentsLubomir Rintel1-1/+1
2020-01-06clk: qcom: gcc-msm8996: Fix parent for CLKREF clocksBjorn Andersson1-7/+28
2020-01-06clk: qcom: rpmh: Add IPA clock for SC7180Taniya Das1-0/+1
2020-01-06clk: qcom: rpmh: skip undefined clocks when registeringTaniya Das1-1/+6
2020-01-06remove ioremap_nocache and devm_ioremap_nocacheChristoph Hellwig1-2/+2
2020-01-06clk: Add support for setting clk_rate via debugfsGeert Uytterhoeven1-1/+37
2020-01-06clk: at91: sam9x60: fix programmable clock prescalerEugen Hristev1-0/+1
2020-01-06clk: at91: sam9x60-pll: adapt PMC_PLL_ACR default valueEugen Hristev1-2/+6
2020-01-06clk: ti: dra7-atl: Remove pm_runtime_irq_safe()Peter Ujfalusi1-1/+0
2020-01-06clk: fixed-rate: Add support for specifying parents via DT/pointersStephen Boyd1-36/+20
2020-01-06clk: fixed-rate: Move to_clk_fixed_rate() to C fileStephen Boyd1-0/+2
2020-01-06clk: fixed-rate: Remove clk_register_fixed_rate_with_accuracy()Stephen Boyd1-16/+7
2020-01-06clk: fixed-rate: Convert to clk_hw based APIsStephen Boyd1-16/+15
2020-01-06clk: gpio: Use DT way of specifying parentsStephen Boyd1-113/+59
2020-01-05clk: qcom: gcc-sdm845: Add missing flag to votable GDSCsGeorgi Djakov1-0/+7
2020-01-05clk: Fix Kconfig indentationKrzysztof Kozlowski5-27/+27
2020-01-05clk: ux500: Fix up the SGA clock for some variantsLinus Walleij1-0/+2
2020-01-05clk: qcom: Add video clock controller driver for SC7180Taniya Das3-0/+268
2020-01-05clk: qcom: Add graphics clock controller driver for SC7180Taniya Das3-0/+275
2020-01-05clk: Warn about critical clks that fail to enableStephen Boyd1-1/+6
2020-01-05clk: qcom: apcs-msm8916: use clk_parent_data to specify the parentNiklas Cassel1-5/+5
2020-01-05clk: uniphier: Add SCSSI clock gate for each channelKunihiko Hayashi1-5/+8
2020-01-05Merge branch 'clk-register-dt-node-better' into clk-qcomStephen Boyd1-2/+25
2020-01-05clk: Use parent node pointer during registration if necessaryStephen Boyd1-2/+25
2020-01-04clk: sunxi: a23/a33: Export the MIPI PLLMaxime Ripard1-1/+3
2020-01-04clk: sunxi: a31: Export the MIPI PLLMaxime Ripard1-1/+3
2020-01-04clk: sunxi-ng: a64: export CLK_CPUX clock for DVFSVasily Khoruzhick1-1/+0
2020-01-04clk: sunxi-ng: add mux and pll notifiers for A64 CPU clockIcenowy Zheng1-1/+27
2020-01-03clk: sunxi-ng: r40: Export MBUS clockChen-Yu Tsai1-4/+0
2020-01-02clk: sunxi-ng: h6-r: Fix AR100/R_APB2 parent orderSamuel Holland1-2/+2
2020-01-02clk: sunxi-ng: h6-r: Simplify R_APB1 clock definitionSamuel Holland1-11/+1
2020-01-02clk: sunxi-ng: sun8i-r: Fix divider on APB0 clockSamuel Holland1-18/+3
2019-12-27clk: Don't try to enable critical clocks if prepare failedGuenter Roeck1-2/+8
2019-12-24clk: scmi: Match scmi device by both name and protocol idSudeep Holla1-1/+1
2019-12-24clk: bm1800: Remove set but not used variable 'fref'YueHaibing1-2/+1
2019-12-24clk: tegra: Fix double-free in tegra_clk_init()Dmitry Osipenko1-1/+3
2019-12-24clk: samsung: exynos5420: Keep top G3D clocks enabledMarek Szyprowski1-0/+8