index
:
starfive-tech/linux.git
JH7100_VisionFive_OH_dev
JH7110_VisionFive2_510_devel
JH7110_VisionFive2_6.1.y_devel
JH7110_VisionFive2_6.6.y_devel
JH7110_VisionFive2_devel
JH7110_VisionFive2_upstream
beaglev-5.13.y
beaglev_fedora_devel
buildroot-upstream
esmil_starlight
fedora-vic-7100_5.10.6
master
openwrt-6.1.y
rt-ethercat-release
rt-linux-release
rtthread_AMP
starfive-5.13
starfive-5.15-dubhe
starfive-6.1-dubhe
starfive-6.1.65-dubhe
starfive-6.6.10-dubhe
starfive-6.6.31-dubhe
starlight-5.14.y
visionfive
visionfive-5.13.y-devel
visionfive-5.15.y
visionfive-5.15.y-devel
visionfive-5.15.y_fedora_devel
visionfive-5.16.y
visionfive-5.17.y
visionfive-5.18.y
visionfive-5.19.y
visionfive-6.4.y
visionfive_fedora_devel
StarFive Tech Linux Kernel for VisionFive (JH7110) boards (mirror)
Andrey V.Kosteltsev
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path:
root
/
drivers
/
cxl
/
core
/
cdat.c
Age
Commit message (
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)
Author
Files
Lines
2024-04-08
cxl: Consolidate dport access_coordinate ->hb_coord and ->sw_coord into ->coord
Dave Jiang
1
-27
/
+47
2024-04-08
cxl: Fix incorrect region perf data calculation
Dave Jiang
1
-54
/
+40
2024-03-13
Merge branch 'for-6.9/cxl-fixes' into for-6.9/cxl
Dan Williams
1
-15
/
+15
2024-03-13
Merge branch 'for-6.9/cxl-qos' into for-6.9/cxl
Dan Williams
1
-14
/
+120
2024-03-13
lib/firmware_table: Provide buffer length argument to cdat_table_parse()
Robert Richter
1
-3
/
+3
2024-03-13
cxl: Fix the incorrect assignment of SSLBIS entry pointer initial location
Dave Jiang
1
-15
/
+15
2024-03-13
cxl/region: Deal with numa nodes not enumerated by SRAT
Dave Jiang
1
-0
/
+5
2024-03-12
cxl/region: Add memory hotplug notifier for cxl region
Dave Jiang
1
-0
/
+6
2024-03-12
cxl/region: Calculate performance data for a region
Dave Jiang
1
-0
/
+65
2024-03-12
cxl: Move QoS class to be calculated from the nearest CPU
Dave Jiang
1
-3
/
+3
2024-03-12
cxl: Split out host bridge access coordinates
Dave Jiang
1
-6
/
+22
2024-03-12
cxl: Split out combine_coordinates() for common shared usage
Dave Jiang
1
-9
/
+23
2024-02-17
cxl: Fix sysfs export of qos_class for memdev
Dave Jiang
1
-0
/
+1
2024-02-17
cxl: Remove unnecessary type cast in cxl_qos_class_verify()
Dave Jiang
1
-2
/
+1
2024-02-17
cxl: Change 'struct cxl_memdev_state' *_perf_list to single 'struct cxl_dpa_p...
Dave Jiang
1
-58
/
+24
2024-01-06
Merge branch 'for-6.7/cxl' into for-6.8/cxl
Dan Williams
1
-8
/
+6
2024-01-06
cxl: Fix device reference leak in cxl_port_perf_data_calculate()
Dave Jiang
1
-2
/
+5
2024-01-06
cxl: Convert find_cxl_root() to return a 'struct cxl_root *'
Dave Jiang
1
-7
/
+10
2023-12-23
cxl: Check qos_class validity on memdev probe
Dave Jiang
1
-0
/
+103
2023-12-23
cxl: Store QTG IDs and related info to the CXL memory device context
Dave Jiang
1
-0
/
+69
2023-12-23
cxl: Compute the entire CXL path latency and bandwidth data
Dave Jiang
1
-1
/
+58
2023-12-23
cxl: Add callback to parse the SSLBIS subtable from CDAT
Dave Jiang
1
-0
/
+98
2023-12-23
cxl: Add callback to parse the DSLBIS subtable from CDAT
Dave Jiang
1
-2
/
+100
2023-12-23
cxl: Add callback to parse the DSMAS subtables from CDAT
Dave Jiang
1
-0
/
+92