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path: root/drivers/cxl/core/port.c
AgeCommit message (Expand)AuthorFilesLines
2023-06-26Merge branch 'for-6.5/cxl-rch-eh' into for-6.5/cxlDan Williams1-45/+105
2023-06-26Merge branch 'for-6.5/cxl-perf' into for-6.5/cxlDan Williams1-0/+2
2023-06-26cxl/memdev: Formalize endpoint port linkageDan Williams1-2/+3
2023-06-26cxl/port: Rename CXL_DECODER_{EXPANDER, ACCELERATOR} => {HOSTONLYMEM, DEVMEM}Dan Williams1-3/+3
2023-06-25cxl/port: Store the downstream port's Component Register mappings in struct c...Robert Richter1-0/+11
2023-06-25cxl/port: Store the port's Component Register mappings in struct cxl_portRobert Richter1-0/+27
2023-06-25cxl/pci: Early setup RCH dport component registers from RCRBRobert Richter1-0/+7
2023-06-25cxl/port: Remove Component Register base address from struct cxl_dportRobert Richter1-1/+0
2023-06-25cxl: Rename 'uport' to 'uport_dev'Dan Williams1-28/+33
2023-06-25cxl: Rename member @dport of struct cxl_dport to @dport_devRobert Richter1-10/+10
2023-06-25cxl/rch: Prepare for caching the MMIO mapped PCIe AER capabilityDan Williams1-2/+2
2023-06-25cxl/acpi: Probe RCRB later during RCH downstream port creationRobert Richter1-5/+16
2023-05-30cxl/pci: Find and register CXL PMU devicesJonathan Cameron1-0/+2
2023-05-20cxl/port: Fix NULL pointer access in devm_cxl_add_port()Robert Richter1-4/+3
2023-04-30Merge tag 'cxl-for-6.4' of git://git.kernel.org/pub/scm/linux/kernel/git/cxl/cxlLinus Torvalds1-1/+0
2023-04-27Merge tag 'driver-core-6.4-rc1' of git://git.kernel.org/pub/scm/linux/kernel/...Linus Torvalds1-1/+1
2023-04-18cxl/core: Drop unused io-64-nonatomic-lo-hi.hDan Williams1-1/+0
2023-04-05cxl/port: Fix find_cxl_root() for RCDs and simplify itDan Williams1-31/+7
2023-03-23driver core: bus: mark the struct bus_type for sysfs callbacks as constantGreg Kroah-Hartman1-1/+1
2023-02-25Merge tag 'cxl-for-6.3' of git://git.kernel.org/pub/scm/linux/kernel/git/cxl/cxlLinus Torvalds1-40/+83
2023-02-11Merge branch 'for-6.3/cxl-ram-region' into cxl/nextDan Williams1-39/+53
2023-02-11cxl/dax: Create dax devices for CXL RAM regionsDan Williams1-1/+3
2023-02-11tools/testing/cxl: Define a fixed volatile configuration to parseDan Williams1-0/+2
2023-02-11cxl/region: Add region autodiscoveryDan Williams1-0/+2
2023-02-11cxl/region: Add volatile region creation supportDan Williams1-1/+13
2023-02-11cxl/region: Add a mode attribute for regionsDan Williams1-11/+1
2023-02-11cxl/memdev: Fix endpoint port removalDan Williams1-26/+32
2023-01-27driver core: make struct bus_type.uevent() take a const *Greg Kroah-Hartman1-4/+4
2023-01-27cxl: fix spelling mistakesRandy Dunlap1-1/+1
2023-01-26cxl/port: Link the 'parent_dport' in portX/ and endpointX/ sysfsDan Williams1-0/+29
2022-12-05Merge branch 'for-6.2/cxl-xor' into for-6.2/cxlDan Williams1-3/+6
2022-12-05Merge branch 'for-6.2/cxl-aer' into for-6.2/cxlDan Williams1-1/+1
2022-12-05cxl/port: Add RCD endpoint port enumerationDan Williams1-0/+7
2022-12-05cxl/mem: Move devm_cxl_add_endpoint() from cxl_core to cxl_memDan Williams1-39/+0
2022-12-04cxl/acpi: Support CXL XOR Interleave Math (CXIMS)Alison Schofield1-3/+6
2022-12-04cxl/core/regs: Make cxl_map_{component, device}_regs() device genericDan Williams1-1/+1
2022-12-03cxl/acpi: Extract component registers of restricted hosts from RCRBRobert Richter1-6/+47
2022-12-03cxl/acpi: Move rescan to the workqueueDan Williams1-2/+17
2022-11-14cxl: Unify debug messages when calling devm_cxl_add_dport()Robert Richter1-14/+34
2022-11-14cxl: Unify debug messages when calling devm_cxl_add_port()Robert Richter1-12/+39
2022-11-05cxl/region: Fix 'distance' calculation with passthrough portsDan Williams1-2/+9
2022-08-02cxl/region: Delete 'region' attribute from root decodersDan Williams1-1/+2
2022-07-26cxl/region: Introduce cxl_pmem_region objectsDan Williams1-0/+2
2022-07-26cxl/region: Add region driver boiler plateDan Williams1-0/+9
2022-07-25cxl/hdm: Commit decoder state to hardwareDan Williams1-0/+1
2022-07-25cxl/region: Program target listsDan Williams1-3/+1
2022-07-25cxl/region: Attach endpoint decodersDan Williams1-7/+3
2022-07-25cxl/acpi: Add a host-bridge index lookup mechanismDan Williams1-0/+16
2022-07-25cxl/region: Enable the assignment of endpoint decoders to regionsDan Williams1-0/+9
2022-07-22cxl/region: Add region creation supportBen Widawsky1-0/+39
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