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path: root/drivers/gpu/drm/amd/amdgpu/navi10_ih.c
AgeCommit message (Expand)AuthorFilesLines
2024-04-27drm/amdgpu: add protype for print ip stateSunil Khatri1-0/+1
2024-04-27drm/amdgpu: add prototype for ip dumpSunil Khatri1-0/+1
2024-01-31drm/amdgpu: Reset IH OVERFLOW_CLEAR bitFriedrich Vock1-0/+6
2024-01-16drm/amdgpu: Clean up errors in navi10_ih.cchenxuebing1-2/+1
2023-10-06drm/amdgpu: Drop unnecessary return statementsSrinivasan Shanmugam1-4/+0
2023-09-20drm/amdgpu: Use function for IP version checkLijo Lazar1-2/+2
2023-07-12drm/amdgpu: Increase soft IH ring sizePhilip Yang1-2/+2
2022-08-17drm/amdgpu: Fix interrupt handling on ih_soft ringMukul Joshi1-1/+6
2022-05-04drm/amdgpu: simplify the return expression of navi10_ih_hw_init()Minghao Chi1-6/+1
2022-04-09drm/amdgpu: expand cg_flags from u32 to u64Evan Quan1-1/+1
2021-12-02drm/amdgpu: handle IH ring1 overflowPhilip Yang1-0/+1
2021-11-24drm/amdgpu: enable Navi retry fault wptr overflowPhilip Yang1-21/+12
2021-11-24drm/amdgpu: enable Navi 48-bit IH timestamp counterPhilip Yang1-0/+1
2021-10-04drm/amdgpu: convert IP version array to include instancesAlex Deucher1-2/+2
2021-10-04drm/amdgpu/navi10_ih: convert to IP version checkingAlex Deucher1-8/+5
2021-06-08drm/amdgpu: Use PSP to program IH_RB_CNTL_RING1/2 on SRIOVRohit Khaire1-5/+15
2021-06-04drm/amdgpu: add yellow carp support for ih blockAaron Liu1-0/+1
2021-05-22Merge drm/drm-next into drm-misc-nextThomas Zimmermann1-2/+19
2021-05-20drm/amdgpu: Handle IOMMU enabled case.Andrey Grodzovsky1-4/+0
2021-05-20drm/amdgpu: Split amdgpu_device_fini into early and lateAndrey Grodzovsky1-1/+1
2021-05-20drm/amd/amdgpu: psp program IH_RB_CTRL on sienna_cichlidYuBiao Wang1-2/+18
2021-05-20drm/amd/amdgpu: add ih ip block for beige_gobyChengming Gui1-0/+1
2020-12-23drm/amdgpu: drop psp ih programming for sriov guest on naviHawking Zhang1-16/+2
2020-12-23drm/amdgpu: de-initialize software ih ringHawking Zhang1-0/+1
2020-12-23drm/amdgpu: set ih soft ring enabled flag for vega and naviHawking Zhang1-0/+3
2020-12-23drm/amdgpu: retire the vega20 code path from navi10 ih blockHawking Zhang1-38/+2
2020-12-23drm/amdgpu: switch to common decode iv helperHawking Zhang1-46/+1
2020-12-23drm/amdgpu: use cached ih rb control reg offsets for navi10Hawking Zhang1-38/+14
2020-12-23drm/amdgpu: switch to ih_enable_ring for navi10Hawking Zhang1-90/+12
2020-12-23drm/amdgpu: switch to ih_toggle_interrupts for navi10Hawking Zhang1-133/+33
2020-12-23drm/amdgpu: switch to ih_init_register_offset for navi10Hawking Zhang1-0/+3
2020-12-23drm/amdgpu: add helper to toggle ih ring interrupts for navi10Hawking Zhang1-0/+45
2020-12-23drm/amdgpu: add helper to enable an ih ring for navi10Hawking Zhang1-0/+52
2020-12-23drm/amdgpu: add helper to init ih ring regs for navi10Hawking Zhang1-0/+47
2020-12-02drm/amd/amdgpu/navi10_ih: Add descriptions for 'ih' and 'entry'Lee Jones1-0/+5
2020-11-24drm/amdgpu: enabled software IH ring for NaviChristian König1-0/+7
2020-10-12drm/amdgpu: add ih ip block for dimgrey_cavefishTao Zhou1-0/+1
2020-10-05drm/amdgpu: use gpu virtual address for interrupt packet write space for vangoghHuang Rui1-2/+5
2020-10-05drm/amdgpu: add van gogh support for ih blockHuang Rui1-0/+1
2020-09-03drm/amdgpu: enable ih1 ih2 for Arcturus onlyAlex Sierra1-11/+19
2020-07-21drm/amdgpu: add timeout flush mechanism to update wptr for self interrupt (v2)Chengming Gui1-0/+45
2020-07-15drm/amdgpu: add ih ip block for navy_flounderJiansong Chen1-0/+1
2020-06-03drm/amdgpu: add ih ip block for sienna_cichlidLikun Gao1-4/+17
2020-04-04amdgpu/drm: remove psp access on navi10 for sriovAlex Sierra1-9/+9
2020-04-01drm/amdgpu: reroute VMC and UMD to IH ring 1 for oss v5Alex Sierra1-0/+19
2020-04-01drm/amdgpu: call psp to program ih cntl in SR-IOV for NaviAlex Sierra1-10/+80
2020-04-01drm/amdgpu: enable IH ring 1 and ring 2 for naviAlex Sierra1-16/+189
2020-03-05drm/amdgpu: Rearm IRQ in Navi10 SR-IOV if IRQ lostSamir Dhume1-0/+36
2020-01-23drm/amdgpu: remove unnecessary conversion to boolNirmoy Das1-1/+1
2019-12-23drm/amdgpu: Remove unneeded variable 'ret' in navi10_ih.cMa Feng1-2/+1