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path: root/drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c
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2016-05-11drm/amdgpu: move context switch handling into common code v2Christian König1-1/+1
It was a source of bugs to repeat that in each IP version. v2: rename parameter Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-11drm/amd/amdgpu: Add name field to amd_ip_funcs (v2)Tom St Denis1-0/+1
Add name that we can print out in kernel messages to aid in debugging. v2: drop DAL changes for upstream Signed-off-by: Tom St Denis <tom.stdenis@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-11drm/amdgpu: keep vm in job instead of ib (v2)Monk Liu1-1/+1
ib.vm is a legacy way to get vm, after scheduler implemented vm should be get from job, and all ibs from one job share the same vm, no need to keep ib.vm just move vm field to job. this patch as well add job as paramter to ib_schedule so it can get vm from job->vm. v2: agd: sqaush in: drm/amdgpu: check if ring emit_vm_flush exists in vm flush No vm flush on engines that don't support VM. bug: https://bugs.freedesktop.org/show_bug.cgi?id=95195 Signed-off-by: Monk Liu <Monk.Liu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-05drm/amd/amdgpu: Drop print_status callbacks.Tom St Denis1-54/+0
First patch in series to move to user mode debug tools we're removing the print_status callbacks. These functions were unused at the moment anyway. Signed-off-by: Tom St Denis <tom.stdenis@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-05drm/amdgpu: reduce the ring size for SDMAChristian König1-1/+1
Those are way too large. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-05drm/amdgpu: use max_dw in ring_initChristian König1-1/+1
Instead of specifying the total ring size calculate that from the maximum number of dw a submission can have and the number of concurrent submissions. This fixes UVD with 8 concurrent submissions or more. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-03-17drm/amdgpu: move ib.fence to job.fenceMonk Liu1-0/+1
Signed-off-by: Monk Liu <Monk.Liu@amd.com> Reviewed-by: Chunming Zhou <david1.zhou@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-03-17drm/amdgpu: give a fence param to ib_freeMonk Liu1-1/+1
thus amdgpu_ib_free() can hook sched fence to SA manager in later patches. BTW: for amdgpu_free_job(), it should only fence_put() the fence of the last ib once, so fix it as well in this patch. Signed-off-by: Monk Liu <Monk.Liu@amd.com> Reviewed-by: Chunming Zhou <david1.zhou@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-03-17drm/amdgpu: include the right version of gmc header files for icelandKen Wang1-2/+2
Signed-off-by: Ken Wang <Qingqing.Wang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
2016-03-10drm/amdgpu: split pipeline sync out of SDMA vm_flush() as wellChristian König1-6/+17
Code it similar to how we did it for the gfx and compute engines. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-03-08drm/amdgpu: remove HW fence ownerChristian König1-2/+1
Not used any more since we now always use the sheduler. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
2016-03-08drm/amdgpu: add hdp invalidation for sdma v2_4Chunming Zhou1-0/+8
Signed-off-by: Chunming Zhou <David1.Zhou@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-03-08drm/amdgpu: wait engine idle before vm flush for sdmaChunming Zhou1-0/+15
Signed-off-by: Chunming Zhou <David1.Zhou@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-29drm/amdgpu: fix VM faults caused by vm_grab_id() v4Christian König1-1/+1
The owner must be per ring as long as we don't support sharing VMIDs per process. Also move the assigned VMID and page directory address into the IB structure. v3: assign the VMID to all IBs, not just the first one. v4: use correct pointer for owner Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Chunming Zhou <david1.zhou@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-12drm/amdgpu/vi: move sdma tiling config setup into sdma codeAlex Deucher1-0/+5
Split sdma and gfx programming. Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-12drm/amdgpu: use SDMA round robin for VM updates v3Christian König1-1/+7
Distribute the load on both rings. v2: use a loop for the initialization v3: agd: rebase on upstream Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-12drm/amdgpu: remove is_pte_ringChristian König1-1/+0
Not used for anything. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-10drm/amdgpu: move sync into job objectChristian König1-1/+2
No need to keep that for every IB. Signed-off-by: Christian König <christian.koenig@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-10drm/amdgpu: send SDMA/GFX IB tests directly to the ring againChristian König1-3/+1
There is no point in sending them through the scheduler. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucer@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-10drm/amdgpu: move ring from IBs into jobChristian König1-1/+1
We can't submit to multiple rings at the same time anyway. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucer@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-10drm/amdgpu: make pad_ib a ring function v3Christian König1-4/+4
The padding depends on the firmware version and we need that for BO moves as well, not only for VM updates. v2: new approach of making pad_ib a ring function v3: fix typo in macro name Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucer@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-10drm/amdgpu: move more logic into amdgpu_vm_map_gart v3Christian König1-9/+2
No need to duplicate that code over and over again. Also stop using the flags to determine if we need to map the addresses. v2: constify the pages_addr v3: rebased, fix typo in commit message Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-10drm/amdgpu: remove the ring lock v2Christian König1-2/+2
It's not needed any more because all access goes through the scheduler now. v2: Update commit message. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Chunming Zhou <david1.zhou@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-10drm/amdgpu: remove some more semaphore leftoversAlex Deucher1-1/+0
No longer needed since semaphores were removed. Reviewed-by: Christian König <christian.koenig@amd.com> Reviewed-by: Chunming Zhou <David1.Zhou@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-10drm/amdgpu: clean up hw semaphore support in driverChunming Zhou1-26/+1
No longer used. Signed-off-by: Chunming Zhou <David1.Zhou@amd.com> Reviewed-by: Ken Wang <Qingqing.Wang@amd.com> Reviewed-by: Monk Liu <monk.liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-10-21drm/amdgpu: remove old lockup detection infrastructureChristian König1-19/+0
It didn't worked to well anyway. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Chunming Zhou <david1.zhou@amd.com> Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com>
2015-10-14drm/amdgpu: rework sdma structuresAlex Deucher1-84/+72
Rework the sdma structures in the driver to consolidate all of the sdma info into a single structure and allow for asics that may have different numbers of sdma instances. Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-09-02drm/amdgpu: implement burst NOP for SDMAJammy Zhou1-5/+29
Customize the insert_nop func for SDMA rings, and use burst NOP for ring/IB submissions in other places as well Signed-off-by: Jammy Zhou <Jammy.Zhou@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-09-02drm/amdgpu: add insert_nop ring func and default implementationJammy Zhou1-0/+1
The insert_nop function is added to amdgpu_ring_funcs structure as well as the default implementation Signed-off-by: Jammy Zhou <Jammy.Zhou@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-09-02drm/amdgpu: add burst_nop flag for sdmaJammy Zhou1-0/+2
The burst NOP is supported for SDMA when feature_version is >= 20. Signed-off-by: Jammy Zhou <Jammy.Zhou@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-08-28drm/amdgpu: use IB for fill_buffer instead of direct commandChunming Zhou1-6/+6
Signed-off-by: Chunming Zhou <david1.zhou@amd.com> Reviewed-by: Christian K?nig <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-08-27drm/amdgpu: use IB for copy buffer of evictionChunming Zhou1-9/+9
This aids handling buffers moves with the scheduler. Signed-off-by: Chunming Zhou <david1.zhou@amd.com> Reviewed-by: Christian K?nig <christian.koenig@amd.com>
2015-08-21drm/amdgpu: fix zeroing all IB fields manually v2Christian König1-0/+1
The problem now is that we don't necessarily call amdgpu_ib_get() in some error paths and so work with uninitialized data. Better require that the memory is already zeroed. v2: better commit message Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Chunming Zhou <david1.zhou@amd.com> (v1) Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-08-17drm/amdgpu: add reference for **fenceChunming Zhou1-0/+1
fix fence is released when pass to **fence sometimes. add reference for it. Signed-off-by: Chunming Zhou <david1.zhou@amd.com> Reviewed-by: Christian K?nig <christian.koenig@amd.com>
2015-08-17drm/amdgpu: add kernel fence in ib_submit_kernel_helperChunming Zhou1-2/+4
every sbumission should be able to get a fence. Signed-off-by: Chunming Zhou <david1.zhou@amd.com> Reviewed-by: Christian K?nig <christian.koenig@amd.com> Reviewed-by: Jammy Zhou <jammy.zhou@amd.com>
2015-08-17drm/amdgpu: use kernel fence for sdma ib testChunming Zhou1-1/+1
Signed-off-by: Chunming Zhou <david1.zhou@amd.com> Reviewed-by: Christian K?nig <christian.koenig@amd.com> Reviewed-by: Jammy Zhou <jammy.zhou@amd.com>
2015-08-17drm/amdgpu: use gpu scheduler for sdma ib testChunming Zhou1-14/+12
Signed-off-by: Chunming Zhou <david1.zhou@amd.com> Reviewed-by: Christian K?nig <christian.koenig@amd.com>
2015-08-17drm/amdgpu: prepare job before push to sw queue for pte ringChunming Zhou1-0/+1
user mode will still use pte ring as a normal ring. if the prepare job generates another command(update pte) on its ring in scheduler, then will kill scheduler which is going to waiting later job but pending running job. Signed-off-by: Chunming Zhou <david1.zhou@amd.com> Acked-by: Christian K?nig <christian.koenig@amd.com> Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
2015-08-05drm/amdgpu: set fw_version and feature_version for smu fw loadingJammy Zhou1-3/+4
The fw_version and feature_verion should be set correctly when the firmwares are loaded by SMU on Tonga/Carrzio/Iceland Signed-off-by: Jammy Zhou <Jammy.Zhou@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com>
2015-08-05drm/amdgpu: add feature version for SDMA ucodeJammy Zhou1-0/+1
Signed-off-by: Jammy Zhou <Jammy.Zhou@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com>
2015-06-05drm/amdgpu: disable user fence interrupt (v2)Chunming Zhou1-2/+3
amdgpu submits both kernel and user fences, but just need one interrupt, disable user fence interrupt and don't effect user fence. v2: fix merge error Signed-off-by: Chunming Zhou <david1.zhou@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-06-04drm/amdgpu: remove all sh mem register modification in vm flushmonk.liu1-38/+0
Leave that at the values set during init. No need to update them repeatedly. Signed-off-by: monk.liu <monk.liu@amd.com> Signed-off-by: David Zhang <david1.zhang@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Reviewed-by: Jammy Zhou <jammy.zhou@amd.com>
2015-06-04drm/amdgpu: rename amdgpu_ip_funcs to amd_ip_funcs (v2)yanyang11-19/+32
The structure is renamed and moved to amd_shared.h to make the component independent. This makes it easier to add new components in the future. v2: fix include path Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com> Signed-off-by: yanyang1 <young.yang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-06-04drm/amdgpu: switch to amdgpu folder for firmware files v2Jammy Zhou1-4/+4
v2: keep using radeon folder for CIK Signed-off-by: Jammy Zhou <Jammy.Zhou@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com>
2015-06-04drm/amdgpu: cleanup HDP flush handlingChristian König1-11/+2
Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com> Reviewed-by: Monk Liu <monk.liu@amd.com>
2015-06-04drm/amdgpu: allow unaligned memory access (v2)Jack Xiao1-1/+4
Set up the CP and SDMA for proper unaligned memory access. Required for OpenCL 2.x v2: udpate commit message Signed-off-by: Jack Xiao <Jack.Xiao@amd.com> Reviewed-by: Monk Liu <monk.liu@amd.com> Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
2015-06-04drm/amdgpu: Add initial VI supportAlex Deucher1-0/+1447
This adds initial support for VI asics. This includes Iceland, Tonga, and Carrizo. Our inital focus as been Carrizo, so there are still gaps in support for Tonga and Iceland, notably power management. Acked-by: Christian König <christian.koenig@amd.com> Acked-by: Jammy Zhou <Jammy.Zhou@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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