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path: root/drivers/gpu/drm/i915/gvt/interrupt.c
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2018-06-13drm/i915/gvt: Enable irq initialization for BXT.Colin Xu1-9/+5
Initialize BXT irq handler as SKL/KBL. v2: All supported platforms share the same irq ops and map. Remove the platform check by now and let is_supported_device() be the gate keeper. Signed-off-by: Colin Xu <colin.xu@intel.com> Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
2018-06-11drm/i915/gvt: Avoid dereference a potential null pointerXinyun Liu1-1/+2
Add sanity check for up_irq_info. Signed-off-by: Xinyun Liu <xinyun.liu@intel.com> Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
2017-06-08drm/i915/gvt: Change flood gvt dmesg into traceXiong Zhang1-10/+10
Currently gvt dmesg is so heavy at drm.debug=0x2 that guest and host almost couldn't run on xengt. This patch transfer these repeated messages into trace, so dmesg is light at drm.debug=0x2, and user could get the target message through trace event and trace filter. Suggested-by: Zhi Wang <zhi.a.wang@intel.com> Signed-off-by: Xiong Zhang <xiong.y.zhang@intel.com> Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
2017-03-29drm/i915/gvt: Add KBL dispatch logic in each function.Xu Han1-2/+3
Extend function dispatch logic to support KBL platform. Signed-off-by: Xu Han <xu.han@intel.com> Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
2017-02-14drm/i915/gvt: add sprite plane flip done support.Xu Han1-0/+4
* Add flip done event support for sprite plane on SKL platform. * Fix bug #1452, "Call Trace:handle_default_event_virt+0xef/0x100 [i915]" while booting up guest. Signed-off-by: Xu Han <xu.han@intel.com> Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
2017-02-09drm/i915/gvt: reduce the line of interrupt logs and log friendlyChangbin Du1-42/+11
Reduce the line of logs in below functions and log friendly. o intel_vgpu_reg_imr_handler o intel_vgpu_reg_master_irq_handler o intel_vgpu_reg_ier_handler o intel_vgpu_reg_iir_handler Signed-off-by: Changbin Du <changbin.du@intel.com> Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
2016-10-20drm/i915/gvt: mark symbols static where possibleDu, Changbin1-1/+1
Mark all local functions & variables as static. Signed-off-by: Du, Changbin <changbin.du@intel.com> Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
2016-10-20drm/i915/gvt: clean up intel_gvt.h as interface for i915 coreZhenyu Wang1-0/+1
i915 core should only call functions and structures exposed through intel_gvt.h. Remove internal gvt.h and i915_pvinfo.h. Change for internal intel_gvt structure as private handler which not requires to expose gvt internal structure for i915 core. v2: Fix per Chris's comment - carefully handle dev_priv->gvt assignment - add necessary bracket for macro helper - forward declartion struct intel_gvt - keep free operation within same file handling alloc v3: fix use after free and remove intel_gvt.initialized v4: change to_gvt() to an inline Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
2016-10-14drm/i915/gvt: vGPU display virtualizationZhi Wang1-0/+26
This patch introduces the GVT-g display virtualization. It consists a collection of display MMIO handlers, like power well register handler, pipe register handler, plane register handler, which will emulate all display MMIOs behavior to support virtual mode setting sequence for guest. Signed-off-by: Bing Niu <bing.niu@intel.com> Signed-off-by: Zhi Wang <zhi.a.wang@intel.com> Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
2016-10-14drm/i915/gvt: vGPU interrupt virtualization.Zhi Wang1-0/+714
This patch introduces vGPU interrupt emulation framework. The vGPU intrerrupt emulation framework is an event-based interrupt emulation framework. It's responsible for emulating GEN hardware interrupts during emulating other HW behaviour. It consists several components: - Descriptions of interrupt register bit - Upper level <-> lower level interrupt mapping - GEN HW IER/IMR/IIR register emulation routines - Event-based interrupt propagation interface When a GVT-g component wants to inject an interrupt to a VM during a emulation, first it should specify the event needs to be emulated and the framework will deal with the rest of emulation: - Generating related virtual IIR bit according to virtual IER and IMRs, - Generate related virtual upper level virtual IIR bit accodring to the per-platform interrupt mapping - Injecting a MSI to VM Signed-off-by: Zhi Wang <zhi.a.wang@intel.com> Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>