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path: root/drivers/irqchip/irq-sun4i.c
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2014-03-19irqchip: sun4i: Simplify sun4i_irq_ackHans de Goede1-6/+1
Now that we only ack irq 0 the code can be simplified a lot. Also switch from read / modify / write to a simple write clear: 1) This is what the android code does (it has a hack for acking irq 0 in its unmask code doing this) 2) read / modify / write simply does not make sense for an irq status register like this, if the other bits are writeable (and the data sheet says they are not) they should be write 1 to clear, since otherwise a read / modify / write can race with a device raising an interrupt and then clear the pending bit unintentionally Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Cc: linux-arm-kernel@lists.infradead.org Cc: linux-sunxi@googlegroups.com Link: http://lkml.kernel.org/r/1394895894-8891-3-git-send-email-hdegoede@redhat.com Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2014-03-19irqchip: sun4i: Use handle_fasteoi_irq for all interruptsHans de Goede1-14/+4
Since the sun4i irq chip does not require any action and clears the interrupt when the level goes back to inactive, we don't need to mask / unmask for non oneshot IRQs, to achieve this we make sun4i_irq_ack a nop for all irqs except irq 0 and use handle_fasteoi_irq for all interrupts. Now there might be a case when the device reactivates the interrupt before the RETI. But that does not matter as we run the primary interrupt handlers with interrupts disabled. This also allows us to get rid of needing to use 2 irq_chip structs, this means that the IRQCHIP_EOI_THREADED | IRQCHIP_EOI_IF_HANDLED will now influence all interrupts rather then just irq 0, but that does not matter as the eoi is now a nop anyways for all interrupts but irq 0. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Cc: linux-arm-kernel@lists.infradead.org Cc: linux-sunxi@googlegroups.com Link: http://lkml.kernel.org/r/1394895894-8891-2-git-send-email-hdegoede@redhat.com Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2014-03-14irqchip: sun4i: Don't ack IRQs > 0, fix acking of IRQ 0Hans de Goede1-3/+16
All IRQs except for IRQ 0 seem to not need acking, so drop acking for them. The ENMI needs to have the ack done *after* clearing the interrupt source, otherwise we will get a spurious interrupt for each real interrupt. So use the new IRQCHIP_EOI_THREADED flag for this in combination with handle_fasteoi_irq. This uses a separate irq_chip struct for IRQ 0, since we only want this behavior for IRQ 0. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Cc: linux-arm-kernel@lists.infradead.org Cc: linux-sunxi@googlegroups.com Cc: Maxime Ripard <maxime.ripard@free-electrons.com> Link: http://lkml.kernel.org/r/1394733834-26839-5-git-send-email-hdegoede@redhat.com Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2014-03-14irqchip: sun4i: Fix a comment about mask register initializationHans de Goede1-1/+1
The comment was claiming that we were masking all irqs, while the code actually *un*masks all of them. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Cc: linux-arm-kernel@lists.infradead.org Cc: linux-sunxi@googlegroups.com Link: http://lkml.kernel.org/r/1394733834-26839-4-git-send-email-hdegoede@redhat.com Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2014-03-14irqchip: sun4i: Fix irq 0 not workingHans de Goede1-2/+16
SUN4I_IRQ_VECTOR_REG containing 0 can mean one of 3 things: 1) no more irqs pending 2) irq 0 pending 3) spurious irq So if we immediately get a reading of 0, check the irq-pending reg to differentiate between 2 and 3. We only do this once to avoid the extra check in the common case of 1) hapening after having read the vector-reg once. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Cc: linux-arm-kernel@lists.infradead.org Cc: linux-sunxi@googlegroups.com Link: http://lkml.kernel.org/r/1394733834-26839-3-git-send-email-hdegoede@redhat.com Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2014-03-14irqchip: sunxi: Change compatiblesMaxime Ripard1-1/+1
The Allwinner A10 compatibles were following a slightly different compatible patterns than the rest of the SoCs for historical reasons. Change the compatibles to match the other pattern in the irq controller driver for consistency. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Cc: linux-arm-kernel@lists.infradead.org Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2014-03-12irqchip: Remove asmlinkage from static functionsStephen Boyd1-2/+2
LTO patches add __visible to the asmlinkage define, causing compilation warnings like: drivers/irqchip/irq-gic.c:283:1: warning: 'externally_visible' attribute have effect only on public objects [-Wattributes] Drop asmlinkage here to avoid such warnings. Reported-by: Olof's autobuilder <build@lixom.net> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Cc: linux-arm-kernel@lists.infradead.org Cc: khilman@linaro.org Cc: Russell King <linux@arm.linux.org.uk> Cc: Josh Cartwright <joshc@codeaurora.org> Cc: Andi Kleen <ak@linux.intel.com> Link: http://lkml.kernel.org/r/1393980030-17770-1-git-send-email-sboyd@codeaurora.org Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2013-07-05irqchip: sun4i: Staticize sun4i_irq_ack()Axel Lin1-1/+1
sun4i_irq_ack() is only referenced in this file, so make it static. Signed-off-by: Axel Lin <axel.lin@ingics.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Link: http://lkml.kernel.org/r/1373010070.14756.2.camel@phoenix Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2013-04-08irqchip: sunxi: Rename sunxi to sun4iMaxime Ripard1-0/+149
During the introduction of the Allwinner SoC platforms, sunxi was initially meant as a generic name for all the variants of the Allwinner SoC. It was ok at the time of the support of only the A10 and A13 that looks pretty much the same, but it's beginning to be troublesome with the future addition of the Allwinner A31 (sun6i) that is quite different, and would introduce some weird logic, where sunxi would actually mean in some case sun4i and sun5i but without sun6i... Moreover, it makes the compatible strings naming scheme not consistent with other architectures, where usually for this kind of compability, we just use the oldest SoC name that has this IP, so let's do just this. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>