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2020-10-12mtd: hyperbus: Fix build failure when only RPCIF_HYPERBUS is enabledVignesh Raghavendra1-1/+1
commit 5de15b610f78 ("mtd: hyperbus: add Renesas RPC-IF driver") leads to build failure[1] with COMPILE_TEST and RPCIF_HYPERBUS enabled. This is because driver needs functions RENESAS_RPCIF which is only buildable for CONFIG_ARCH_RENESAS. Fix this by dropping COMPILE_TEST from RPCIF_HYPERBUS Kconfig entry. This ensures driver can be built only when RENESAS_RPCIF is also selected. [1]: rpc-if.c:(.text+0x20): undefined reference to `rpcif_disable_rpm' ld: drivers/mtd/hyperbus/rpc-if.o: in function `rpcif_hb_prepare_read': rpc-if.c:(.text+0xd6): undefined reference to `rpcif_prepare' ld: drivers/mtd/hyperbus/rpc-if.o: in function `rpcif_hb_read16': [...] Fixes: 5de15b610f78 ("mtd: hyperbus: add Renesas RPC-IF driver") leads Reported-by: Richard Weinberger <richard@nod.at> Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com> Signed-off-by: Richard Weinberger <richard@nod.at>
2020-10-06mtd: hyperbus: add Renesas RPC-IF driverSergei Shtylyov3-0/+178
Add the HyperFLash driver for the Renesas RPC-IF. It's the "front end" driver using the "back end" APIs in the main driver to talk to the real hardware. Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com> Link: https://lore.kernel.org/r/78abb851-2beb-fe7d-87e5-ce58ee877d35@gmail.com
2020-09-30mtd: hyperbus: hbmc-am654: Add DMA support for readsVignesh Raghavendra1-1/+125
AM654 HyperBus controller provides MMIO interface to read data from flash. So add DMA memcpy support for reading data over MMIO interface. This provides 5x improvement in throughput and reduces CPU usage as well. Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com> Reviewed-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Link: https://lore.kernel.org/r/20200924081214.16934-5-vigneshr@ti.com
2020-09-30mtd: hyperbus: hbmc-am654: Drop pm_runtime* calls from probeVignesh Raghavendra1-14/+2
Recent genpd changes for K3 platform ensure device is ON before driver probe is called. Therefore, drop redundant pm_runtime_* calls from driver to simplify the code. Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com> Link: https://lore.kernel.org/r/20200924081214.16934-4-vigneshr@ti.com
2020-09-30mtd: hyperbus: hbmc-am654: Fix direct mapping setup flash accessVignesh Raghavendra1-2/+2
Setting up of direct mapping should be done with flash node's IO address space and not with controller's IO region. Fixes: b6fe8bc67d2d3 ("mtd: hyperbus: move direct mapping setup to AM654 HBMC driver") Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com> Link: https://lore.kernel.org/r/20200924081214.16934-3-vigneshr@ti.com
2020-08-02mtd: hyperbus: Replace HTTP links with HTTPS onesAlexander A. Klimov2-2/+2
Rationale: Reduces attack surface on kernel devs opening the links for MITM as HTTPS traffic is much harder to manipulate. Deterministic algorithm: For each file: If not .svg: For each line: If doesn't contain `\bxmlns\b`: For each link, `\bhttp://[^# \t\r\n]*(?:\w|/)`: If neither `\bgnu\.org/license`, nor `\bmozilla\.org/MPL\b`: If both the HTTP and HTTPS versions return 200 OK and serve the same content: Replace HTTP with HTTPS. Signed-off-by: Alexander A. Klimov <grandmaster@al2klimov.de> Signed-off-by: Richard Weinberger <richard@nod.at>
2020-03-03mtd: hyperbus: move direct mapping setup to AM654 HBMC driverSergei Shtylyov2-11/+12
The Hyperbus core expects that HyperFlash is always directly mapped for both read and write, but in reality this may not always be the case, e.g. Renesas RPC-IF has read only direct mapping. Move the code setting up the direct mapping from the Hyperbus core to thh TI AM554 HBMC driver. Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2020-03-03mtd: hyperbus: Add proper error message for missing compatibleDirk Behme1-1/+3
In case the compatible "cypress,hyperflash" is not given output a proper error message. Signed-off-by: Dirk Behme <dirk.behme@de.bosch.com> Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2019-08-29mtd: hyperbus: fix dependency and build errorRandy Dunlap1-0/+1
lib/devres.c, which implements devm_ioremap_resource(), is only built when CONFIG_HAS_IOMEM is set/enabled, so MTD_HYPERBUS should depend on HAS_IOMEM. Fixes a build error and a Kconfig warning (as seen on UML builds): WARNING: unmet direct dependencies detected for MTD_COMPLEX_MAPPINGS Depends on [n]: MTD [=m] && HAS_IOMEM [=n] Selected by [m]: - MTD_HYPERBUS [=m] && MTD [=m] ERROR: "devm_ioremap_resource" [drivers/mtd/hyperbus/hyperbus-core.ko] undefined! Fixes: dcc7d3446a0f ("mtd: Add support for HyperBus memory devices") Signed-off-by: Randy Dunlap <rdunlap@infradead.org> Cc: Vignesh Raghavendra <vigneshr@ti.com> Cc: Miquel Raynal <miquel.raynal@bootlin.com> Cc: Geert Uytterhoeven <geert@linux-m68k.org> Cc: linux-mtd@lists.infradead.org Acked-by: Vignesh Raghavendra <vigneshr@ti.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2019-08-03mtd: hyperbus: Add hardware dependency to AM654 driverJean Delvare1-0/+1
The hbmc-am654 driver is for the TI AM654, which is an ARM64 SoC, so don't propose this driver on other architectures unless build-testing. Fixes: b07079f1642c ("mtd: hyperbus: Add driver for TI's HyperBus memory controller") Signed-off-by: Jean Delvare <jdelvare@suse.de> Cc: Vignesh Raghavendra <vigneshr@ti.com> Cc: Miquel Raynal <miquel.raynal@bootlin.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2019-08-03mtd: hyperbus: Kconfig: Fix HBMC_AM654 dependenciesVignesh Raghavendra1-1/+1
On x86_64, when CONFIG_OF is not disabled: WARNING: unmet direct dependencies detected for MUX_MMIO Depends on [n]: MULTIPLEXER [=y] && (OF [=n] || COMPILE_TEST [=n]) Selected by [y]: - HBMC_AM654 [=y] && MTD [=y] && MTD_HYPERBUS [=y] due to config HBMC_AM654 tristate "HyperBus controller driver for AM65x SoC" select MULTIPLEXER select MUX_MMIO Fix this by making HBMC_AM654 imply MUX_MMIO instead of select so that dependencies are taken care of. MUX_MMIO is optional for functioning of driver. Fixes: b07079f1642c ("mtd: hyperbus: Add driver for TI's HyperBus memory controller") Reported-by: Randy Dunlap <rdunlap@infradead.org> Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com> Acked-by: Randy Dunlap <rdunlap@infradead.org> # build-tested Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2019-06-28mtd: hyperbus: Add driver for TI's HyperBus memory controllerVignesh Raghavendra3-0/+160
Add driver for HyperBus memory controller on TI's AM654 SoC. Programming IP is pretty simple and provides direct memory mapped access to connected Flash devices. Add basic support for the IP without DMA. Second chip-select is not supported for now. Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2019-06-27mtd: Add support for HyperBus memory devicesVignesh Raghavendra3-0/+167
Cypress' HyperBus is Low Signal Count, High Performance Double Data Rate Bus interface between a host system master and one or more slave interfaces. HyperBus is used to connect microprocessor, microcontroller, or ASIC devices with random access NOR flash memory (called HyperFlash) or self refresh DRAM (called HyperRAM). Its a 8-bit data bus (DQ[7:0]) with Read-Write Data Strobe (RWDS) signal and either Single-ended clock(3.0V parts) or Differential clock (1.8V parts). It uses ChipSelect lines to select b/w multiple slaves. At bus level, it follows a separate protocol described in HyperBus specification[1]. HyperFlash follows CFI AMD/Fujitsu Extended Command Set (0x0002) similar to that of existing parallel NORs. Since HyperBus is x8 DDR bus, its equivalent to x16 parallel NOR flash with respect to bits per clock cycle. But HyperBus operates at >166MHz frequencies. HyperRAM provides direct random read/write access to flash memory array. But, HyperBus memory controllers seem to abstract implementation details and expose a simple MMIO interface to access connected flash. Add support for registering HyperFlash devices with MTD framework. MTD maps framework along with CFI chip support framework are used to support communicating with flash. Framework is modelled along the lines of spi-nor framework. HyperBus memory controller (HBMC) drivers calls hyperbus_register_device() to register a single HyperFlash device. HyperFlash core parses MMIO access information from DT, sets up the map_info struct, probes CFI flash and registers it with MTD framework. Some HBMC masters need calibration/training sequence[3] to be carried out, in order for DLL inside the controller to lock, by reading a known string/pattern. This is done by repeatedly reading CFI Query Identification String. Calibration needs to be done before trying to detect flash as part of CFI flash probe. HyperRAM is not supported at the moment. HyperBus specification can be found at[1] HyperFlash datasheet can be found at[2] [1] https://www.cypress.com/file/213356/download [2] https://www.cypress.com/file/213346/download [3] http://www.ti.com/lit/ug/spruid7b/spruid7b.pdf Table 12-5741. HyperFlash Access Sequence Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>