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path: root/drivers/net/ethernet/mellanox/mlx5/core/esw/bridge.h
AgeCommit message (Expand)AuthorFilesLines
2023-10-12net/mlx5: Bridge, fix peer entry ageing in LAG modeVlad Buslov1-0/+3
2023-06-16net/mlx5: Bridge, expose FDB state via debugfsVlad Buslov1-0/+2
2023-06-16net/mlx5: Bridge, pass net device when linking vport to bridgeVlad Buslov1-4/+6
2023-04-12net/mlx5: Bridge, add tracepoints for multicastVlad Buslov1-4/+6
2023-04-12net/mlx5: Bridge, implement mdb offloadVlad Buslov1-0/+6
2023-04-12net/mlx5: Bridge, snoop igmp/mld packetsVlad Buslov1-0/+9
2022-07-14net/mlx5: Bridge, implement QinQ supportVlad Buslov1-0/+2
2022-07-14net/mlx5: Bridge, implement infrastructure for VLAN protocol changeVlad Buslov1-0/+2
2022-07-14net/mlx5: Bridge, rename filter fg to vlan_filterVlad Buslov1-1/+1
2021-08-17net/mlx5: Bridge, support LAGVlad Buslov1-0/+3
2021-08-17net/mlx5: Bridge, allow merged eswitch connectivityVlad Buslov1-0/+6
2021-08-17net/mlx5: Bridge, identify port by vport_num+esw_owner_vhca_id pairVlad Buslov1-15/+22
2021-06-10net/mlx5: Bridge, filter tagged packets that didn't match tagged fgVlad Buslov1-0/+3
2021-06-10net/mlx5: Bridge, match FDB entry vlan tagVlad Buslov1-0/+1
2021-06-10net/mlx5: Bridge, implement infrastructure for vlansVlad Buslov1-0/+5
2021-06-10net/mlx5: Bridge, dynamic entry ageingVlad Buslov1-1/+6
2021-06-10net/mlx5: Bridge, handle FDB eventsVlad Buslov1-0/+9
2021-06-10net/mlx5: Bridge, add offload infrastructureVlad Buslov1-0/+30