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path: root/drivers/perf/arm_pmu_acpi.c
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2018-02-20arm_pmu: acpi: request IRQs up-frontMark Rutland1-13/+6
We can't request IRQs in atomic context, so for ACPI systems we'll have to request them up-front, and later associate them with CPUs. This patch reorganises the arm_pmu code to do so. As we no longer have the arm_pmu structure at probe time, a number of prototypes need to be adjusted, requiring changes to the common arm_pmu code and arm_pmu platform code. Signed-off-by: Mark Rutland <mark.rutland@arm.com> Cc: Will Deacon <will.deacon@arm.com> Signed-off-by: Will Deacon <will.deacon@arm.com>
2018-02-20arm_pmu: acpi: check for mismatched PPIsMark Rutland1-4/+38
The arm_pmu platform code explicitly checks for mismatched PPIs at probe time, while the ACPI code leaves this to the core code. Future refactoring will make this difficult for the core code to check, so let's have the ACPI code check this explicitly. As before, upon a failure we'll continue on without an interrupt. Ho hum. Signed-off-by: Mark Rutland <mark.rutland@arm.com> Cc: Will Deacon <will.deacon@arm.com> Signed-off-by: Will Deacon <will.deacon@arm.com>
2018-02-20arm_pmu: add armpmu_alloc_atomic()Mark Rutland1-1/+1
In ACPI systems, we don't know the makeup of CPUs until we hotplug them on, and thus have to allocate the PMU datastructures at hotplug time. Thus, we must use GFP_ATOMIC allocations. Let's add an armpmu_alloc_atomic() that we can use in this case. Signed-off-by: Mark Rutland <mark.rutland@arm.com> Cc: Will Deacon <will.deacon@arm.com> Signed-off-by: Will Deacon <will.deacon@arm.com>
2017-10-04drivers/perf: arm_pmu_acpi: drop redundant acpi_disabled checkShaokun Zhang1-3/+0
acpi_disabled has been checked in armv8_pmu_driver_init and it shall be ZERO in arm_pmu_acpi_probe, clean up this unnecessary check. Signed-off-by: Shaokun Zhang <zhangshaokun@hisilicon.com> Signed-off-by: Will Deacon <will.deacon@arm.com>
2017-09-22drivers/perf: arm_pmu_acpi: Release memory obtained by kasprintfArvind Yadav1-0/+1
Free memory region, if arm_pmu_acpi_probe is not successful. Acked-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Arvind Yadav <arvind.yadav.cs@gmail.com> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2017-05-30drivers/perf: arm_pmu_acpi: avoid perf IRQ init when guest PMU is offWei Huang1-0/+11
We saw perf IRQ init failures when running Linux kernel in an ACPI guest without PMU (i.e. pmu=off). This is because perf IRQ is not present when pmu=off, but arm_pmu_acpi still tries to register or unregister GSI. This patch addresses the problem by checking gicc->performance_interrupt. If it is 0, which is the value set by qemu when pmu=off, we skip the IRQ register/unregister process. [ 4.069470] bc00: 0000000000040b00 ffff0000089db190 [ 4.070267] [<ffff000008134f80>] enable_percpu_irq+0xdc/0xe4 [ 4.071192] [<ffff000008667cc4>] arm_perf_starting_cpu+0x108/0x10c [ 4.072200] [<ffff0000080cbdd4>] cpuhp_invoke_callback+0x14c/0x4ac [ 4.073210] [<ffff0000080ccd3c>] cpuhp_thread_fun+0xd4/0x11c [ 4.074132] [<ffff0000080f1394>] smpboot_thread_fn+0x1b4/0x1c4 [ 4.075081] [<ffff0000080ec90c>] kthread+0x10c/0x138 [ 4.075921] [<ffff0000080833c0>] ret_from_fork+0x10/0x50 [ 4.076947] genirq: Setting trigger mode 4 for irq 43 failed (gic_set_type+0x0/0x74) Signed-off-by: Wei Huang <wei@redhat.com> [will: add comment justifying deviation from ACPI spec, removed redundant hunk] Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2017-04-11drivers/perf: arm_pmu: add ACPI frameworkMark Rutland1-0/+256
This patch adds framework code to handle parsing PMU data out of the MADT, sanity checking this, and managing the association of CPUs (and their interrupts) with appropriate logical PMUs. For the time being, we expect that only one PMU driver (PMUv3) will make use of this, and we simply pass in a single probe function. This is based on an earlier patch from Jeremy Linton. Signed-off-by: Mark Rutland <mark.rutland@arm.com> Tested-by: Jeremy Linton <jeremy.linton@arm.com> Cc: Will Deacon <will.deacon@arm.com> Signed-off-by: Will Deacon <will.deacon@arm.com>