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path: root/drivers/phy/microchip
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2021-12-14phy: lan966x: Remove set_speed functionHoratiu Vultur1-12/+5
Remove the set_speed function and allow the driver to figure out the speed at which needs to configure the serdes based on the interface type. Fixes: 305524902a0045 ("phy: Add lan966x ethernet serdes PHY driver") Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com> Link: https://lore.kernel.org/r/20211211214717.1284306-1-horatiu.vultur@microchip.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-12-02phy: lan966x: Extend lan966x to support multiple phy interfaces.Horatiu Vultur1-0/+4
Currently the driver is supporting only the interfaces QSGMII, SGMII, RGMII and GMII. This patch extend the supported interfaces with 1000BASE-X and 2500BASE-X. Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com> Acked-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk> Link: https://lore.kernel.org/r/20211130101015.164916-1-horatiu.vultur@microchip.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-11-23phy: Add lan966x ethernet serdes PHY driverHoratiu Vultur4-0/+766
Add the Microchip lan966x ethernet serdes PHY driver for interfaces available in the lan966x SoC. Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com> Link: https://lore.kernel.org/r/20211116100818.1615762-4-horatiu.vultur@microchip.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-10-26phy: Sparx5 Eth SerDes: Fix return value check in sparx5_serdes_probe()Yang Yingliang1-2/+2
In case of error, the function devm_ioremap() returns NULL pointer not ERR_PTR(). The IS_ERR() test in the return value check should be replaced with NULL test. Fixes: 2ff8a1eeb5aa ("phy: Add Sparx5 ethernet serdes PHY driver") Reported-by: Hulk Robot <hulkci@huawei.com> Signed-off-by: Yang Yingliang <yangyingliang@huawei.com> Link: https://lore.kernel.org/r/20210909072149.2934047-1-yangyingliang@huawei.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-06-03phy: Sparx5 Eth SerDes: check return value after calling platform_get_resource()Yang Yingliang1-0/+4
It will cause null-ptr-deref if platform_get_resource() returns NULL, we need check the return value. Signed-off-by: Yang Yingliang <yangyingliang@huawei.com> Link: https://lore.kernel.org/r/20210603051014.2674744-1-yangyingliang@huawei.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-04-06phy: fix resource_size.cocci warningskernel test robot1-1/+1
drivers/phy/microchip/sparx5_serdes.c:2440:54-57: ERROR: Missing resource_size with iores Use resource_size function on resource object instead of explicit computation. Generated by: scripts/coccinelle/api/resource_size.cocci Fixes: 2ff8a1eeb5aa ("phy: Add Sparx5 ethernet serdes PHY driver") CC: Steen Hegelund <steen.hegelund@microchip.com> Reported-by: kernel test robot <lkp@intel.com> Signed-off-by: kernel test robot <lkp@intel.com> Link: https://lore.kernel.org/r/20210318232844.GA65886@63b0c5462fda Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-04-06phy: Sparx5 Eth SerDes: Use direct register operationsSteen Hegelund1-918/+951
Use direct register operations instead of a table of register information to lower the stack usage. Signed-off-by: Steen Hegelund <steen.hegelund@microchip.com> Reported-by: kernel test robot <lkp@intel.com> Link: https://lore.kernel.org/r/20210329141309.612459-2-steen.hegelund@microchip.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-03-31phy: microchip: PHY_SPARX5_SERDES should depend on ARCH_SPARX5Geert Uytterhoeven1-0/+1
The Microchip Sparx5 SerDes PHY is present only Microchip Sparx5 SoCs. Hence add a dependency on ARCH_SPARX5, to prevent asking the user about this driver when configuring a kernel without support for Sparx5 SoCs. Fixes: 2ff8a1eeb5aa8bb4 ("phy: Add Sparx5 ethernet serdes PHY driver") Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/20210331081937.367408-1-geert+renesas@glider.be Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-03-17phy: Add Sparx5 ethernet serdes PHY driverSteen Hegelund5-0/+5329
Add the Microchip Sparx5 ethernet serdes PHY driver for the 6G, 10G and 25G interfaces available in the Sparx5 SoC. Signed-off-by: Bjarni Jonasson <bjarni.jonasson@microchip.com> Signed-off-by: Steen Hegelund <steen.hegelund@microchip.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Reviewed-by: Alexandre Belloni <alexandre.belloni@bootlin.com> Link: https://lore.kernel.org/r/20210218161451.3489955-4-steen.hegelund@microchip.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
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