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2022-07-09phy: brcm-sata: bcmbca: Replace ARCH_BCM_63XX with ARCH_BCMBCAWilliam Zhang1-1/+1
Prepare for the BCM63138 ARCH_BCM_63XX migration to ARCH_BCMBCA. Make PHY_BRCM_SATA depending on ARCH_BCMBCA. Signed-off-by: William Zhang <william.zhang@broadcom.com> Acked-by: Vinod Koul <vkoul@kernel.org> Acked-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2022-05-19Merge tag 'phy-for-5.19' of ↵Greg Kroah-Hartman13-124/+935
git://git.kernel.org/pub/scm/linux/kernel/git/phy/linux-phy into char-work-next Vinod writes: phy-for-5.19 - New support: - LVDS configuration support and implementation in fsl driver - Qualcomm UFS phy support for SM6350 and USB PHY for SDX65 - Allwinner D-PHY Rx mode support - Yamilfy Mixel mipi-dsi-phy - Updates: - Documentation for phy ops order - Can transceiver mux support - Qualcomm QMP phy updates - Uniphier phy updates * tag 'phy-for-5.19' of git://git.kernel.org/pub/scm/linux/kernel/git/phy/linux-phy: (40 commits) phy: qcom-qmp: rename error labels phy: qcom-qmp: fix pipe-clock imbalance on power-on failure phy: qcom-qmp: switch to explicit reset helpers phy: qcom-qmp: fix reset-controller leak on probe errors phy: qcom-qmp: fix struct clk leak on probe errors dt-bindings: phy: renesas,usb2-phy: Document RZ/G2UL phy bindings dt-bindings: phy: marvell,armada-3700-utmi-host-phy: Fix incorrect compatible in example phy: qcom-qmp: fix phy-descriptor kernel-doc typo phy: rockchip-inno-usb2: Clean up some inconsistent indenting phy: freescale: imx8m-pcie: Handle IMX8_PCIE_REFCLK_PAD_UNUSED phy: core: Warn when phy_power_on is called before phy_init phy: core: Update documentation syntax phy: core: Add documentation of phy operation order phy: rockchip-inno-usb2: Handle ID IRQ phy: rockchip-inno-usb2: Handle bvalid falling phy: rockchip-inno-usb2: Support multi-bit mask properties phy: rockchip-inno-usb2: Do not lock in bvalid IRQ handler phy: rockchip-inno-usb2: Do not check bvalid twice phy: rockchip-inno-usb2: Fix muxed interrupt support phy: allwinner: phy-sun6i-mipi-dphy: Support D-PHY Rx mode for MIPI CSI-2 ...
2022-05-03phy: qcom-qmp: rename error labelsJohan Hovold1-14/+14
Rename all error labels after what they are used for in order to improve readability and for consistency. Signed-off-by: Johan Hovold <johan+linaro@kernel.org> Link: https://lore.kernel.org/r/20220502133130.4125-3-johan+linaro@kernel.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-05-03phy: qcom-qmp: fix pipe-clock imbalance on power-on failureJohan Hovold1-1/+1
Make sure to disable the pipe clock also if ufs-reset deassertion fails during power on. Note that the ufs-reset is asserted in qcom_qmp_phy_com_exit(). Fixes: c9b589791fc1 ("phy: qcom: Utilize UFS reset controller") Cc: Evan Green <evgreen@chromium.org> Signed-off-by: Johan Hovold <johan+linaro@kernel.org> Link: https://lore.kernel.org/r/20220502133130.4125-2-johan+linaro@kernel.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-05-03phy: qcom-qmp: switch to explicit reset helpersJohan Hovold1-2/+2
Switch to consistently using the explicit reset-controller API which makes it clear that the reset controllers are used exclusively by the PHY driver. Note that the deprecated of_reset_control_get() and devm_reset_control_get() are just transitional wrappers for the explicit API so there's no functional change. Suggested-by: Philipp Zabel <p.zabel@pengutronix.de> Signed-off-by: Johan Hovold <johan+linaro@kernel.org> Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220427063243.32576-4-johan+linaro@kernel.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-05-03phy: qcom-qmp: fix reset-controller leak on probe errorsJohan Hovold1-0/+9
Make sure to release the lane reset controller in case of a late probe error (e.g. probe deferral). Note that due to the reset controller being defined in devicetree in "lane" child nodes, devm_reset_control_get_exclusive() cannot be used directly. Fixes: e78f3d15e115 ("phy: qcom-qmp: new qmp phy driver for qcom-chipsets") Cc: stable@vger.kernel.org # 4.12 Cc: Vivek Gautam <vivek.gautam@codeaurora.org> Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de> Signed-off-by: Johan Hovold <johan+linaro@kernel.org> Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220427063243.32576-3-johan+linaro@kernel.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-05-03phy: qcom-qmp: fix struct clk leak on probe errorsJohan Hovold1-1/+1
Make sure to release the pipe clock reference in case of a late probe error (e.g. probe deferral). Fixes: e78f3d15e115 ("phy: qcom-qmp: new qmp phy driver for qcom-chipsets") Cc: stable@vger.kernel.org # 4.12 Cc: Vivek Gautam <vivek.gautam@codeaurora.org> Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Johan Hovold <johan+linaro@kernel.org> Link: https://lore.kernel.org/r/20220427063243.32576-2-johan+linaro@kernel.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-05-02phy: qcom-qmp: fix phy-descriptor kernel-doc typoJohan Hovold1-1/+1
Fix misspelled "clock" in the description of the pipe_clk field in the PHY-descriptor kernel-doc comment. Signed-off-by: Johan Hovold <johan+linaro@kernel.org> Link: https://lore.kernel.org/r/20220420152331.5527-2-johan+linaro@kernel.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-05-02phy: rockchip-inno-usb2: Clean up some inconsistent indentingJiapeng Chong1-2/+2
Eliminate the follow smatch warning: drivers/phy/rockchip/phy-rockchip-inno-usb2.c:1203 rockchip_usb2phy_probe() warn: inconsistent indenting. Reported-by: Abaci Robot <abaci@linux.alibaba.com> Signed-off-by: Jiapeng Chong <jiapeng.chong@linux.alibaba.com> Reviewed-by: Heiko Stuebner <heiko@sntech.de> Link: https://lore.kernel.org/r/20220421203038.4550-1-jiapeng.chong@linux.alibaba.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-04-20phy: freescale: imx8m-pcie: Handle IMX8_PCIE_REFCLK_PAD_UNUSEDMarek Vasut1-2/+8
The 'fsl,refclk-pad-mode' DT property used to select clock source for PCIe PHY can have either of three values, IMX8_PCIE_REFCLK_PAD_INPUT, IMX8_PCIE_REFCLK_PAD_OUTPUT, IMX8_PCIE_REFCLK_PAD_UNUSED. The first two options are handled correctly by the driver, the last one is not, this patch implements support for the last option. The IMX8_PCIE_REFCLK_PAD_INPUT means PCIE_RESREF is PHY clock input, the IMX8_PCIE_REFCLK_PAD_OUTPUT means PHY clock are sourced from SoC internal PLL and output to PCIE_RESREF external IO pin. The last IMX8_PCIE_REFCLK_PAD_UNUSED is a combination of previous two, PHY clock are sourced from SoC internal PLL and not output anywhere. Reviewed-by: Richard Zhu <hongxing.zhu@nxp.com> Signed-off-by: Marek Vasut <marex@denx.de> Cc: Fabio Estevam <festevam@denx.de> Cc: Kishon Vijay Abraham I <kishon@ti.com> Cc: Marcel Ziswiler <marcel.ziswiler@toradex.com> Cc: NXP Linux Team <linux-imx@nxp.com> Cc: Peng Fan <peng.fan@nxp.com> Cc: Richard Zhu <hongxing.zhu@nxp.com> Cc: Shawn Guo <shawnguo@kernel.org> Cc: Vinod Koul <vkoul@kernel.org> Cc: linux-arm-kernel@lists.infradead.org To: linux-phy@lists.infradead.org Link: https://lore.kernel.org/r/20220413140710.10074-1-marex@denx.de Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-04-20phy: core: Warn when phy_power_on is called before phy_initJules Maselbas1-0/+3
A warning when the order of phy operation is mixed up by drivers, this is an atempt to make the phy usage more uniform across (usb) drivers. Signed-off-by: Jules Maselbas <jmaselbas@kalray.eu> Cc: Ahmad Fatoum <a.fatoum@pengutronix.de> Cc: Amelie DELAUNAY <amelie.delaunay@foss.st.com> Cc: Minas Harutyunyan <hminas@synopsys.com> Cc: Kishon Vijay Abraham I <kishon@ti.com> Link: https://lore.kernel.org/r/20220407102108.24211-4-jmaselbas@kalray.eu Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-04-20phy: core: Update documentation syntaxJules Maselbas1-3/+3
Update the syntax used by the documentation of phy operation functions. This is to unify the syntax with the newly added documentation. Signed-off-by: Jules Maselbas <jmaselbas@kalray.eu> Link: https://lore.kernel.org/r/20220407102108.24211-3-jmaselbas@kalray.eu Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-04-20phy: core: Add documentation of phy operation orderJules Maselbas1-0/+35
Add documentation on phy function usage: init function must be called before power_on; power_off must be called before exit. Signed-off-by: Jules Maselbas <jmaselbas@kalray.eu> Cc: Ahmad Fatoum <a.fatoum@pengutronix.de> Cc: Amelie DELAUNAY <amelie.delaunay@foss.st.com> Cc: Minas Harutyunyan <hminas@synopsys.com> Cc: Kishon Vijay Abraham I <kishon@ti.com> Link: https://lore.kernel.org/r/20220407102108.24211-2-jmaselbas@kalray.eu Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-04-20phy: rockchip-inno-usb2: Handle ID IRQSamuel Holland1-0/+85
This supports detecting host mode for the OTG port without an extcon. The rv1108 properties are not updated due to lack of documentation. Signed-off-by: Samuel Holland <samuel@sholland.org> Tested-by: Michael Riesch <michael.riesch@wolfvision.net> Link: https://lore.kernel.org/r/20220414032258.40984-7-samuel@sholland.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-04-20phy: rockchip-inno-usb2: Handle bvalid fallingSamuel Holland1-9/+9
Some SoCs have a bvalid falling interrupt, in addition to bvalid rising. This interrupt can detect OTG cable plugout immediately, so it can avoid the delay until the next scheduled work. Signed-off-by: Samuel Holland <samuel@sholland.org> Tested-by: Michael Riesch <michael.riesch@wolfvision.net> Link: https://lore.kernel.org/r/20220414032258.40984-6-samuel@sholland.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-04-20phy: rockchip-inno-usb2: Support multi-bit mask propertiesSamuel Holland1-1/+1
The "bvalid" and "id" interrupts can trigger on either the rising edge or the falling edge, so each interrupt has two enable bits and two status bits. This change allows using a single property for both bits, checking whether either bit is set. Signed-off-by: Samuel Holland <samuel@sholland.org> Tested-by: Michael Riesch <michael.riesch@wolfvision.net> Link: https://lore.kernel.org/r/20220414032258.40984-5-samuel@sholland.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-04-20phy: rockchip-inno-usb2: Do not lock in bvalid IRQ handlerSamuel Holland1-4/+0
Clearing the IRQ is atomic, so there is no need to hold the mutex. Signed-off-by: Samuel Holland <samuel@sholland.org> Tested-by: Michael Riesch <michael.riesch@wolfvision.net> Link: https://lore.kernel.org/r/20220414032258.40984-4-samuel@sholland.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-04-20phy: rockchip-inno-usb2: Do not check bvalid twiceSamuel Holland1-6/+4
The bvalid interrupt handler already checks bvalid status. The muxed IRQ handler just needs to call the other handler (plus any other handlers that will be added). Signed-off-by: Samuel Holland <samuel@sholland.org> Tested-by: Michael Riesch <michael.riesch@wolfvision.net> Link: https://lore.kernel.org/r/20220414032258.40984-3-samuel@sholland.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-04-20phy: rockchip-inno-usb2: Fix muxed interrupt supportSamuel Holland1-2/+8
This commit fixes two issues with the muxed interrupt handler. First, the OTG port has the "bvalid" interrupt enabled, not "linestate". Since only the linestate interrupt was handled, and not the bvalid interrupt, plugging in a cable to the OTG port caused an interrupt storm. Second, the return values from the individual port IRQ handlers need to be OR-ed together. Otherwise, the lack of an interrupt from the last port would cause the handler to erroneously return IRQ_NONE. Fixes: ed2b5a8e6b98 ("phy: phy-rockchip-inno-usb2: support muxed interrupts") Signed-off-by: Samuel Holland <samuel@sholland.org> Tested-by: Michael Riesch <michael.riesch@wolfvision.net> Link: https://lore.kernel.org/r/20220414032258.40984-2-samuel@sholland.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-04-20phy: amlogic: fix error path in phy_g12a_usb3_pcie_probe()Heiner Kallweit1-8/+12
If clk_prepare_enable() fails we call clk_disable_unprepare() in the error path what results in a warning that the clock is disabled and unprepared already. And if we fail later in phy_g12a_usb3_pcie_probe() then we bail out w/o calling clk_disable_unprepare(). This patch fixes both errors. Fixes: 36077e16c050 ("phy: amlogic: Add Amlogic G12A USB3 + PCIE Combo PHY Driver") Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Link: https://lore.kernel.org/r/8e416f95-1084-ee28-860e-7884f7fa2e32@gmail.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-04-20phy: allwinner: phy-sun6i-mipi-dphy: Support D-PHY Rx mode for MIPI CSI-2Paul Kocialkowski1-4/+162
The Allwinner A31 D-PHY supports both Rx and Tx modes. While the latter is already supported and used for MIPI DSI this adds support for the former, to be used with MIPI CSI-2. This implementation is inspired by Allwinner's V3s Linux SDK implementation, which was used as a documentation base. It uses the direction dt property to distinguish between tx and rx directions. Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com> Link: https://lore.kernel.org/r/20220415152138.635525-3-paul.kocialkowski@bootlin.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-04-20phy: freescale: phy-fsl-imx8-mipi-dphy: Add i.MX8qxp LVDS PHY mode supportLiu Ying1-11/+265
i.MX8qxp SoC embeds a Mixel MIPI DPHY + LVDS PHY combo which supports either a MIPI DSI display or a LVDS display. The PHY mode is controlled by SCU firmware and the driver would call a SCU firmware function to configure the PHY mode. The single LVDS PHY has 4 data lanes to support a LVDS display. Also, with a master LVDS PHY and a slave LVDS PHY, they may work together to support a LVDS display with 8 data lanes(usually, dual LVDS link display). Note that this patch supports the LVDS PHY mode only for the i.MX8qxp Mixel combo PHY, i.e., the MIPI DPHY mode is yet to be supported, so for now error would be returned from ->set_mode() if MIPI DPHY mode is passed over to it for the combo PHY. Cc: Guido Günther <agx@sigxcpu.org> Cc: Robert Chiras <robert.chiras@nxp.com> Cc: Kishon Vijay Abraham I <kishon@ti.com> Cc: Vinod Koul <vkoul@kernel.org> Cc: Shawn Guo <shawnguo@kernel.org> Cc: Sascha Hauer <s.hauer@pengutronix.de> Cc: Pengutronix Kernel Team <kernel@pengutronix.de> Cc: Fabio Estevam <festevam@gmail.com> Cc: NXP Linux Team <linux-imx@nxp.com> Reviewed-by: Guido Günther <agx@sigxcpu.org> Signed-off-by: Liu Ying <victor.liu@nxp.com> Link: https://lore.kernel.org/r/20220419010852.452169-6-victor.liu@nxp.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-04-14phy: ti: Add missing pm_runtime_disable() in serdes_am654_probeMiaoqian Lin1-1/+1
The pm_runtime_enable() will increase power disable depth. If the probe fails, we should use pm_runtime_disable() to balance pm_runtime_enable(). Add missing pm_runtime_disable() for serdes_am654_probe(). Fixes: 71e2f5c5c224 ("phy: ti: Add a new SERDES driver for TI's AM654x SoC") Signed-off-by: Miaoqian Lin <linmq006@gmail.com> Link: https://lore.kernel.org/r/20220301025853.1911-1-linmq006@gmail.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-04-14phy: mapphone-mdm6600: Fix PM error handling in phy_mdm6600_probeMiaoqian Lin1-1/+2
The pm_runtime_enable will increase power disable depth. If the probe fails, we should use pm_runtime_disable() to balance pm_runtime_enable(). And use pm_runtime_dont_use_autosuspend() to undo pm_runtime_use_autosuspend() In the PM Runtime docs: Drivers in ->remove() callback should undo the runtime PM changes done in ->probe(). Usually this means calling pm_runtime_disable(), pm_runtime_dont_use_autosuspend() etc. We should do this in error handling. Fixes: f7f50b2a7b05 ("phy: mapphone-mdm6600: Add runtime PM support for n_gsm on USB suspend") Signed-off-by: Miaoqian Lin <linmq006@gmail.com> Link: https://lore.kernel.org/r/20220301024615.31899-1-linmq006@gmail.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-04-13phy: cadence: Sierra: Add TI J721E specific PCIe multilink lane configurationSwapnil Jakhade1-3/+190
This patch adds workaround for TI J721E errata i2183 (https://www.ti.com/lit/er/sprz455a/sprz455a.pdf). PCIe fails to link up if SERDES lanes not used by PCIe are assigned to another protocol. For example, link training fails if lanes 2 and 3 are assigned to another protocol while lanes 0 and 1 are used for PCIe to form a two lane link. This failure is due to an incorrect tie-off on an internal status signal indicating electrical idle. Status signals going from SERDES to PCIe Controller are tied-off when a lane is not assigned to PCIe. Signal indicating electrical idle is incorrectly tied-off to a state that indicates non-idle. As a result, PCIe sees unused lanes to be out of electrical idle and this causes LTSSM to exit Detect.Quiet state without waiting for 12ms timeout to occur. If a receiver is not detected on the first receiver detection attempt in Detect.Active state, LTSSM goes back to Detect.Quiet and again moves forward to Detect.Active state without waiting for 12ms as required by PCIe base specification. Since wait time in Detect.Quiet is skipped, multiple receiver detect operations are performed back-to-back without allowing time for capacitance on the transmit lines to discharge. This causes subsequent receiver detection to always fail even if a receiver gets connected eventually. The workaround only works for 1-lane PCIe configuration. This workaround involves enabling receiver detect override by setting TX_RCVDET_OVRD_PREG_j register of the lane running PCIe to 0x2. This causes SERDES to indicate successful receiver detect when LTSSM is in Detect.Active state, whether a receiver is actually present or not. If the receiver is present, LTSSM proceeds to link up as expected. However if receiver is not present, LTSSM will time out in Polling.Configuration substate since the expected training sequence packets will not be received. Signed-off-by: Swapnil Jakhade <sjakhade@cadence.com> Link: https://lore.kernel.org/r/20220303055026.24899-1-sjakhade@cadence.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-04-13phy/rockchip: Use of_device_get_match_data()Minghao Chi (CGEL ZTE)1-4/+2
Use of_device_get_match_data() to simplify the code. Reported-by: Zeal Robot <zealci@zte.com.cn> Signed-off-by: Minghao Chi (CGEL ZTE) <chi.minghao@zte.com.cn> Link: https://lore.kernel.org/r/20220304011755.2061529-1-chi.minghao@zte.com.cn Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-04-13phy/rockchip: Use of_device_get_match_data()Minghao Chi (CGEL ZTE)1-6/+1
Use of_device_get_match_data() to simplify the code. Reported-by: Zeal Robot <zealci@zte.com.cn> Signed-off-by: Minghao Chi (CGEL ZTE) <chi.minghao@zte.com.cn> Link: https://lore.kernel.org/r/20220303014406.2059140-1-chi.minghao@zte.com.cn Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-04-13phy: ti: omap-usb2: Fix error handling in omap_usb2_enable_clocksMiaoqian Lin1-1/+1
The corresponding API for clk_prepare_enable is clk_disable_unprepare. Make sure that the clock is unprepared on exit by changing clk_disable to clk_disable_unprepare. Fixes: ed31ee7cf1fe ("phy: ti: usb2: Fix logic on -EPROBE_DEFER") Signed-off-by: Miaoqian Lin <linmq006@gmail.com> Link: https://lore.kernel.org/r/20220318105748.19532-1-linmq006@gmail.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-04-13phy: qcom-qmp: Add support for SDX65 QMP PHYRohit Agarwal1-0/+76
Add support for USB3 QMP PHY found in SDX65 platform. SDX65 uses version 5.0.0 of the QMP PHY IP. Signed-off-by: Rohit Agarwal <quic_rohiagar@quicinc.com> Acked-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Link: https://lore.kernel.org/r/1649740652-17515-3-git-send-email-quic_rohiagar@quicinc.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-04-13phy: mediatek: phy-mtk-hdmi: Simplify with dev_err_probe()AngeloGioacchino Del Regno1-31/+19
Use the dev_err_probe() helper to simplify error handling during probe. Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://lore.kernel.org/r/20220328111046.210736-1-angelogioacchino.delregno@collabora.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-04-13phy: mediatek: phy-mtk-mipi-dsi: Simplify with dev_err_probe()AngeloGioacchino Del Regno1-19/+10
Use the dev_err_probe() helper to simplify error handling during probe. Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://lore.kernel.org/r/20220328145217.228457-1-angelogioacchino.delregno@collabora.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-04-11phy: qcom-qmp: Add SM6350 UFS PHY supportLuca Weiss1-0/+3
The SM6350 UFS PHY is compatible with the one from SDM845. Add a compatible for that. Signed-off-by: Luca Weiss <luca.weiss@fairphone.com> Link: https://lore.kernel.org/r/20220321133318.99406-4-luca.weiss@fairphone.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-04-11phy: ti: tusb1210: Fix an error handling path in tusb1210_probe()Christophe JAILLET1-2/+8
tusb1210_probe_charger_detect() must be undone by a corresponding tusb1210_remove_charger_detect() in the error handling path, as already done in the remove function. Fixes: 48969a5623ed ("phy: ti: tusb1210: Add charger detection") Signed-off-by: Christophe JAILLET <christophe.jaillet@wanadoo.fr> Reviewed-by: Hans de Goede <hdegoede@redhat.com> Link: https://lore.kernel.org/r/07c4926c42243cedb3b6067a241bb486fdda01b5.1648991162.git.christophe.jaillet@wanadoo.fr Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-04-11phy: samsung: exynos5250-sata: fix missing device put in probe error pathsKrzysztof Kozlowski1-6/+14
The actions of of_find_i2c_device_by_node() in probe function should be reversed in error paths by putting the reference to obtained device. Fixes: bcff4cba41bc ("PHY: Exynos: Add Exynos5250 SATA PHY driver") Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com> Link: https://lore.kernel.org/r/20220407091857.230386-2-krzysztof.kozlowski@linaro.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-04-11phy: samsung: Fix missing of_node_put() in exynos_sata_phy_probeMiaoqian Lin1-0/+1
The device_node pointer is returned by of_parse_phandle() with refcount incremented. We should use of_node_put() on it when done. Fixes: bcff4cba41bc ("PHY: Exynos: Add Exynos5250 SATA PHY driver") Signed-off-by: Miaoqian Lin <linmq006@gmail.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20220407091857.230386-1-krzysztof.kozlowski@linaro.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-04-11phy: ti: Fix missing of_node_put in ti_pipe3_get_sysctrl()Lv Ruyi1-0/+1
of_parse_phandle() returns node pointer with refcount incremented, use of_node_put() on it to decrease refcount when done. Reported-by: Zeal Robot <zealci@zte.com.cn> Signed-off-by: Lv Ruyi <lv.ruyi@zte.com.cn> Link: https://lore.kernel.org/r/20220408095617.2495234-1-lv.ruyi@zte.com.cn Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-04-11phy: phy-can-transceiver: Add support for setting muxAswath Govindraju2-1/+24
On some boards, for routing CAN signals from controller to transceiver, muxes might need to be set. Therefore, add support for setting the mux by reading the mux-states property from the device tree node. Signed-off-by: Aswath Govindraju <a-govindraju@ti.com> Link: https://lore.kernel.org/r/20220408111316.21189-1-a-govindraju@ti.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-04-11phy: ti: tusb1210: Make tusb1210_chg_det_states staticHans de Goede1-1/+1
Make tusb1210_chg_det_states static, fixing the following sparse warning: drivers/phy/ti/phy-tusb1210.c:158:12: sparse: sparse: symbol 'tusb1210_chg_det_states' was not declared. Should it be static? Fixes: 48969a5623ed ("phy: ti: tusb1210: Add charger detection") Reported-by: kernel test robot <lkp@intel.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> Link: https://lore.kernel.org/r/20220411135440.558394-1-hdegoede@redhat.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-03-29phy: PHY_FSL_LYNX_28G should depend on ARCH_LAYERSCAPEGeert Uytterhoeven1-2/+3
Freescale Layerscape Lynx 28G SerDes PHYs are only present on Freescale/NXP Layerscape SoCs. Move PHY_FSL_LYNX_28G outside the block for ARCH_MXC, as the latter is meant for i.MX8 SoCs, which is a different family than Layerscape. Add a dependency on ARCH_LAYERSCAPE, to prevent asking the user about this driver when configuring a kernel without Layerscape SoC support. Fixes: 02e2af20f4f9f2aa ("Merge tag 'char-misc-5.18-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc") Fixes: 8f73b37cf3fbda67 ("phy: add support for the Layerscape SerDes 28G") Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2022-03-28Merge tag 'char-misc-5.18-rc1' of ↵Linus Torvalds25-234/+2711
git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc Pull char/misc and other driver updates from Greg KH: "Here is the big set of char/misc and other small driver subsystem updates for 5.18-rc1. Included in here are merges from driver subsystems which contain: - iio driver updates and new drivers - fsi driver updates - fpga driver updates - habanalabs driver updates and support for new hardware - soundwire driver updates and new drivers - phy driver updates and new drivers - coresight driver updates - icc driver updates Individual changes include: - mei driver updates - interconnect driver updates - new PECI driver subsystem added - vmci driver updates - lots of tiny misc/char driver updates All of these have been in linux-next for a while with no reported problems" * tag 'char-misc-5.18-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc: (556 commits) firmware: google: Properly state IOMEM dependency kgdbts: fix return value of __setup handler firmware: sysfb: fix platform-device leak in error path firmware: stratix10-svc: add missing callback parameter on RSU arm64: dts: qcom: add non-secure domain property to fastrpc nodes misc: fastrpc: Add dma handle implementation misc: fastrpc: Add fdlist implementation misc: fastrpc: Add helper function to get list and page misc: fastrpc: Add support to secure memory map dt-bindings: misc: add fastrpc domain vmid property misc: fastrpc: check before loading process to the DSP misc: fastrpc: add secure domain support dt-bindings: misc: add property to support non-secure DSP misc: fastrpc: Add support to get DSP capabilities misc: fastrpc: add support for FASTRPC_IOCTL_MEM_MAP/UNMAP misc: fastrpc: separate fastrpc device from channel context dt-bindings: nvmem: brcm,nvram: add basic NVMEM cells dt-bindings: nvmem: make "reg" property optional nvmem: brcm_nvram: parse NVRAM content into NVMEM cells nvmem: dt-bindings: Fix the error of dt-bindings check ...
2022-03-17phy: Remove duplicated include in phy-fsl-lynx-28g.cYang Li1-1/+0
Fix following includecheck warning: ./drivers/phy/freescale/phy-fsl-lynx-28g.c: linux/workqueue.h is included more than once. Reported-by: Abaci Robot <abaci@linux.alibaba.com> Signed-off-by: Yang Li <yang.lee@linux.alibaba.com> Link: https://lore.kernel.org/r/20220315235603.59481-1-yang.lee@linux.alibaba.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2022-03-14phy: add support for the Layerscape SerDes 28GIoana Ciornei3-0/+635
This patch adds a new generic PHY driver to support the Lynx 28G SerDes block found on some of the Layerscape SoCs such as LX2160A. At the moment, only the following Ethernet protocols are supported: SGMII/1000Base-X and 10GBaseR. SerDes lanes which are not running an Ethernet protocol or a currently supported Ethenet protocol will be left as it was configured through the RCW (Reset Configuration Word) at boot time. At probe time, the platform driver will read the current configuration of both PLLs found on a SerDes block and will determine what protocols are supported using that PLL. For example, if a PLL is configured to generate a clock net (frate) of 5GHz the only protocols sustained by that PLL are SGMII/1000Base-X (using a quarter of the full clock rate) and QSGMII using the full clock net frequency on the lane. On the .set_mode() callback, the PHY driver will first check if the requested operating mode (protocol) is even supported by the current PLL configuration and will error out if not. Then, the lane is reconfigured to run on the requested protocol. Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-03-02phy: qcom-qmp: add sc8280xp UFS PHYBjorn Andersson1-0/+3
Reuse the SM8350 UFS PHY initialization sequence to add support for the same found in the Qualcomm SC8280XP platform. Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220225035105.2294599-2-bjorn.andersson@linaro.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-03-02phy: qcom-snps: Add sc8280xp supportBjorn Andersson1-0/+5
The Qualcomm sc8280xp platform comes with a 5nm femto USB PHY which, in contrast to previously seen platforms, has the SIDDQ bit in the COMMON0 register default to high. So make the driver match on the 5nm compatible and make sure to clear the SIDDQ bit on phy_init. Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220225034049.2294207-2-bjorn.andersson@linaro.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-03-02phy: cadence: Add Cadence D-PHY Rx driverPratyush Yadav3-0/+264
The Cadence D-PHY can be configured in Tx (DSI) mode or Rx (CSI) mode. Both modes have a different programming sequence and share little among them. In addition, a PHY configured in Tx mode cannot be used in Rx mode and vice versa. For this reason, create a separate driver for the Rx mode to make it easier to read and maintain. Signed-off-by: Pratyush Yadav <p.yadav@ti.com> Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Link: https://lore.kernel.org/r/20220301111621.2992275-2-p.yadav@ti.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-02-25phy: marvell: phy-mvebu-a3700-comphy: Add native kernel implementationPali Rohár1-117/+1215
Remove old RPC implementation and add a new native kernel implementation. The old implementation uses ARM SMC API to issue RPC calls to ARM Trusted Firmware which provides real implementation of PHY configuration. But older versions of ARM Trusted Firmware do not provide this PHY configuration functionality, simply returning: operation not supported; or worse, some versions provide the configuration functionality incorrectly. For example the firmware shipped in ESPRESSObin board has this older version of ARM Trusted Firmware and therefore SATA, USB 3.0 and PCIe functionality do not work with newer versions of Linux kernel. Due to the above reasons, the following commits were introduced into Linux, to workaround these issues by ignoring -EOPNOTSUPP error code from phy-mvebu-a3700-comphy driver function phy_power_on(): commit 45aefe3d2251 ("ata: ahci: mvebu: Make SATA PHY optional for Armada 3720") commit 3241929b67d2 ("usb: host: xhci: mvebu: make USB 3.0 PHY optional for Armada 3720") commit b0c6ae0f8948 ("PCI: aardvark: Fix initialization with old Marvell's Arm Trusted Firmware") Replace this RPC implementation with proper native kernel implementation, which is independent on the firmware. Never return -EOPNOTSUPP for proper arguments. This should solve multiple issues with real-world boards, where it is not possible or really inconvenient to change the firmware. Let's eliminate these issues. This implementation is ported directly from Armada 3720 comphy driver found in newest version of ARM Trusted Firmware source code, but with various fixes of register names, some added comments, some refactoring due to the original code not conforming to kernel standards. Also PCIe mode poweroff support was added here, and PHY reset support. These changes are also going to be sent to ARM Trusted Firmware. [ Pali did the porting from ATF. I (Marek) then fixed some register names, some various other things, added some comments and refactored the code to kernel standards. Also fixed PHY poweroff and added PHY reset. ] Signed-off-by: Pali Rohár <pali@kernel.org> Acked-by: Miquel Raynal <miquel.raynal@bootlin.com> Signed-off-by: Marek Behún <kabel@kernel.org> Link: https://lore.kernel.org/r/20220203214444.1508-3-kabel@kernel.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-02-25phy: marvell: phy-mvebu-a3700-comphy: Remove port from driver configurationPali Rohár1-33/+29
Port number is encoded into argument for SMC call. It is zero for SATA, PCIe and also both USB 3.0 PHYs. It is non-zero only for Ethernet PHY (incorrectly called SGMII) on lane 0. Ethernet PHY on lane 1 also uses zero port number. So construct "port" bits for SMC call argument can be constructed directly from PHY type and lane number. Change driver code to always pass zero port number for non-ethernet PHYs and for ethernet PHYs determinate port number from lane number. This simplifies the driver. As port number from DT PHY configuration is not used anymore, remove whole driver code which parses it. This also simplifies the driver. Signed-off-by: Pali Rohár <pali@kernel.org> Signed-off-by: Marek Behún <kabel@kernel.org> Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/r/20220203214444.1508-2-kabel@kernel.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-02-25phy: phy-brcm-usb: fixup BCM4908 supportRafał Miłecki3-1/+47
Just like every other family BCM4908 should get its own enum value. That is required to properly handle it in chipset conditional code. The real change is excluding BCM4908 from the PLL reprogramming code (see brcmusb_usb3_pll_54mhz()). I'm not sure what's the BCM4908 reference clock frequency but: 1. BCM4908 custom driver from Broadcom's SDK doesn't reprogram PLL 2. Doing that in Linux driver stopped PHY handling some USB 3.0 devices This change makes USB 3.0 PHY recognize e.g.: 1. 04e8:6860 - Samsung Electronics Co., Ltd Galaxy series, misc. (MTP mode) 2. 1058:259f - Western Digital My Passport 259F Broadcom's STB SoCs come with a set of SUN_TOP_CTRL_* registers that allow reading chip family and product ids. Such a block & register is missing on BCM4908 so this commit introduces "compatible" string specific binding. Fixes: 4b402fa8e0b7 ("phy: phy-brcm-usb: support PHY on the BCM4908") Signed-off-by: Rafał Miłecki <rafal@milecki.pl> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Link: https://lore.kernel.org/r/20220218172459.10431-1-zajec5@gmail.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-02-25phy: ti: tusb1210: Add charger detectionStephan Gerhold1-7/+370
Some Android x86 tablets with a Bay Trail (BYT) SoC and a Crystal Cove PMIC, which does not support charger-detection, rely on a TUSB1211 phy for charger-detection. Add support for charger detection on TUSB1211 phy-s and export the information about the detected charger through the standard power_supply class interface. power_supply class charger IC drivers like the bq24190_charger.c driver will then pick this up and set their input_current_limit based on this. Note the "linux,phy_charger_detect" property used to enable this is a special kernel-internal (so not part of the dt-bindings) property used by dwc3 platform code to indicate that the phy needs to do charger-detection. Changes by Hans de Goede: - Use "linux,phy_charger_detect" property to enable charger-detect - Switch from a linear flow to a state-machine, with retries on ulpi communication errors - Use SW_CONTROL bit to disable the FSM when detection is finished - Do a phy-reset on disconnect to work around the phy often refusing ulpi_read()/_write() commands after a disconnect - Use power_supply_reg_notifier() for Vbus monitoring - Export the detection result through a power_supply class device Signed-off-by: Stephan Gerhold <stephan@gerhold.net> Co-developed-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> Link: https://lore.kernel.org/r/20220213130524.18748-10-hdegoede@redhat.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-02-25phy: ti: tusb1210: Add a delay between power-on and restoring the phy-parametersHans de Goede1-0/+5
Now that we actually log errors on ulpi_write failures it becomes clear that the ulpi_write() restoring the phy-parameters on power-on is failing after a suspend/resume add a short delay after driving the cs line high to fix this. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Link: https://lore.kernel.org/r/20220213130524.18748-9-hdegoede@redhat.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
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