summaryrefslogtreecommitdiff
path: root/drivers/ptp/ptp_ocp.c
AgeCommit message (Collapse)AuthorFilesLines
2022-03-30ptp: ocp: handle error from nvmem_device_findJonathan Lemon1-7/+8
nvmem_device_find returns a valid pointer or IS_ERR(). Handle this properly. Fixes: 0cfcdd1ebcfe ("ptp: ocp: add nvmem interface for accessing eeprom") Signed-off-by: Jonathan Lemon <jonathan.lemon@gmail.com> Link: https://lore.kernel.org/r/20220329160354.4035-1-jonathan.lemon@gmail.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2022-03-19ptp: ocp: use snprintf() in ptp_ocp_verify()Dan Carpenter1-3/+3
This code is fine, but it's easier to review if we use snprintf() instead of sprintf(). Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com> Acked-by: Jonathan Lemon <jonathan.lemon@gmail.com> Link: https://lore.kernel.org/r/20220318074723.GA6617@kili Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2022-03-18ptp: ocp: Make debugfs variables the correct bitwidthJonathan Lemon1-1/+2
An earlier patch mistakenly changed these variables from u32 to u16, leading to unintended truncation. Restore the original logic. Fixes: a509a7c61e3b ("ptp: ocp: Add support for selectable SMA directions.") Reported-by: Dan Carpenter <dan.carpenter@oracle.com> Signed-off-by: Jonathan Lemon <jonathan.lemon@gmail.com> Link: https://lore.kernel.org/r/20220316165347.599154-1-jonathan.lemon@gmail.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2022-03-17ptp: ocp: Fix PTP_PF_* verification requestsJonathan Lemon1-8/+20
Update and check functionality for pin configuration requests: PTP_PF_NONE: requests "IN: None", disabling the pin. # testptp -d /dev/ptp3 -L3,0 -i1 set pin function okay # cat sma4 IN: None PTP_PF_EXTTS: should configure external timestamps, but since the timecard can steer inputs to multiple inputs as well as timestamps, allow the request, but don't change configurations. # testptp -d /dev/ptp3 -L3,1 -i1 set pin function okay (no functional or configuration change here yet) PTP_PF_PEROUT: Channel 0 is the PHC, at 1PPS. Channels 1-4 are the programmable frequency generators. # fails because period is not 1PPS. # testptp -d /dev/ptp3 -L3,2 -i0 -p 500000000 PTP_PEROUT_REQUEST: Invalid argument # testptp -d /dev/ptp3 -L3,2 -i0 -p 1000000000 periodic output request okay # cat sma4 OUT: PHC # testptp -d /dev/ptp3 -L3,2 -i1 -p 500000000 -w 200000000 periodic output request okay # cat sma4 OUT: GEN1 # cat gen1/signal 500000000 40 0 1 2022-03-10T23:55:26 TAI # cat gen1/running 1 # testptp -d /dev/ptp3 -L3,2 -i1 -p 0 periodic output request okay # cat gen1/running 0 Signed-off-by: Jonathan Lemon <jonathan.lemon@gmail.com> Link: https://lore.kernel.org/r/20220315194626.1895-1-jonathan.lemon@gmail.com Signed-off-by: Paolo Abeni <pabeni@redhat.com>
2022-03-11ptp: ocp: Add 2 more timestampersJonathan Lemon1-5/+56
The timecard now has 4 general purpose timestampers. Signed-off-by: Jonathan Lemon <jonathan.lemon@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-03-11ptp: ocp: Add 4 frequency countersJonathan Lemon1-7/+165
Input signals can be steered to any of the frequency counters. The counter measures the frequency over a number of seconds: echo 0 > freq1/seconds = turns off measurement echo 1 > freq1/seconds = sets period & turns on measurment. Signed-off-by: Jonathan Lemon <jonathan.lemon@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-03-11ptp: ocp: Program the signal generators via PTP_CLK_REQ_PEROUTJonathan Lemon1-9/+94
The signal generators can be programmed either via the sysfs file or through a PTP_CLK_REQ_PEROUT ioctl request. Signed-off-by: Jonathan Lemon <jonathan.lemon@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-03-11ptp: ocp: Add signal generators and update sysfs nodesJonathan Lemon1-10/+476
Newer firmware provides 4 programmable signal generators, add support for those here. The signal generators provide the ability to set the period, duty cycle, phase offset, and polarity, with new values defaulting to prior values. The period and phase offset are specified in nanoseconds. E.g: period [duty [phase [polarity]]] echo 500000000 > signal # 1/2 second period echo 1000000 40 100 > signal # 1ms period, 40% on, offset 100ns echo 0 > signal # turn off generator Signed-off-by: Jonathan Lemon <jonathan.lemon@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-03-11ptp: ocp: Add firmware capability bits for feature gatingJonathan Lemon1-5/+33
Add the ability to group sysfs nodes behind a firmware feature check. This way non-present sysfs attributes are omitted on older firmware, which does not have newer features. This will be used in the upcoming patches which adds more features to the timecard. Signed-off-by: Jonathan Lemon <jonathan.lemon@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-03-11ptp: ocp: Add GND and VCC output selectorsJonathan Lemon1-0/+2
These will provide constant outputs. Signed-off-by: Jonathan Lemon <jonathan.lemon@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-03-11ptp: ocp: Rename output selector 'GNSS' to 'GNSS1'Jonathan Lemon1-4/+4
As there are may be 2 GNSS outputs, rename the first one for clarity. This also works around a parsing issue when specifying selectors. Signed-off-by: Jonathan Lemon <jonathan.lemon@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-03-11ptp: ocp: Add ability to disable input selectors.Jonathan Lemon1-11/+23
This adds support for the "IN: None" selector, which disables the input on a sma pin. This should be compatible with old firmware (the firmware will ignore it if not supported). Signed-off-by: Jonathan Lemon <jonathan.lemon@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-03-11ptp: ocp: Add support for selectable SMA directions.Jonathan Lemon1-117/+211
Assuming the firmware allows it, the direction of each SMA connector is no longer fixed. Handle remapping directions for each pin. Signed-off-by: Jonathan Lemon <jonathan.lemon@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-03-11ptp: ocp: add UPF_NO_THRE_TEST flag for serial portsJonathan Lemon1-1/+1
The serial port driver attempts to test for correct THRE behavior on startup. However, it does this by disabling interrupts, and then intentionally trying to trigger an interrupt in order to see if the IIR bit is set in the UART. However, in this FPGA design, the UART interrupt is generated through the MSI vector, so when interrupts are re-enabled after the test, the DMAR-IR reports an unhandled IRTE entry, since no irq handler is installed at this point - it is installed after the test. This only happens on the /second/ open of the UART, since on the first open, the x86_vector has installed and activated by the driver probe, and is correctly handled. When the serial port is closed for the first time, this vector is deactivated and removed, leading to this error. Signed-off-by: Jonathan Lemon <jonathan.lemon@gmail.com> Link: https://lore.kernel.org/r/20220309223427.34745-1-jonathan.lemon@gmail.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2022-03-09ptp: ocp: Update devlink firmware display path.Jonathan Lemon1-26/+17
Cache the firmware version when the card is initialized, and use this field to populate the devlink firmware information. The cached firmware version will be used for feature gating in upcoming patches. Signed-off-by: Jonathan Lemon <jonathan.lemon@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-03-09ptp: ocp: add nvmem interface for accessing eepromJonathan Lemon1-65/+121
Add the at24 drivers for the eeprom, and use the accessors via the nvmem API instead of direct i2c accesses. This makes things cleaner. Add an eeprom map table which specifies where the pre-defined information is located. Retrieve the information and and export it via the devlink interface. Signed-off-by: Jonathan Lemon <jonathan.lemon@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-03-09ptp: ocp: correct label for error pathJonathan Lemon1-2/+2
When devlink_register() was removed from the error path, the corresponding label was not updated. Rename the label for readability puposes, no functional change. Signed-off-by: Jonathan Lemon <jonathan.lemon@gmail.com> Link: https://lore.kernel.org/r/20220308000458.2166-1-jonathan.lemon@gmail.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2022-03-08ptp: ocp: off by in in ptp_ocp_tod_gnss_name()Dan Carpenter1-1/+1
The > ARRAY_SIZE() needs to be >= ARRAY_SIZE() to prevent an out of bounds access. Fixes: 9f492c4cb235 ("ptp: ocp: add TOD debug information") Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com> Acked-by: Richard Cochran <richardcochran@gmail.com> Acked-by: Jonathan Lemon <jonathan.lemon@gmail.com> Link: https://lore.kernel.org/r/20220307141318.GA18867@kili Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2022-03-05ptp: ocp: Add serial port information to the debug summaryJonathan Lemon1-0/+8
On the debug summary page, show the /dev/ttyS<port> mapping. Signed-off-by: Jonathan Lemon <jonathan.lemon@gmail.com> Link: https://lore.kernel.org/r/20220304054615.1737-1-jonathan.lemon@gmail.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2022-03-03Merge git://git.kernel.org/pub/scm/linux/kernel/git/netdev/netJakub Kicinski1-2/+23
net/batman-adv/hard-interface.c commit 690bb6fb64f5 ("batman-adv: Request iflink once in batadv-on-batadv check") commit 6ee3c393eeb7 ("batman-adv: Demote batadv-on-batadv skip error message") https://lore.kernel.org/all/20220302163049.101957-1-sw@simonwunderlich.de/ net/smc/af_smc.c commit 4d08b7b57ece ("net/smc: Fix cleanup when register ULP fails") commit 462791bbfa35 ("net/smc: add sysctl interface for SMC") https://lore.kernel.org/all/20220302112209.355def40@canb.auug.org.au/ Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2022-03-03ptp: ocp: adjust utc_tai_offset to TOD infoVadim Fedorenko1-20/+31
utc_tai_offset is used to correct IRIG, DCF and NMEA outputs and is set during initialisation but is not corrected during leap second announce event. Add watchdog code to control this correction. Signed-off-by: Vadim Fedorenko <vadfed@fb.com> Signed-off-by: Jonathan Lemon <jonathan.lemon@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-03-03ptp: ocp: add tod_correction attributeVadim Fedorenko1-0/+41
TOD correction register is used to compensate for leap seconds in different domains. Export it as an attribute with write access. Signed-off-by: Vadim Fedorenko <vadfed@fb.com> Signed-off-by: Jonathan Lemon <jonathan.lemon@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-03-03ptp: ocp: Expose clock status drift and offsetVadim Fedorenko1-0/+34
Monitoring of clock variance could be done through checking the offset and the drift updates that are applied to atomic clocks. Expose these values as attributes for the timecard. Signed-off-by: Vadim Fedorenko <vadfed@fb.com> Signed-off-by: Jonathan Lemon <jonathan.lemon@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-03-03ptp: ocp: add TOD debug informationVadim Fedorenko1-36/+70
TOD information is currently displayed only on module load, which doesn't provide updated information as the system runs. Create a debug file which provides the current TOD status information, and move the information display there. Signed-off-by: Vadim Fedorenko <vadfed@fb.com> Signed-off-by: Jonathan Lemon <jonathan.lemon@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-03-02ptp: ocp: Add ptp_ocp_adjtime_coarse for large adjustmentsJonathan Lemon1-2/+23
In ("ptp: ocp: Have FPGA fold in ns adjustment for adjtime."), the ns adjustment was written to the FPGA register, so the clock could accurately perform adjustments. However, the adjtime() call passes in a s64, while the clock adjustment registers use a s32. When trying to perform adjustments with a large value (37 sec), things fail. Examine the incoming delta, and if larger than 1 sec, use the original (coarse) adjustment method. If smaller than 1 sec, then allow the FPGA to fold in the changes over a 1 second window. Fixes: 6d59d4fa1789 ("ptp: ocp: Have FPGA fold in ns adjustment for adjtime.") Signed-off-by: Jonathan Lemon <jonathan.lemon@gmail.com> Acked-by: Richard Cochran <richardcochran@gmail.com> Link: https://lore.kernel.org/r/20220228203957.367371-1-jonathan.lemon@gmail.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2021-11-18ptp: ocp: Fix a couple NULL vs IS_ERR() checksDan Carpenter1-4/+5
The ptp_ocp_get_mem() function does not return NULL, it returns error pointers. Fixes: 773bda964921 ("ptp: ocp: Expose various resources on the timecard.") Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-09-27ptp: ocp: Move devlink registration to be last devlink commandLeon Romanovsky1-4/+2
This change prevents from users to access device before devlink is fully configured. Signed-off-by: Leon Romanovsky <leonro@nvidia.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-09-22devlink: Make devlink_register to be voidLeon Romanovsky1-6/+1
devlink_register() can't fail and always returns success, but all drivers are obligated to check returned status anyway. This adds a lot of boilerplate code to handle impossible flow. Make devlink_register() void and simplify the drivers that use that API call. Signed-off-by: Leon Romanovsky <leonro@nvidia.com> Acked-by: Simon Horman <simon.horman@corigine.com> Acked-by: Vladimir Oltean <olteanv@gmail.com> # dsa Reviewed-by: Jiri Pirko <jiri@nvidia.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-09-17ptp: ocp: Avoid operator precedence warning in ptp_ocp_summary_show()Nathan Chancellor1-2/+2
Clang warns twice: drivers/ptp/ptp_ocp.c:2065:16: error: operator '?:' has lower precedence than '&'; '&' will be evaluated first [-Werror,-Wbitwise-conditional-parentheses] on & map ? " ON" : "OFF", src); ~~~~~~~~ ^ drivers/ptp/ptp_ocp.c:2065:16: note: place parentheses around the '&' expression to silence this warning on & map ? " ON" : "OFF", src); ^ ( ) drivers/ptp/ptp_ocp.c:2065:16: note: place parentheses around the '?:' expression to evaluate it first on & map ? " ON" : "OFF", src); ^ on and map are both booleans so this should be a logical AND, which clears up the operator precedence issue. Fixes: a62a56d04e63 ("ptp: ocp: Enable 4th timestamper / PPS generator") Link: https://github.com/ClangBuiltLinux/linux/issues/1457 Suggested-by: Jonathan Lemon <jonathan.lemon@gmail.com> Signed-off-by: Nathan Chancellor <nathan@kernel.org> Acked-by: Jonathan Lemon <jonathan.lemon@gmail.com> Link: https://lore.kernel.org/r/20210917045204.1385801-1-nathan@kernel.org Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2021-09-15ptp: ocp: Add timestamp window adjustmentJonathan Lemon1-11/+66
The following process is used to read the PHC clock and correlate the reading with the "correct" system time. - get starting timestamp - issue PCI write command - issue PCI read command - get ending timestamp - read latched sec/nsec registers The write command is posted to PCI bus and returns. When the write arrives at the FPGA, the PHC time is latched into the sec/nsec registers, and a flag is set indicating the registers are valid. The read command returns this flag, and the time retrieval proceeds. Below is a non-scaled picture of the timing diagram involved. The PHC time corresponds to some SYS time between [start, end]. Userspace usually uses the midpoint between [start, end] to estimate the PCI delay and match this with the PHC time. [start] | | write |-------+ | | \ | read |----+ +----->| | \ * PHC time latched into register | \ | midpoint | +------->| | | | | | +----| | / | |<--------+ | [end] | | As the diagram indicates, the PHC time is latched before the midpoint, so the system clock time is slightly off the real PHC time. This shows up as a phase error with an oscilliscope. The workaround here is to provide a tunable which reduces (shrinks) the end time in the above diagram. This in turn moves the calculated midpoint so the system time and PHC time are in agreemment. Currently, the adjustment reduces the end time by 3/16th of the entire window. E.g.: [start, end] ==> [start, (end - (3/16 * end)], which produces reasonably good results. Also reduce delays by just writing to the clock control register instead of performing a read/modify/write sequence, as the contents of the control register are known. Signed-off-by: Jonathan Lemon <jonathan.lemon@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-09-15ptp: ocp: Have FPGA fold in ns adjustment for adjtime.Jonathan Lemon1-15/+25
The current implementation of adjtime uses gettime/settime to perform nanosecond adjustments. This introduces addtional phase errors due to delays. Instead, use the FPGA's ability to just apply the nanosecond adjustment to the clock directly. Signed-off-by: Jonathan Lemon <jonathan.lemon@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-09-15ptp: ocp: Enable 4th timestamper / PPS generatorJonathan Lemon1-8/+74
A 4th timestamper is added which timestamps the output of the PHC. The clock nanosecond offset is not always zero, so when compared to other timestampers, this provides precise measurements. Also, the timestamper interrupt from the PHC can be used to generate a PPS signal for /dev/pps. Also allow PTP_CLK_REQ_PEROUT requests for a 1PPS output, but do not actually configure any output pins, this is done via sysfs. Signed-off-by: Jonathan Lemon <jonathan.lemon@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-09-15ptp: ocp: Add second GNSS deviceJonathan Lemon1-2/+15
Upcoming boards may have a second GNSS receiver, getting information from a different constellation than the first receiver, which provides some measure of anti-spoofing. Expose the sysfs attribute for this device, if detected. Signed-off-by: Jonathan Lemon <jonathan.lemon@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-09-15ptp: ocp: Add NMEA outputJonathan Lemon1-2/+55
The timecard can provide a NMEA-1083 ZDA (time and date) output string on a serial port, which can be used to drive other devices. Add the NMEA resources, and the serial port as a sysfs attribute. Signed-off-by: Jonathan Lemon <jonathan.lemon@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-09-15ptp: ocp: Add debugfs entry for timecardJonathan Lemon1-0/+233
Provide a view into the timecard internals for debugging. Signed-off-by: Jonathan Lemon <jonathan.lemon@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-09-15ptp: ocp: Separate the init and info logicJonathan Lemon1-36/+60
On startup, parts of the FPGA need to be initialized - break these out into their own functions, separate from the purely informational blocks. On startup, distrbute the UTC:TAI offset from the NMEA GNSS parser, if it is available. Signed-off-by: Jonathan Lemon <jonathan.lemon@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-09-15ptp: ocp: Add sysfs attribute utc_tai_offsetJonathan Lemon1-1/+48
IRIG and DCF output time in UTC, but the timecard operates on TAI internally. Add an attribute node which allows adding an offset to these modes before output. Signed-off-by: Jonathan Lemon <jonathan.lemon@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-09-15ptp: ocp: Add IRIG-B output mode controlJonathan Lemon1-0/+41
IRIG-B has several different output formats, the timecard defaults to using B007. Add a control which selects different output modes. Signed-off-by: Jonathan Lemon <jonathan.lemon@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-09-15ptp: ocp: Add IRIG-B and DCF blocksJonathan Lemon1-0/+129
IRIG (Inter-range Instrumentation Group) timecode format on one of the SMA output channels is provided by the IRIG master FPGA block. Enable the master when the IRIG output format is selected on either one of the output channels. By default, the output is in B007 format. DCF output format is provided by the DCF master block. Also enable the IRIG and DCF slaves, which parse an incoming signal from the external SMA connectors, and may be used to adjust the PHC. Signed-off-by: Jonathan Lemon <jonathan.lemon@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-09-15ptp: ocp: Add SMA selector and controlsJonathan Lemon1-28/+361
The latest firmware for the TimeCard adds selectable signals for the SMA input/outputs. Add support for SMA selectors, and the GPIO controls needed for steering signals. Signed-off-by: Jonathan Lemon <jonathan.lemon@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-09-15ptp: ocp: Add third timestamperJonathan Lemon1-2/+17
The firmware may provide a third signal timestamper, so make it available for use. Signed-off-by: Jonathan Lemon <jonathan.lemon@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-09-15ptp: ocp: Report error if resource registration fails.Jonathan Lemon1-1/+5
If a resource could not be registered, report the name of the resource and the error code. Signed-off-by: Jonathan Lemon <jonathan.lemon@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-09-15ptp: ocp: Skip resources with out of range irqsJonathan Lemon1-29/+18
The TimeCard exposes different resources, which may have their own irqs. Space for the irqs is allocated through a MSI or MSI-X interrupt vector. On some platforms, the interrupt allocation fails. Rather than making this fatal, just skip exposing those resources. The main timecard functionality (that of a PTP clock) will work without the additional resources. Signed-off-by: Jonathan Lemon <jonathan.lemon@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-09-15ptp: ocp: Skip I2C flash read when there is no controller.Jonathan Lemon1-2/+5
If an I2C controller isn't present, don't try and read the I2C flash. Signed-off-by: Jonathan Lemon <jonathan.lemon@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-09-15ptp: ocp: Parameterize the TOD information display.Jonathan Lemon1-1/+2
Only display the TOD information if there is a corresponding TOD resource. Signed-off-by: Jonathan Lemon <jonathan.lemon@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-09-15ptp: ocp: parameterize the i2c driver usedJonathan Lemon1-4/+21
Move the xilinx i2c driver parameters to the resource block instead of hardcoding things in the registration functions. Signed-off-by: Jonathan Lemon <jonathan.lemon@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-08-17ptp: ocp: Fix error path for pci_ocp_device_init()Jonathan Lemon1-3/+4
If ptp_ocp_device_init() fails, pci_disable_device() is skipped. Fix the error handling so this case is covered. Update ptp_ocp_remove() so the normal exit path is identical. Reported-by: Hulk Robot <hulkci@huawei.com> Fixes: 773bda964921 ("ptp: ocp: Expose various resources on the timecard.") Signed-off-by: Jonathan Lemon <jonathan.lemon@gmail.com> Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2021-08-17ptp: ocp: Fix uninitialized variable warning spotted by clang.Jonathan Lemon1-1/+1
If attempting to flash the firmware with a blob of size 0, the entire write loop is skipped and the uninitialized err is returned. Fix by setting to 0 first. Fixes: 773bda964921 ("ptp: ocp: Expose various resources on the timecard.") Signed-off-by: Jonathan Lemon <jonathan.lemon@gmail.com> Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2021-08-09devlink: Set device as early as possibleLeon Romanovsky1-22/+4
All kernel devlink implementations call to devlink_alloc() during initialization routine for specific device which is used later as a parent device for devlink_register(). Such late device assignment causes to the situation which requires us to call to device_register() before setting other parameters, but that call opens devlink to the world and makes accessible for the netlink users. Any attempt to move devlink_register() to be the last call generates the following error due to access to the devlink->dev pointer. [ 8.758862] devlink_nl_param_fill+0x2e8/0xe50 [ 8.760305] devlink_param_notify+0x6d/0x180 [ 8.760435] __devlink_params_register+0x2f1/0x670 [ 8.760558] devlink_params_register+0x1e/0x20 The simple change of API to set devlink device in the devlink_alloc() instead of devlink_register() fixes all this above and ensures that prior to call to devlink_register() everything already set. Signed-off-by: Leon Romanovsky <leonro@nvidia.com> Reviewed-by: Jiri Pirko <jiri@nvidia.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-08-06ptp: ocp: Remove pending_image indicator from devlinkJonathan Lemon1-10/+0
After writing an image blob to the flash memory, a reboot is required to reload the FPGA. There is no versioning prsent in the FPGA image file, so only a running version is available. The 'stored version' was set to 'pending' in order to indicate a reboot was needed. This isn't reliable, as the module could be unloaded/loaded, losing the "reboot needed" indicator. Also, the devlink 'stored version' information is designed to refer to the actual image version. Unfortunately, there is no method to determine the flash image version other than booting it, so remove the devlink stored version setting. Signed-off-by: Jonathan Lemon <jonathan.lemon@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
generated by cgit v1.2.3 (git 2.39.0) at 2024-10-06 09:57:13 +0300