starfive-tech/linux.git - StarFive Tech Linux Kernel for VisionFive (JH7110) boards (mirror)

Age	Commit message (Collapse)	Author	Files	Lines
2020-09-30	regulator: rtmv20: Add missing regcache cache only before marked as dirty	ChiYuan Huang	1	-0/+1
	Add missing regcache cache only before masked as dirty. Signed-off-by: ChiYuan Huang <cy_huang@richtek.com> Link: https://lore.kernel.org/r/1601461132-15251-1-git-send-email-u0084500@gmail.com Signed-off-by: Mark Brown <broonie@kernel.org>
2020-09-30	regulator: rtmv20: Update DT binding document and property name parsing	ChiYuan Huang	1	-16/+20
	1. Add vendor suffix to all proprietary properties. 2. Fix typo. 3. Change lsw to normal property, not pattern property. 4. Due to item 1, modify source code for property parsing. Signed-off-by: ChiYuan Huang <cy_huang@richtek.com> Link: https://lore.kernel.org/r/1601460480-4259-1-git-send-email-u0084500@gmail.com Signed-off-by: Mark Brown <broonie@kernel.org>
2020-09-28	regulator: rtmv20: Adds support for Richtek RTMV20 load switch regulator	ChiYuan Huang	1	-0/+392
	Add support for Richtek RTMV20 load switch regulator. Signed-off-by: ChiYuan Huang <cy_huang@richtek.com> Link: https://lore.kernel.org/r/1601277584-5526-1-git-send-email-u0084500@gmail.com Signed-off-by: Mark Brown <broonie@kernel.org>