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2021-03-26soc: qcom-geni-se: Cleanup the code to remove proxy votesRoja Rani Yarubandi1-74/+0
This reverts commit 048eb908a1f2 ("soc: qcom-geni-se: Add interconnect support to fix earlycon crash") ICC core and platforms drivers supports sync_state feature, which ensures that the default ICC BW votes from the bootloader is not removed until all it's consumers are probes. The proxy votes were needed in case other QUP child drivers I2C, SPI probes before UART, they can turn off the QUP-CORE clock which is shared resources for all QUP driver, this causes unclocked access to HW from earlycon. Given above support from ICC there is no longer need to maintain proxy votes on QUP-CORE ICC node from QUP wrapper driver for early console usecase, the default votes won't be removed until real console is probed. Cc: stable@vger.kernel.org Fixes: 266cd33b5913 ("interconnect: qcom: Ensure that the floor bandwidth value is enforced") Fixes: 7d3b0b0d8184 ("interconnect: qcom: Use icc_sync_state") Signed-off-by: Roja Rani Yarubandi <rojay@codeaurora.org> Signed-off-by: Akash Asthana <akashast@codeaurora.org> Reviewed-by: Matthias Kaehlcke <mka@chromium.org> Link: https://lore.kernel.org/r/20210324101836.25272-2-rojay@codeaurora.org Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2021-02-03soc: qcom: ocmem: don't return NULL in of_get_ocmemLuca Weiss1-1/+7
If ocmem probe fails for whatever reason, of_get_ocmem returned NULL. Without this, users must check for both NULL and IS_ERR on the returned pointer - which didn't happen in drivers/gpu/drm/msm/adreno/adreno_gpu.c leading to a NULL pointer dereference. Reviewed-by: Brian Masney <masneyb@onstation.org> Fixes: 88c1e9404f1d ("soc: qcom: add OCMEM driver") Signed-off-by: Luca Weiss <luca@z3ntu.xyz> Link: https://lore.kernel.org/r/20210130142349.53335-1-luca@z3ntu.xyz Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-01-28soc: qcom: socinfo: Remove unwanted le32_to_cpu()Dmitry Baryshkov1-2/+2
Remove extra le32_to_cpu() conversion, data is already converted from le32 to cpu endianness. This fixes two following warnings: drivers/soc/qcom/socinfo.c:322:36: sparse: sparse: cast to restricted __le32 drivers/soc/qcom/socinfo.c:323:36: sparse: sparse: cast to restricted __le32 Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Fixes: 734c78e7febf ("soc: qcom: socinfo: add info from PMIC models array") Link: https://lore.kernel.org/r/20210118152236.514776-1-dmitry.baryshkov@linaro.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-01-27soc: qcom: aoss: Add SM8350 compatibleVinod Koul1-0/+1
Add SM8350 compatible to the qcom_aoss binding and driver. Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Vinod Koul <vkoul@kernel.org> Link: https://lore.kernel.org/r/20210127123054.263231-3-vkoul@kernel.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-01-25drivers: soc: qcom: rpmpd: Add msm8994 RPM Power DomainsKonrad Dybcio1-0/+28
MSM8994 uses similar to MSM8996, legacy-style voltage control, but does not include a VDD_SC_CX line. This setup is also correct for MSM8992. Do note that there exist some boards that use a tertiary PMIC (most likely pm8004), where SMPB on VDDGFX becomes SMPC. I cannot test this configuration though. Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org> Link: https://lore.kernel.org/r/20210118161943.105733-1-konrad.dybcio@somainline.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-01-21soc: qcom: socinfo: Fix an off by one in qcom_show_pmic_model()Dan Carpenter1-1/+1
These need to be < ARRAY_SIZE() instead of <= ARRAY_SIZE() to prevent accessing one element beyond the end of the array. Acked-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Douglas Anderson <dianders@chromium.org> Reviewed-by: Stephen Boyd <swboyd@chromium.org> Fixes: e9247e2ce577 ("soc: qcom: socinfo: fix printing of pmic_model") Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com> Link: https://lore.kernel.org/r/YAf+o85Z9lgkq3Nw@mwanda Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-01-21soc: qcom: socinfo: Fix off-by-one array index bounds checkColin Ian King1-1/+1
There is an off-by-one array index bounds check on array pmic_models. Fix this by checking using < rather than <= on the array size. Addresses-Coverity: ("Out-of-bounds read") Fixes: 734c78e7febf ("soc: qcom: socinfo: add info from PMIC models array") Signed-off-by: Colin Ian King <colin.king@canonical.com> Link: https://lore.kernel.org/r/20210118113651.71955-1-colin.king@canonical.com Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-01-15soc: qcom: socinfo: Add MDM9607 IDsKonrad Dybcio1-0/+6
Along with IDs for its derivatives. Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org> Link: https://lore.kernel.org/r/20210115162728.118249-1-konrad.dybcio@somainline.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-01-15soc: qcom: socinfo: Add SoC IDs for APQ/MSM8998Konrad Dybcio1-0/+2
Add missing SoC IDs for Snapdragon 835-family platforms. Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org> Tested-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org> Link: https://lore.kernel.org/r/20210109163123.147185-2-konrad.dybcio@somainline.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-01-15soc: qcom: socinfo: Add SoC IDs for 630 familyKonrad Dybcio1-0/+7
Add missing SoC IDs for Snapdragon 630-family platforms. Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org> Tested-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org> Link: https://lore.kernel.org/r/20210109163123.147185-1-konrad.dybcio@somainline.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-01-15soc: qcom: socinfo: Open read access to all for debugfsStephen Boyd1-20/+20
There doesn't seem to be any reason to limit this to only root user readable. Let's make it readable by all so that random programs can read the debugfs files in here instead of just root. The information is just that, informational, so this is fine. Reviewed-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org> Reviewed-by: Douglas Anderson <dianders@chromium.org> Cc: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org> Cc: Douglas Anderson <dianders@chromium.org> Cc: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Stephen Boyd <swboyd@chromium.org> Link: https://lore.kernel.org/r/20201216071926.3147108-1-swboyd@chromium.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-01-15soc: qcom: socinfo: add info from PMIC models arrayDmitry Baryshkov1-3/+39
Add debugfs file showing information from PMIC model array. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20201222130448.4125297-3-dmitry.baryshkov@linaro.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-01-15soc: qcom: socinfo: add several PMIC IDsDmitry Baryshkov1-0/+5
Add several PMIC IDs found on Qualcomm RB5 platform. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20201222130448.4125297-2-dmitry.baryshkov@linaro.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-01-15soc: qcom: socinfo: add qrb5165 SoC IDDmitry Baryshkov1-0/+1
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20201222130448.4125297-1-dmitry.baryshkov@linaro.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-01-07soc: qcom: rpmh: Remove serialization of TCS commandsLina Iyer1-13/+9
Requests sent to RPMH can be sent as fire-n-forget or response required, with the latter ensuring the command has been completed by the hardware accelerator. Commands in a request with tcs_cmd::wait set, would ensure that those select commands are sent as response required, even though the actual TCS request may be fire-n-forget. Also, commands with .wait flag were also guaranteed to be complete before the following command in the TCS is sent. This means that the next command of the same request blocked until the current request is completed. This could mean waiting for a voltage to settle or series of NOCs be configured before the next command is sent. But drivers using this feature have never cared about the serialization aspect. By not enforcing the serialization we can allow the hardware to run in parallel improving the performance. Let's clarify the usage of this member in the tcs_cmd structure to mean only completion and not serialization. This should also improve the performance of bus requests where changes could happen in parallel. Also, CPU resume from deep idle may see benefits from certain wake requests. Reviewed-by: Douglas Anderson <dianders@chromium.org> Signed-off-by: Lina Iyer <ilina@codeaurora.org> Signed-off-by: Maulik Shah <mkshah@codeaurora.org> Link: https://lore.kernel.org/r/1610008770-13891-1-git-send-email-mkshah@codeaurora.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-12-28soc: qcom: smem: use %*ph to print small bufferAndy Shevchenko1-3/+1
Use %*ph format to print small buffer as hex string. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://lore.kernel.org/r/20200730153220.39466-1-andriy.shevchenko@linux.intel.com Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-12-28drivers: qcom: rpmh-rsc: Do not read back the register write on triggerLina Iyer1-1/+1
When triggering a TCS to send its contents, reading back the trigger value may return an incorrect value. That is because, writing the trigger may raise an interrupt which could be handled immediately and the trigger value could be reset in the interrupt handler. A write_tcs_reg_sync() would read back the value that is written and try to match it to the value written to ensure that the value is written, but if that value is different, we may see false error for same. Reviewed-by: Douglas Anderson <dianders@chromium.org> Signed-off-by: Lina Iyer <ilina@codeaurora.org> Signed-off-by: Maulik Shah <mkshah@codeaurora.org> Link: https://lore.kernel.org/r/1606211610-15168-1-git-send-email-mkshah@codeaurora.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-12-28soc: qcom: llcc-qcom: Add support for SM8250 SoCManivannan Sadhasivam1-0/+38
SM8250 SoC uses LLCC IP version 2. In this version, the WRSC_EN register needs to be written to enable the Write Sub Cache for each SCID. Hence, use a dedicated "write_scid_en" member with predefined values and write them for LLCC IP version 2. Reviewed-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org> Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Link: https://lore.kernel.org/r/20201130093924.45057-5-manivannan.sadhasivam@linaro.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-12-28soc: qcom: llcc-qcom: Extract major hardware versionSai Prakash Ranjan1-0/+12
The major hardware version of the LLCC IP is encoded in its LLCC_COMMON_HW_INFO register. Extract the version and cache it in the driver data so that it can be used to implement version specific functionality like enabling Write sub cache for given SCID. Signed-off-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org> [mani: splitted the version extract as a single patch and few cleanups] Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Link: https://lore.kernel.org/r/20201130093924.45057-4-manivannan.sadhasivam@linaro.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-11-26soc: qcom: rpmhpd: Add SDX55 power domainsVinod Koul1-0/+13
This adds the power domains found in SDX55 SoC. Downstream code tells me that we have 3 power domains so add them Acked-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Signed-off-by: Vinod Koul <vkoul@kernel.org> Link: https://lore.kernel.org/r/20201126092711.1084518-2-vkoul@kernel.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-11-26soc: qcom: rpmh: Use __fill_rpmh_msg API during rpmh_write()Maulik Shah1-9/+3
Use __fill_rpmh_msg API during rpmh_write(). This allows to remove duplication of code in error checking, copying commands and setting message state. Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Maulik Shah <mkshah@codeaurora.org> Link: https://lore.kernel.org/r/1606379490-4052-1-git-send-email-mkshah@codeaurora.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-11-23soc: qcom: pdr: Constify static qmi structsRikard Falkeborn1-3/+3
Their only usage is to pass their address to qmi_handle_init() which accepts const pointers to both qmi_ops and qmi_msg_handler. Make them const to allow the compiler to put them in read-only memory. Signed-off-by: Rikard Falkeborn <rikard.falkeborn@gmail.com> Link: https://lore.kernel.org/r/20201122232818.32072-1-rikard.falkeborn@gmail.com Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-11-22soc: qcom: initialize local variableTom Rix1-1/+1
clang static analysis reports this problem pdr_interface.c:596:6: warning: Branch condition evaluates to a garbage value if (!req.service_path[0]) ^~~~~~~~~~~~~~~~~~~~ This check that req.service_path was set in an earlier loop. However req is a stack variable and its initial value is undefined. So initialize req to 0. Fixes: fbe639b44a82 ("soc: qcom: Introduce Protection Domain Restart helpers") Reviewed-by: Sibi Sankar <sibis@codeaurora.org> Signed-off-by: Tom Rix <trix@redhat.com> Link: https://lore.kernel.org/r/20200819184637.15648-1-trix@redhat.com Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-11-22soc: qcom: socinfo: add soc ids for msm8953 variantsVladimir Lypak1-0/+6
Add SoC IDs for MSM8953, APQ8053, SDM(SDA)450, SDM(SDA)632. Signed-off-by: Vladimir Lypak <junak.pub@gmail.com> Link: https://lore.kernel.org/r/20201004082223.324019-1-junak.pub@gmail.com Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-11-22soc: qcom: geni: Remove "iova" checkRoja Rani Yarubandi1-2/+2
Remove "iova" check from geni_se_tx_dma_unprep and geni_se_rx_dma_unprep functions as checking with dma_mapping_error() is enough. Signed-off-by: Roja Rani Yarubandi <rojay@codeaurora.org> Link: https://lore.kernel.org/r/20201030145959.505-2-rojay@codeaurora.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-11-20soc: qcom: llcc: Add configuration data for SM8150Souradeep Chowdhury1-0/+30
Add LLCC configuration data for SM8150 SoC which controls LLCC behaviour. Signed-off-by: Souradeep Chowdhury <schowdhu@codeaurora.org> Link: https://lore.kernel.org/r/957e3ae50c75720ef6227529d5ce3d4b457802e9.1601452132.git.schowdhu@codeaurora.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-11-11soc: qcom: rpmh: Fix possible doc-rot in rpmh_write()'s headerLee Jones1-1/+1
Fixes the following W=1 kernel build warning(s): drivers/soc/qcom/rpmh.c:266: warning: Function parameter or member 'dev' not described in 'rpmh_write' drivers/soc/qcom/rpmh.c:266: warning: Excess function parameter 'rc' description in 'rpmh_write' Cc: Andy Gross <agross@kernel.org> Cc: Bjorn Andersson <bjorn.andersson@linaro.org> Cc: linux-arm-msm@vger.kernel.org Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Lee Jones <lee.jones@linaro.org> Link: https://lore.kernel.org/r/20201103152838.1290217-16-lee.jones@linaro.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-11-11soc: qcom: kryo-l2-accessors: Fix misnaming of 'val'Lee Jones1-1/+1
Fixes the following W=1 kernel build warning(s): drivers/soc/qcom/kryo-l2-accessors.c:25: warning: Function parameter or member 'val' not described in 'kryo_l2_set_indirect_reg' drivers/soc/qcom/kryo-l2-accessors.c:25: warning: Excess function parameter 'value' description in 'kryo_l2_set_indirect_reg' Cc: Andy Gross <agross@kernel.org> Cc: Bjorn Andersson <bjorn.andersson@linaro.org> Cc: linux-arm-msm@vger.kernel.org Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Lee Jones <lee.jones@linaro.org> Link: https://lore.kernel.org/r/20201103152838.1290217-23-lee.jones@linaro.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-11-11soc: qcom: rpmhpd: Provide some missing struct member descriptionsLee Jones1-0/+3
Fixes the following W=1 kernel build warning(s): drivers/soc/qcom/rpmhpd.c:52: warning: Function parameter or member 'parent' not described in 'rpmhpd' drivers/soc/qcom/rpmhpd.c:52: warning: Function parameter or member 'corner' not described in 'rpmhpd' drivers/soc/qcom/rpmhpd.c:52: warning: Function parameter or member 'active_corner' not described in 'rpmhpd' Cc: Andy Gross <agross@kernel.org> Cc: Bjorn Andersson <bjorn.andersson@linaro.org> Cc: linux-arm-msm@vger.kernel.org Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Lee Jones <lee.jones@linaro.org> Link: https://lore.kernel.org/r/20201103152838.1290217-22-lee.jones@linaro.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-11-11soc: qcom: llcc-qcom: Fix expected kernel-doc formattingLee Jones1-1/+1
Kernel-doc expects struct documentation to start with 'struct <name>'. Fixes the following W=1 kernel build warning(s): drivers/soc/qcom/llcc-qcom.c:77: warning: cannot understand function prototype: 'struct llcc_slice_config ' Cc: Andy Gross <agross@kernel.org> Cc: Bjorn Andersson <bjorn.andersson@linaro.org> Cc: linux-arm-msm@vger.kernel.org Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Lee Jones <lee.jones@linaro.org> Link: https://lore.kernel.org/r/20201103152838.1290217-21-lee.jones@linaro.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-11-11soc: qcom: smp2p: Remove unused struct attribute provide anotherLee Jones1-0/+1
Fixes the following W=1 kernel build warning: drivers/soc/qcom/smp2p.c:149: warning: Function parameter or member 'out' not described in 'qcom_smp2p' Cc: Andy Gross <agross@kernel.org> Cc: Bjorn Andersson <bjorn.andersson@linaro.org> Cc: linux-arm-msm@vger.kernel.org Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Lee Jones <lee.jones@linaro.org> Link: https://lore.kernel.org/r/20201103152838.1290217-20-lee.jones@linaro.org [bjorn: Dropped hunk that fixed the same warning in smp2p_smem_item] Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-11-11soc: qcom: wcnss_ctrl: Demote non-conformant struct header and fix function ↵Lee Jones1-3/+5
headers Fixes the following W=1 kernel build warning(s): drivers/soc/qcom/wcnss_ctrl.c:81: warning: Function parameter or member 'major' not described in 'wcnss_version_resp' drivers/soc/qcom/wcnss_ctrl.c:81: warning: Function parameter or member 'minor' not described in 'wcnss_version_resp' drivers/soc/qcom/wcnss_ctrl.c:81: warning: Function parameter or member 'version' not described in 'wcnss_version_resp' drivers/soc/qcom/wcnss_ctrl.c:81: warning: Function parameter or member 'revision' not described in 'wcnss_version_resp' drivers/soc/qcom/wcnss_ctrl.c:122: warning: Function parameter or member 'rpdev' not described in 'wcnss_ctrl_smd_callback' drivers/soc/qcom/wcnss_ctrl.c:122: warning: Function parameter or member 'priv' not described in 'wcnss_ctrl_smd_callback' drivers/soc/qcom/wcnss_ctrl.c:122: warning: Function parameter or member 'addr' not described in 'wcnss_ctrl_smd_callback' drivers/soc/qcom/wcnss_ctrl.c:122: warning: Excess function parameter 'channel' description in 'wcnss_ctrl_smd_callback' drivers/soc/qcom/wcnss_ctrl.c:272: warning: Function parameter or member 'priv' not described in 'qcom_wcnss_open_channel' Cc: Andy Gross <agross@kernel.org> Cc: Bjorn Andersson <bjorn.andersson@linaro.org> Cc: linux-arm-msm@vger.kernel.org Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Lee Jones <lee.jones@linaro.org> Link: https://lore.kernel.org/r/20201103152838.1290217-19-lee.jones@linaro.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-11-11soc: qcom: smsm: Fix some kernel-doc formatting and naming problemsLee Jones1-3/+1
Fixes the following W=1 kernel build warning(s): drivers/soc/qcom/smsm.c:140: warning: Function parameter or member 'mask' not described in 'smsm_update_bits' drivers/soc/qcom/smsm.c:140: warning: Excess function parameter 'offset' description in 'smsm_update_bits' drivers/soc/qcom/smsm.c:257: warning: bad line: drivers/soc/qcom/smsm.c:260: warning: bad line: Cc: Andy Gross <agross@kernel.org> Cc: Bjorn Andersson <bjorn.andersson@linaro.org> Cc: linux-arm-msm@vger.kernel.org Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Lee Jones <lee.jones@linaro.org> Link: https://lore.kernel.org/r/20201103152838.1290217-18-lee.jones@linaro.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-11-11soc: qcom: smem: Fix formatting and missing documentation issuesLee Jones1-1/+2
Fixes the following W=1 kernel build warning(s): drivers/soc/qcom/smem.c:135: warning: Function parameter or member 'toc' not described in 'smem_header' drivers/soc/qcom/smem.c:275: warning: Function parameter or member 'socinfo' not described in 'qcom_smem' Cc: Andy Gross <agross@kernel.org> Cc: Bjorn Andersson <bjorn.andersson@linaro.org> Cc: linux-arm-msm@vger.kernel.org Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Lee Jones <lee.jones@linaro.org> Link: https://lore.kernel.org/r/20201103152838.1290217-17-lee.jones@linaro.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-11-11soc: qcom: qcom-geni-se: Fix misnamed function parameter 'rx_rfr'Lee Jones1-2/+3
Fixes the following W=1 kernel build warning(s): drivers/soc/qcom/qcom-geni-se.c:85: warning: Cannot understand * @struct geni_wrapper - Data structure to represent the QUP Wrapper Core drivers/soc/qcom/qcom-geni-se.c:246: warning: Function parameter or member 'rx_rfr' not described in 'geni_se_init' drivers/soc/qcom/qcom-geni-se.c:246: warning: Excess function parameter 'rx_rfr_wm' description in 'geni_se_init' Cc: Andy Gross <agross@kernel.org> Cc: Bjorn Andersson <bjorn.andersson@linaro.org> Cc: linux-arm-msm@vger.kernel.org Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Lee Jones <lee.jones@linaro.org> Link: https://lore.kernel.org/r/20201103152838.1290217-13-lee.jones@linaro.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-11-11soc: qcom: qcom_aoss: Add missing description for 'cooling_devs'Lee Jones1-0/+1
Fixes the following W=1 kernel build warning(s): drivers/soc/qcom/qcom_aoss.c:86: warning: Function parameter or member 'cooling_devs' not described in 'qmp' Cc: Andy Gross <agross@kernel.org> Cc: Bjorn Andersson <bjorn.andersson@linaro.org> Cc: linux-arm-msm@vger.kernel.org Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Lee Jones <lee.jones@linaro.org> Link: https://lore.kernel.org/r/20201103152838.1290217-4-lee.jones@linaro.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-11-11soc: qcom: qcom_aoss: Remove set but unused variable 'tlen'Lee Jones1-2/+1
Fixes the following W=1 kernel build warning(s): drivers/soc/qcom/qcom_aoss.c: In function ‘qmp_send’: drivers/soc/qcom/qcom_aoss.c:228:9: warning: variable ‘tlen’ set but not used [-Wunused-but-set-variable] Cc: Andy Gross <agross@kernel.org> Cc: Bjorn Andersson <bjorn.andersson@linaro.org> Cc: linux-arm-msm@vger.kernel.org Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Lee Jones <lee.jones@linaro.org> Link: https://lore.kernel.org/r/20201103152838.1290217-3-lee.jones@linaro.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-10-28soc: qcom: Kconfig: make RPMH match Command DB settingLina Iyer1-0/+1
RPMH and drivers that use RPMH APIs need Command DB API to find the dynamic resource information. Let's match the RPMH to match the Command DB configuration. This should fix undefined symbol references reported by CI : aarch64-linux-ld: drivers/clk/qcom/clk-rpmh.o: in function `clk_rpmh_probe': >> clk-rpmh.c:(.text+0xac): undefined reference to `cmd_db_read_addr' >> aarch64-linux-ld: clk-rpmh.c:(.text+0xc0): undefined reference to `cmd_db_read_aux_data' aarch64-linux-ld: drivers/soc/qcom/rpmh-rsc.o: in function `rpmh_rsc_probe': >> rpmh-rsc.c:(.text+0x42c): undefined reference to `cmd_db_ready' aarch64-linux-ld: drivers/regulator/qcom-rpmh-regulator.o: in function `rpmh_regulator_probe': >> qcom-rpmh-regulator.c:(.text+0x3e0): undefined reference to `cmd_db_read_addr' Cc: Todd Kjos <tkjos@google.com> Cc: John Stultz <john.stultz@linaro.org> Cc: Maulik Shah <mkshah@codeaurora.org> Reported-by: kernel test robot <lkp@intel.com> Signed-off-by: Lina Iyer <ilina@codeaurora.org> Link: https://lore.kernel.org/r/20201008040907.7036-1-ilina@codeaurora.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-10-27Merge tag '20201013212531.428538-1-dianders@chromium.org' into drivers-for-5.11Bjorn Andersson1-14/+41
2020-10-27soc: qcom: cmd-db: allow loading as a moduleLina Iyer2-2/+8
This patch enables Command DB driver to be loaded as a module. Command DB is inherent to RPMH interaction and as such would never be unloaded. Add supress_bind_attrs to make it a permanently loaded module. Reviewed-by: John Stultz <john.stultz@linaro.org> Reviewed-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Tested-by: John Stultz <john.stultz@linaro.org> Signed-off-by: Lina Iyer <ilina@codeaurora.org> Link: https://lore.kernel.org/r/20201001154144.5226-1-ilina@codeaurora.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-10-26soc: qcom: geni: Optimize/comment select fifo/dma modeDouglas Anderson1-18/+32
The functions geni_se_select_fifo_mode() and geni_se_select_fifo_mode() are a little funny. They read/write a bunch of memory mapped registers even if they don't change or aren't relevant for the current protocol. Let's make them a little more sane. We'll also add a comment explaining why we don't do some of the operations for UART. NOTE: there is no evidence at all that this makes any performance difference and it fixes no bugs. However, it seems (to me) like it makes the functions a little easier to understand. Decreasing the amount of times we read/write memory mapped registers is also nice, even if we are using "relaxed" variants. Signed-off-by: Douglas Anderson <dianders@chromium.org> Link: https://lore.kernel.org/r/20201013142448.v2.3.I646736d3969dc47de8daceb379c6ba85993de9f4@changeid Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-10-26soc: qcom: geni: More properly switch to DMA modeDouglas Anderson1-2/+15
On geni-i2c transfers using DMA, it was seen that if you program the command (I2C_READ) before calling geni_se_rx_dma_prep() that it could cause interrupts to fire. If we get unlucky, these interrupts can just keep firing (and not be handled) blocking further progress and hanging the system. In commit 02b9aec59243 ("i2c: i2c-qcom-geni: Fix DMA transfer race") we avoided that by making sure we didn't program the command until after geni_se_rx_dma_prep() was called. While that avoided the problems, it also turns out to be invalid. At least in the TX case we started seeing sporadic corrupted transfers. This is easily seen by adding an msleep() between the DMA prep and the writing of the command, which makes the problem worse. That means we need to revert that commit and find another way to fix the bogus IRQs. Specifically, after reverting commit 02b9aec59243 ("i2c: i2c-qcom-geni: Fix DMA transfer race"), I put some traces in. I found that the when the interrupts were firing like crazy: - "m_stat" had bits for M_RX_IRQ_EN, M_RX_FIFO_WATERMARK_EN set. - "dma" was set. Further debugging showed that I could make the problem happen more reliably by adding an "msleep(1)" any time after geni_se_setup_m_cmd() ran up until geni_se_rx_dma_prep() programmed the length. A rather simple fix is to change geni_se_select_dma_mode() so it's a true inverse of geni_se_select_fifo_mode() and disables all the FIFO related interrupts. Now the problematic interrupts can't fire and we can program things in the correct order without worrying. As part of this, let's also change the writel_relaxed() in the prepare function to a writel() so that our DMA is guaranteed to be prepared now that we can't rely on geni_se_setup_m_cmd()'s writel(). NOTE: the only current user of GENI_SE_DMA in mainline is i2c. Fixes: 37692de5d523 ("i2c: i2c-qcom-geni: Add bus driver for the Qualcomm GENI I2C controller") Fixes: 02b9aec59243 ("i2c: i2c-qcom-geni: Fix DMA transfer race") Signed-off-by: Douglas Anderson <dianders@chromium.org> Reviewed-by: Stephen Boyd <swboyd@chromium.org> Reviewed-by: Akash Asthana <akashast@codeaurora.org> Tested-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20201013142448.v2.1.Ifdb1b69fa3367b81118e16e9e4e63299980ca798@changeid Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-10-26soc: qcom: rpmpd: Add MSM8916 power domainsStephan Gerhold1-0/+21
MSM8916 has two RPM power domains: VDDCX and VDDMX. Add the necessary definitions to manage them with rpmpd. Signed-off-by: Stephan Gerhold <stephan@gerhold.net> Link: https://lore.kernel.org/r/20200916104135.25085-4-stephan@gerhold.net Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-10-26soc: qcom: rpmpd: Add MSM8939 power-domainsJun Nie1-0/+27
Add the shared modemcx/cx/mx power-domains found on MSM8939. Reviewed-by: Stephan Gerhold <stephan@gerhold.net> Signed-off-by: Jun Nie <jun.nie@linaro.org> Link: https://lore.kernel.org/r/20200930100145.9457-3-jun.nie@linaro.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-10-26soc: qcom: rpmpd: Rename MAX_8996_RPMPD_STATE to MAX_CORNER_RPMPD_STATEStephan Gerhold1-2/+2
Older SoCs like MSM8916, MSM8939, MSM8974, MSM8996, ... use "voltage corners" instead of "voltage levels". It seems like they all use exactly the same set of corner values, a value from 0-6 where 6 is the maximum corner (super turbo). In preparation to add the power domains for MSM8916, rename MAX_8996_RPMPD_STATE to MAX_CORNER_RPMPD_STATE to make it clear that this is the max_state to be used for all SoCs using corners. - Signed-off-by: Stephan Gerhold <stephan@gerhold.net> Link: https://lore.kernel.org/r/20200916104135.25085-2-stephan@gerhold.net Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-10-26soc: qcom: rpmpd: Add SDM660 power-domainsKonrad Dybcio1-0/+33
Add the shared cx/mx and sensor sub-system's cx and mx power-domains found on SDM660. Signed-off-by: Konrad Dybcio <konradybcio@gmail.com> Signed-off-by: AngeloGioacchino Del Regno <kholk11@gmail.com> Link: https://lore.kernel.org/r/20201018122620.9735-1-kholk11@gmail.com Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-10-26soc: qcom: rpmh: Allow RPMH driver to be loaded as a moduleJohn Stultz2-1/+6
This patch allow the rpmh driver to be loaded as a permenent module. Meaning it can be loaded from a module, but then cannot be unloaded. Ideally, it would include a remove hook and related logic, but the rpmh driver is fairly core to the system, so once its loaded with almost anything else to get the system to go, the dependencies are not likely to ever also be removed. So making it a permanent module at least improves things slightly over requiring it to be a built in driver. Cc: Todd Kjos <tkjos@google.com> Cc: Saravana Kannan <saravanak@google.com> Cc: Andy Gross <agross@kernel.org> Cc: Bjorn Andersson <bjorn.andersson@linaro.org> Cc: Rajendra Nayak <rnayak@codeaurora.org> Cc: linux-arm-msm@vger.kernel.org Signed-off-by: John Stultz <john.stultz@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> [mkshah: Fix typos in commit message, send after removing _rcuidle trace] Signed-off-by: Maulik Shah <mkshah@codeaurora.org> Reviewed-by: Stephen Boyd <swboyd@chromium.org> Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/1601877596-32676-3-git-send-email-mkshah@codeaurora.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-10-26Revert "drivers: qcom: rpmh-rsc: Use rcuidle tracepoints for rpmh"Maulik Shah1-1/+1
Commit efde2659b0fe ("drivers: qcom: rpmh-rsc: Use rcuidle tracepoints for rpmh") was written to fix a bug seen in an unmerged series that implemented a struct generic_pm_domain::power_off() callback calling rpmh_flush(). See stack trace below. Call trace: dump_backtrace+0x0/0x174 show_stack+0x20/0x2c dump_stack+0xc8/0x124 lockdep_rcu_suspicious+0xe4/0x104 __tcs_buffer_write+0x230/0x2d0 rpmh_rsc_write_ctrl_data+0x210/0x270 rpmh_flush+0x84/0x24c rpmh_domain_power_off+0x78/0x98 _genpd_power_off+0x40/0xc0 genpd_power_off+0x168/0x208 Later the final merged solution is to use CPU PM notification to invoke rpmh_flush() and power_off() callback of genpd is not implemented in the driver. CPU PM notifiers are run with RCU enabled/watching (see cpu_pm_notify() and how it calls rcu_irq_enter_irqson() before calling the notifiers). Remove this change since RCU will not be idle during CPU PM notifications hence not required to use _rcuidle tracepoint. Using _rcuidle tracepoint prevented rpmh driver to be loadable module as these are not exported symbols. This reverts commit efde2659b0fe835732047357b2902cca14f054d9. Cc: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org> Cc: John Stultz <john.stultz@linaro.org> Cc: Stephen Rothwell <sfr@canb.auug.org.au> Reviewed-by: Stephen Boyd <swboyd@chromium.org> Reviewed-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org> Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org> Signed-off-by: Maulik Shah <mkshah@codeaurora.org> Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/1601877596-32676-2-git-send-email-mkshah@codeaurora.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-10-26soc: qcom: llcc: Support chipsets that can write to llccIsaac J. Manjarres1-4/+28
Older chipsets may not be allowed to configure certain LLCC registers as that is handled by the secure side software. However, this is not the case for newer chipsets and they must configure these registers according to the contents of the SCT table, while keeping in mind that older targets may not have these capabilities. So add support to allow such configuration of registers to enable capacity based allocation and power collapse retention for capable chipsets. Reason for choosing capacity based allocation rather than the default way based allocation is because capacity based allocation allows more finer grain partition and provides more flexibility in configuration. As for the retention through power collapse, it has an advantage where the cache hits are more when we wake up from power collapse although it does burn more power but the exact power numbers are not known at the moment. Signed-off-by: Isaac J. Manjarres <isaacm@codeaurora.org> Reviewed-by: Douglas Anderson <dianders@chromium.org> Reviewed-by: Stephen Boyd <swboyd@chromium.org> [saiprakash.ranjan@codeaurora.org: use existing config and reword commit msg] Signed-off-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org> Link: https://lore.kernel.org/r/dac7e11cf654fc6d75a6b5ca062ab87b01547810.1600151951.git.saiprakash.ranjan@codeaurora.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-10-26soc: qcom: llcc: Move llcc configuration to its own functionSai Prakash Ranjan1-39/+50
Cleanup qcom_llcc_cfg_program() by moving llcc configuration to a separate function of its own. Also correct misspelled 'instance' caught by checkpatch. Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Reviewed-by: Stephen Boyd <swboyd@chromium.org> Suggested-by: Stephen Boyd <swboyd@chromium.org> Signed-off-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org> Link: https://lore.kernel.org/r/51f9ad67333eedf326212dd1b040aade6978e5b1.1600151951.git.saiprakash.ranjan@codeaurora.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
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