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2020-07-20net/atm: remove the atmdev_ops {get, set}sockopt methodsChristoph Hellwig8-122/+0
All implementations of these two methods are dummies that always return -EINVAL. Signed-off-by: Christoph Hellwig <hch@lst.de> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-07-20net: phy: at803x: add mdix configuration support for AR9331 and AR8035Oleksij Rempel1-0/+78
This patch add MDIX configuration ability for AR9331 and AR8035. Theoretically it should work on other Atheros PHYs, but I was able to test only this two. Since I have no certified reference HW able to detect or configure MDIX, this functionality was confirmed by oscilloscope. Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-07-20net: enetc: Use DT protocol information to set up the portsAlex Marginean2-26/+34
Use DT information rather than in-band information from bootloader to set up MAC for XGMII. For RGMII use the DT indication in addition to RGMII defaults in hardware. However, this implies that PHY connection information needs to be extracted before netdevice creation, when the ENETC Port MAC is being configured. Signed-off-by: Alex Marginean <alexandru.marginean@nxp.com> Signed-off-by: Claudiu Manoil <claudiu.manoil@nxp.com> Signed-off-by: Michael Walle <michael@walle.cc> Tested-by: Vladimir Oltean <vladimir.oltean@nxp.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-07-20net: enetc: Initialize SerDes for SGMII and USXGMII protocolsMichael Walle3-0/+140
ENETC has ethernet MACs capable of SGMII, 2500BaseX and USXGMII. But in order to use these protocols some SerDes configurations need to be performed. The SerDes is configurable via an internal PCS PHY which is connected to an internal MDIO bus at address 0. This patch basically removes the dependency on bootloader regarding SerDes initialization. Signed-off-by: Michael Walle <michael@walle.cc> Reviewed-by: Claudiu Manoil <claudiu.manoil@nxp.com> Tested-by: Vladimir Oltean <vladimir.oltean@nxp.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-07-20net: dsa: felix: (re)use already existing constantsMichael Walle1-33/+12
Now that there are USXGMII constants available, drop the old definitions and reuse the generic ones. Signed-off-by: Michael Walle <michael@walle.cc> Tested-by: Vladimir Oltean <vladimir.oltean@nxp.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-07-18ne2k-pci: Use netif_msg_init to initialize msg_enable bitsArmin Wolf1-3/+6
Use netif_msg_enable() to process param settings. Signed-off-by: Armin Wolf <W_Armin@gmx.de> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-07-18net: atlantic: add support for FW 4.xDmitry Bogdanov4-15/+58
This patch adds support for FW 4.x, which is about to get into the production for some products. 4.x is mostly compatible with 3.x, save for soft reset, which requires the acquisition of 2 additional semaphores. Other differences (e.g. absence of PTP support) are handled via capabilities. Note: 4.x targets specific products only. 3.x is still the main firmware branch, which should be used by most users (at least for now). Signed-off-by: Dmitry Bogdanov <dbogdanov@marvell.com> Signed-off-by: Mark Starovoytov <mstarovoitov@marvell.com> Signed-off-by: Igor Russkikh <irusskikh@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-07-18net: atlantic: align return value of ver_match function with function nameMark Starovoytov3-19/+15
This patch aligns the return value of hw_atl_utils_ver_match function with its name. Change the return type to bool, because it's better aligned with the actual usage. Return true when the version matches, false otherwise. Signed-off-by: Mark Starovoytov <mstarovoitov@marvell.com> Signed-off-by: Igor Russkikh <irusskikh@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-07-18net: ethernet: et131x: Remove redundant register readMark Einon1-3/+0
Following the removal of an unused variable assignment (remove unused variable 'pm_csr') the associated register read can also go, as the read also occurs in the subsequent et1310_in_phy_coma() call. Signed-off-by: Mark Einon <mark.einon@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-07-18net: ethernet: et131x: Remove unused variable 'pm_csr'Zhang Changzhong1-7/+3
Gcc report warning as follows: drivers/net/ethernet/agere/et131x.c:953:6: warning: variable 'pm_csr' set but not used [-Wunused-but-set-variable] 953 | u32 pm_csr; | ^~~~~~ drivers/net/ethernet/agere/et131x.c:1002:6:warning: variable 'pm_csr' set but not used [-Wunused-but-set-variable] 1002 | u32 pm_csr; | ^~~~~~ drivers/net/ethernet/agere/et131x.c:3446:8: warning: variable 'pm_csr' set but not used [-Wunused-but-set-variable] 3446 | u32 pm_csr; | ^~~~~~ After commit 38df6492eb51 ("et131x: Add PCIe gigabit ethernet driver et131x to drivers/net"), 'pm_csr' is never used in these functions, so removing it to avoid build warning. Reported-by: Hulk Robot <hulkci@huawei.com> Signed-off-by: Zhang Changzhong <zhangchangzhong@huawei.com> Acked-by: Mark Einon <mark.einon@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-07-18net: bna: Remove unused variable 't'Zhang Changzhong1-2/+1
Gcc report warning as follows: drivers/net/ethernet/brocade/bna/bfa_ioc.c:1538:6: warning: variable 't' set but not used [-Wunused-but-set-variable] 1538 | u32 t; | ^ After commit c107ba171f3d ("bna: Firmware Patch Simplification"), 't' is never used, so removing it to avoid build warning. Reported-by: Hulk Robot <hulkci@huawei.com> Signed-off-by: Zhang Changzhong <zhangchangzhong@huawei.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-07-18net: bnxt: don't complain if TC flower can't be supportedJakub Kicinski2-6/+6
The fact that NETIF_F_HW_TC is not set should be a sufficient indication to the user that TC offloads are not supported. No need to bother users of older firmware versions with pointless warnings on every boot. Also, since the support is optional, bnxt_init_tc() should not return an error in case FW is old, similarly to how error is not returned when CONFIG_BNXT_FLOWER_OFFLOAD is not set. With that we can add an error message to the caller, to warn about actual unexpected failures. Signed-off-by: Jakub Kicinski <kuba@kernel.org> Reviewed-by: Michael Chan <michael.chan@broadcom.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-07-17Merge tag 'mlx5-updates-2020-07-16' of ↵David S. Miller36-205/+1453
git://git.kernel.org/pub/scm/linux/kernel/git/saeed/linux Saeed Mahameed says: ==================== mlx5-updates-2020-07-16 Fixes: 1) Fix build break when CONFIG_XPS is not set 2) Fix missing switch_id for representors Updates: 1) IPsec XFRM RX offloads from Raed and Huy. - Added IPSec RX steering flow tables to NIC RX - Refactoring of the existing FPGA IPSec, to add support for ConnectX IPsec. - RX data path handling for IPSec traffic - Synchronize offloading device ESN with xfrm received SN 2) Parav allows E-Switch to siwtch to switchdev mode directly without the need to go through legacy mode first. 3) From Tariq, Misc updates including: 3.1) indirect calls for RX and XDP handlers 3.2) Make MLX5_EN_TLS non-prompt as it should always be enabled when TLS and MLX5_EN are selected. ==================== Signed-off-by: David S. Miller <davem@davemloft.net>
2020-07-17net: alteon: Avoid some useless memsetChristophe JAILLET1-4/+1
Avoid a memset after a call to 'dma_alloc_coherent()'. This is useless since commit 518a2f1925c3 ("dma-mapping: zero memory returned from dma_alloc_*") Replace a kmalloc+memset with a corresponding kzalloc. Signed-off-by: Christophe JAILLET <christophe.jaillet@wanadoo.fr> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-07-17net: alteon: switch from 'pci_' to 'dma_' APIChristophe JAILLET1-58/+56
The wrappers in include/linux/pci-dma-compat.h should go away. The patch has been generated with the coccinelle script below and has been hand modified to replace GFP_ with a correct flag. It has been compile tested. When memory is allocated in 'ace_allocate_descriptors()' and 'ace_init()' GFP_KERNEL can be used because both functions are called from the probe function and no lock is acquired. @@ @@ - PCI_DMA_BIDIRECTIONAL + DMA_BIDIRECTIONAL @@ @@ - PCI_DMA_TODEVICE + DMA_TO_DEVICE @@ @@ - PCI_DMA_FROMDEVICE + DMA_FROM_DEVICE @@ @@ - PCI_DMA_NONE + DMA_NONE @@ expression e1, e2, e3; @@ - pci_alloc_consistent(e1, e2, e3) + dma_alloc_coherent(&e1->dev, e2, e3, GFP_) @@ expression e1, e2, e3; @@ - pci_zalloc_consistent(e1, e2, e3) + dma_alloc_coherent(&e1->dev, e2, e3, GFP_) @@ expression e1, e2, e3, e4; @@ - pci_free_consistent(e1, e2, e3, e4) + dma_free_coherent(&e1->dev, e2, e3, e4) @@ expression e1, e2, e3, e4; @@ - pci_map_single(e1, e2, e3, e4) + dma_map_single(&e1->dev, e2, e3, e4) @@ expression e1, e2, e3, e4; @@ - pci_unmap_single(e1, e2, e3, e4) + dma_unmap_single(&e1->dev, e2, e3, e4) @@ expression e1, e2, e3, e4, e5; @@ - pci_map_page(e1, e2, e3, e4, e5) + dma_map_page(&e1->dev, e2, e3, e4, e5) @@ expression e1, e2, e3, e4; @@ - pci_unmap_page(e1, e2, e3, e4) + dma_unmap_page(&e1->dev, e2, e3, e4) @@ expression e1, e2, e3, e4; @@ - pci_map_sg(e1, e2, e3, e4) + dma_map_sg(&e1->dev, e2, e3, e4) @@ expression e1, e2, e3, e4; @@ - pci_unmap_sg(e1, e2, e3, e4) + dma_unmap_sg(&e1->dev, e2, e3, e4) @@ expression e1, e2, e3, e4; @@ - pci_dma_sync_single_for_cpu(e1, e2, e3, e4) + dma_sync_single_for_cpu(&e1->dev, e2, e3, e4) @@ expression e1, e2, e3, e4; @@ - pci_dma_sync_single_for_device(e1, e2, e3, e4) + dma_sync_single_for_device(&e1->dev, e2, e3, e4) @@ expression e1, e2, e3, e4; @@ - pci_dma_sync_sg_for_cpu(e1, e2, e3, e4) + dma_sync_sg_for_cpu(&e1->dev, e2, e3, e4) @@ expression e1, e2, e3, e4; @@ - pci_dma_sync_sg_for_device(e1, e2, e3, e4) + dma_sync_sg_for_device(&e1->dev, e2, e3, e4) @@ expression e1, e2; @@ - pci_dma_mapping_error(e1, e2) + dma_mapping_error(&e1->dev, e2) @@ expression e1, e2; @@ - pci_set_dma_mask(e1, e2) + dma_set_mask(&e1->dev, e2) @@ expression e1, e2; @@ - pci_set_consistent_dma_mask(e1, e2) + dma_set_coherent_mask(&e1->dev, e2) Signed-off-by: Christophe JAILLET <christophe.jaillet@wanadoo.fr> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-07-17net: sungem: switch from 'pci_' to 'dma_' APIChristophe JAILLET1-26/+27
The wrappers in include/linux/pci-dma-compat.h should go away. The patch has been generated with the coccinelle script below and has been hand modified to replace GFP_ with a correct flag. It has been compile tested. When memory is allocated in 'gem_init_one()', GFP_KERNEL can be used because it is a probe function and no lock is acquired. @@ @@ - PCI_DMA_BIDIRECTIONAL + DMA_BIDIRECTIONAL @@ @@ - PCI_DMA_TODEVICE + DMA_TO_DEVICE @@ @@ - PCI_DMA_FROMDEVICE + DMA_FROM_DEVICE @@ @@ - PCI_DMA_NONE + DMA_NONE @@ expression e1, e2, e3; @@ - pci_alloc_consistent(e1, e2, e3) + dma_alloc_coherent(&e1->dev, e2, e3, GFP_) @@ expression e1, e2, e3; @@ - pci_zalloc_consistent(e1, e2, e3) + dma_alloc_coherent(&e1->dev, e2, e3, GFP_) @@ expression e1, e2, e3, e4; @@ - pci_free_consistent(e1, e2, e3, e4) + dma_free_coherent(&e1->dev, e2, e3, e4) @@ expression e1, e2, e3, e4; @@ - pci_map_single(e1, e2, e3, e4) + dma_map_single(&e1->dev, e2, e3, e4) @@ expression e1, e2, e3, e4; @@ - pci_unmap_single(e1, e2, e3, e4) + dma_unmap_single(&e1->dev, e2, e3, e4) @@ expression e1, e2, e3, e4, e5; @@ - pci_map_page(e1, e2, e3, e4, e5) + dma_map_page(&e1->dev, e2, e3, e4, e5) @@ expression e1, e2, e3, e4; @@ - pci_unmap_page(e1, e2, e3, e4) + dma_unmap_page(&e1->dev, e2, e3, e4) @@ expression e1, e2, e3, e4; @@ - pci_map_sg(e1, e2, e3, e4) + dma_map_sg(&e1->dev, e2, e3, e4) @@ expression e1, e2, e3, e4; @@ - pci_unmap_sg(e1, e2, e3, e4) + dma_unmap_sg(&e1->dev, e2, e3, e4) @@ expression e1, e2, e3, e4; @@ - pci_dma_sync_single_for_cpu(e1, e2, e3, e4) + dma_sync_single_for_cpu(&e1->dev, e2, e3, e4) @@ expression e1, e2, e3, e4; @@ - pci_dma_sync_single_for_device(e1, e2, e3, e4) + dma_sync_single_for_device(&e1->dev, e2, e3, e4) @@ expression e1, e2, e3, e4; @@ - pci_dma_sync_sg_for_cpu(e1, e2, e3, e4) + dma_sync_sg_for_cpu(&e1->dev, e2, e3, e4) @@ expression e1, e2, e3, e4; @@ - pci_dma_sync_sg_for_device(e1, e2, e3, e4) + dma_sync_sg_for_device(&e1->dev, e2, e3, e4) @@ expression e1, e2; @@ - pci_dma_mapping_error(e1, e2) + dma_mapping_error(&e1->dev, e2) @@ expression e1, e2; @@ - pci_set_dma_mask(e1, e2) + dma_set_mask(&e1->dev, e2) @@ expression e1, e2; @@ - pci_set_consistent_dma_mask(e1, e2) + dma_set_coherent_mask(&e1->dev, e2) Signed-off-by: Christophe JAILLET <christophe.jaillet@wanadoo.fr> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-07-17net: sun: cassini: switch from 'pci_' to 'dma_' APIChristophe JAILLET1-50/+54
The wrappers in include/linux/pci-dma-compat.h should go away. The patch has been generated with the coccinelle script below and has been hand modified to replace GFP_ with a correct flag. It has been compile tested. When memory is allocated in 'cas_tx_tiny_alloc()', GFP_KERNEL can be used because a few lines below in its only caller, 'cas_alloc_rxds()', is also called. This function makes an explicit use of GFP_KERNEL. When memory is allocated in 'cas_init_one()', GFP_KERNEL can be used because it is a probe function and no lock is acquired. @@ @@ - PCI_DMA_BIDIRECTIONAL + DMA_BIDIRECTIONAL @@ @@ - PCI_DMA_TODEVICE + DMA_TO_DEVICE @@ @@ - PCI_DMA_FROMDEVICE + DMA_FROM_DEVICE @@ @@ - PCI_DMA_NONE + DMA_NONE @@ expression e1, e2, e3; @@ - pci_alloc_consistent(e1, e2, e3) + dma_alloc_coherent(&e1->dev, e2, e3, GFP_) @@ expression e1, e2, e3; @@ - pci_zalloc_consistent(e1, e2, e3) + dma_alloc_coherent(&e1->dev, e2, e3, GFP_) @@ expression e1, e2, e3, e4; @@ - pci_free_consistent(e1, e2, e3, e4) + dma_free_coherent(&e1->dev, e2, e3, e4) @@ expression e1, e2, e3, e4; @@ - pci_map_single(e1, e2, e3, e4) + dma_map_single(&e1->dev, e2, e3, e4) @@ expression e1, e2, e3, e4; @@ - pci_unmap_single(e1, e2, e3, e4) + dma_unmap_single(&e1->dev, e2, e3, e4) @@ expression e1, e2, e3, e4, e5; @@ - pci_map_page(e1, e2, e3, e4, e5) + dma_map_page(&e1->dev, e2, e3, e4, e5) @@ expression e1, e2, e3, e4; @@ - pci_unmap_page(e1, e2, e3, e4) + dma_unmap_page(&e1->dev, e2, e3, e4) @@ expression e1, e2, e3, e4; @@ - pci_map_sg(e1, e2, e3, e4) + dma_map_sg(&e1->dev, e2, e3, e4) @@ expression e1, e2, e3, e4; @@ - pci_unmap_sg(e1, e2, e3, e4) + dma_unmap_sg(&e1->dev, e2, e3, e4) @@ expression e1, e2, e3, e4; @@ - pci_dma_sync_single_for_cpu(e1, e2, e3, e4) + dma_sync_single_for_cpu(&e1->dev, e2, e3, e4) @@ expression e1, e2, e3, e4; @@ - pci_dma_sync_single_for_device(e1, e2, e3, e4) + dma_sync_single_for_device(&e1->dev, e2, e3, e4) @@ expression e1, e2, e3, e4; @@ - pci_dma_sync_sg_for_cpu(e1, e2, e3, e4) + dma_sync_sg_for_cpu(&e1->dev, e2, e3, e4) @@ expression e1, e2, e3, e4; @@ - pci_dma_sync_sg_for_device(e1, e2, e3, e4) + dma_sync_sg_for_device(&e1->dev, e2, e3, e4) @@ expression e1, e2; @@ - pci_dma_mapping_error(e1, e2) + dma_mapping_error(&e1->dev, e2) @@ expression e1, e2; @@ - pci_set_dma_mask(e1, e2) + dma_set_mask(&e1->dev, e2) @@ expression e1, e2; @@ - pci_set_consistent_dma_mask(e1, e2) + dma_set_coherent_mask(&e1->dev, e2) Signed-off-by: Christophe JAILLET <christophe.jaillet@wanadoo.fr> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-07-17net: cdc_ncm: hook into set_rx_mode to admit multicast trafficMiguel Rodríguez Pérez1-0/+3
We set set_rx_mode to usbnet_cdc_update_filter provided by cdc_ether that simply admits all multicast traffic if there is more than one multicast filter configured. Signed-off-by: Miguel Rodríguez Pérez <miguel@det.uvigo.gal> Signed-off-by: Bjørn Mork <bjorn@mork.no> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-07-17net: cdc_ncm: add .ndo_set_rx_mode to cdc_ncm_netdev_opsMiguel Rodríguez Pérez1-0/+1
The cdc_ncm driver overrides the net_device_ops structure used by usbnet to be able to hook into .ndo_change_mtu. However, the structure was missing the .ndo_set_rx_mode field, preventing the driver from hooking into usbnet's set_rx_mode. This patch adds the missing callback to usbnet_set_rx_mode in net_device_ops. Signed-off-by: Miguel Rodríguez Pérez <miguel@det.uvigo.gal> Signed-off-by: Bjørn Mork <bjorn@mork.no> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-07-17net: usbnet: export usbnet_set_rx_mode()Bjørn Mork1-1/+2
This function can be reused by other usbnet minidrivers. Signed-off-by: Bjørn Mork <bjorn@mork.no> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-07-17net: cdc_ether: export usbnet_cdc_update_filterMiguel Rodríguez Pérez1-1/+2
This makes the function available to other drivers, like cdc_ncm. Signed-off-by: Miguel Rodríguez Pérez <miguel@det.uvigo.gal> Acked-by: Oliver Neukum <oneukum@suse.com> Signed-off-by: Bjørn Mork <bjorn@mork.no> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-07-17net: cdc_ether: use dev->intf to get interface informationMiguel Rodríguez Pérez1-3/+1
usbnet_cdc_update_filter was getting the interface number from the usb_interface struct in cdc_state->control. However, cdc_ncm does not initialize that structure in its bind function, but uses cdc_ncm_ctx instead. Getting intf directly from struct usbnet solves the problem. Signed-off-by: Miguel Rodríguez Pérez <miguel@det.uvigo.gal> Signed-off-by: Bjørn Mork <bjorn@mork.no> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-07-17net: phy: sfp: Cotsworks SFF module EEPROM fixupChris Healy1-0/+44
Some Cotsworks SFF have invalid data in the first few bytes of the module EEPROM. This results in these modules not being detected as valid modules. Address this by poking the correct EEPROM values into the module EEPROM when the model/PN match and the existing module EEPROM contents are not correct. Signed-off-by: Chris Healy <cphealy@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-07-17net: phy: continue searching for C45 MMDs even if first returned ffff:ffffVladimir Oltean1-1/+2
At the time of introduction, in commit bdeced75b13f ("net: dsa: felix: Add PCS operations for PHYLINK"), support for the Lynx PCS inside Felix was relying, for USXGMII support, on the fact that get_phy_device() is able to parse the Lynx PCS "device-in-package" registers for this C45 MDIO device and identify it correctly. However, this was actually working somewhat by mistake (in the sense that, even though it was detected, it was detected for the wrong reasons). The get_phy_c45_ids() function works by iterating through all MMDs starting from 1 (MDIO_MMD_PMAPMD) and stops at the first one which returns a non-zero value in the "device-in-package" register pair, proceeding to see what that non-zero value is. For the Felix PCS, the first MMD (1, for the PMA/PMD) returns a non-zero value of 0xffffffff in the "device-in-package" registers. There is a code branch which is supposed to treat this case and flag it as wrong, and normally, this would have caught my attention when adding initial support for this PCS: if ((devs_in_pkg & 0x1fffffff) == 0x1fffffff) { /* If mostly Fs, there is no device there, then let's probe * MMD 0, as some 10G PHYs have zero Devices In package, * e.g. Cortina CS4315/CS4340 PHY. */ However, this code never actually kicked in, it seems, because this snippet from get_phy_c45_devs_in_pkg() was basically sabotaging itself, by returning 0xfffffffe instead of 0xffffffff: /* Bit 0 doesn't represent a device, it indicates c22 regs presence */ *devices_in_package &= ~BIT(0); Then the rest of the code just carried on thinking "ok, MMD 1 (PMA/PMD) says that there are 31 devices in that package, each having a device id of ffff:ffff, that's perfectly fine, let's go ahead and probe this PHY device". But after cleanup commit 320ed3bf9000 ("net: phy: split devices_in_package"), this got "fixed", and now devs_in_pkg is no longer 0xfffffffe, but 0xffffffff. So now, get_phy_device is returning -ENODEV for the Lynx PCS, because the semantics have remained mostly unchanged: the loop stops at the first MMD that returns a non-zero value, and that is MMD 1. But the Lynx PCS is simply a clause 37 PCS which implements the required MAC-side functionality for USXGMII (when operated in C45 mode, which is where C45 devices-in-package detection is relevant to). Of course it will fail the PMD/PMA test (MMD 1), since it is not a PHY. But it does implement detection for MDIO_MMD_PCS (3): - MDIO_DEVS1=0x008a, MDIO_DEVS2=0x0000, - MDIO_DEVID1=0x0083, MDIO_DEVID2=0xe400 Let get_phy_c45_ids() continue searching for valid MMDs, and don't assume that every phy_device has a PMA/PMD MMD implemented. Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-07-17net/mlx5e: CT: Map 128 bits labels to 32 bit map IDEli Britstein3-23/+42
The 128 bits ct_label field is matched using a 32 bit hardware register. As such, only the lower 32 bits of ct_label field are offloaded. Change this logic to support setting and matching higher bits too. Map the 128 bits data to a unique 32 bits ID. Matching is done as exact match of the mapping ID of key & mask. Signed-off-by: Eli Britstein <elibr@mellanox.com> Reviewed-by: Oz Shlomo <ozsh@mellanox.com> Reviewed-by: Roi Dayan <roid@mellanox.com> Reviewed-by: Maor Dickman <maord@mellanox.com> Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
2020-07-17net/mlx5e: Do not request completion on every single UMR WQETariq Toukan1-1/+0
UMR WQEs are posted in bulks, and HW is notified once per a bulk. Reduce the number of completions by requesting such only for the last WQE of the bulk. Signed-off-by: Tariq Toukan <tariqt@mellanox.com> Reviewed-by: Maxim Mikityanskiy <maximmi@mellanox.com> Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
2020-07-17net/mlx5e: RX, Avoid indirect call in representor CQE handlingTariq Toukan1-1/+4
Use INDIRECT_CALL_2() helper to avoid the cost of the indirect call when/if CONFIG_RETPOLINE=y. Signed-off-by: Tariq Toukan <tariqt@mellanox.com> Reviewed-by: Maxim Mikityanskiy <maximmi@mellanox.com> Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
2020-07-17net/mlx5e: XDP, Avoid indirect call in TX flowTariq Toukan3-14/+37
Use INDIRECT_CALL_2() helper to avoid the cost of the indirect call when/if CONFIG_RETPOLINE=y. Signed-off-by: Tariq Toukan <tariqt@mellanox.com> Reviewed-by: Maxim Mikityanskiy <maximmi@mellanox.com> Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
2020-07-17net/mlx5e: IPsec: Add Connect-X IPsec ESN update offload supportRaed Salem1-0/+88
Synchronize offloading device ESN with xfrm received SN by updating an existing IPsec HW context with the new SN. Signed-off-by: Raed Salem <raeds@mellanox.com> Reviewed-by: Boris Pismenny <borisp@mellanox.com> Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
2020-07-17net/mlx5e: IPsec: Add Connect-X IPsec Rx data path offloadRaed Salem4-4/+88
On receive flow inspect received packets for IPsec offload indication using the cqe, for IPsec offloaded packets propagate offload status and stack handle to stack for further processing. Supported statuses: - Offload ok. - Authentication failure. - Bad trailer indication. Connect-X IPsec does not use mlx5e_ipsec_handle_rx_cqe. For RX only offload, we see the BW gain. Below is the iperf3 performance report on two server of 24 cores Intel(R) Xeon(R) CPU E5-2620 v3 @ 2.40GHz with ConnectX6-DX. We use one thread per IPsec tunnel. --------------------------------------------------------------------- Mode | Num tunnel | BW | Send CPU util | Recv CPU util | | (Gbps) | (Average %) | (Average %) --------------------------------------------------------------------- Cryto offload | 1 | 4.6 | 4.2 | 14.5 --------------------------------------------------------------------- Cryto offload | 24 | 38 | 73 | 63 --------------------------------------------------------------------- Non-offload | 1 | 4 | 4 | 13 --------------------------------------------------------------------- Non-offload | 24 | 23 | 52 | 67 Signed-off-by: Raed Salem <raeds@mellanox.com> Reviewed-by: Boris Pismenny <borisp@mellanox.com> Reviewed-by: Tariq Toukan <tariqt@mellanox.com> Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
2020-07-17net/mlx5e: IPsec: Add IPsec steering in local NIC RXHuy Nguyen9-5/+630
Introduce decrypt FT, the RX error FT and the default rules. The IPsec RX decrypt flow table is pointed by the TTC (Traffic Type Classifier) ESP steering rules. The decrypt flow table has two flow groups. The first flow group keeps the decrypt steering rule programmed via the "ip xfrm s" interface. The second flow group has a default rule to forward all non-offloaded ESP packet to the TTC ESP default RSS TIR. The RX error flow table is the destination of the decrypt steering rules in the IPsec RX decrypt flow table. It has a fixed rule with single copy action that copies ipsec_syndrome to metadata_regB[0:6]. The IPsec syndrome is used to filter out non-ipsec packet and to return the IPsec crypto offload status in Rx flow. The destination of RX error flow table is the TTC ESP default RSS TIR. All the FTs (decrypt FT and error FT) are created only when IPsec SAs are added. If there is no IPsec SAs, the FTs are removed. Signed-off-by: Huy Nguyen <huyn@mellanox.com> Reviewed-by: Boris Pismenny <borisp@mellanox.com> Reviewed-by: Tariq Toukan <tariqt@mellanox.com> Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
2020-07-17net/mlx5: IPsec: Add HW crypto offload supportRaed Salem10-9/+372
This patch adds support for Connect-X IPsec crypto offload by implementing the IPsec acceleration layer needed routines, which delegates IPsec offloads to Connect-X routines. In Connect-X IPsec, a Security Association (SA) is added or deleted via allocating a HW context of an encryption/decryption key and a HW context of a matching SA (IPsec object). The Security Policy (SP) is added or deleted by creating matching Tx/Rx steering rules whith an action of encryption/decryption respectively, executed using the previously allocated SA HW context. When new xfrm state (SA) is added: - Use a separate crypto key HW context. - Create a separate IPsec context in HW to inlcude the SA properties: - aes-gcm salt. - ICV properties (ICV length, implicit IV). - on supported devices also update ESN. - associate the allocated crypto key with this IPsec context. Introduce a new compilation flag MLX5_IPSEC for it. Downstream patches will implement the Rx,Tx steering and will add the update esn. Signed-off-by: Raed Salem <raeds@mellanox.com> Signed-off-by: Huy Nguyen <huyn@mellanox.com> Reviewed-by: Tariq Toukan <tariqt@mellanox.com> Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
2020-07-17net/mlx5: Accel, Add core IPsec support for the Connect-X familyRaed Salem6-101/+148
This to set the base for downstream patches to support the new IPsec implementation of the Connect-X family. Following modifications made: - Remove accel layer dependency from MLX5_FPGA_IPSEC. - Introduce accel_ipsec_ops, each IPsec device will have to support these ops. Signed-off-by: Raed Salem <raeds@mellanox.com> Reviewed-by: Tariq Toukan <tariqt@mellanox.com> Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
2020-07-17net/mlx5: E-switch, Reduce dependency on num_vfs during mode setParav Pandit2-14/+13
Currently only ECPF allows enabling eswitch when SR-IOV is disabled. Enable PF also to enable eswitch when SR-IOV is disabled. Load VF vports when eswitch is already enabled. Signed-off-by: Parav Pandit <parav@mellanox.com> Reviewed-by: Roi Dayan <roid@mellanox.com> Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
2020-07-17net/mlx5: E-switch, Avoid function change handler for non ECPFParav Pandit1-9/+2
for non ECPF eswitch manager function, vports are already enabled/disabled when eswitch is enabled/disabled respectively. Simplify function change handler for such eswitch manager function. Therefore, ECPF is the only one which remains PF/VF function change handler. Signed-off-by: Parav Pandit <parav@mellanox.com> Reviewed-by: Roi Dayan <roid@mellanox.com> Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
2020-07-17net/mlx5: Make MLX5_EN_TLS non-promptTariq Toukan1-6/+7
TLS runs only over Eth, and the Eth driver is the only user of the core TLS functionality. There is no meaning of having the core functionality without the usage in Eth driver. Hence, let both TLS core implementations depend on MLX5_CORE_EN, and select MLX5_EN_TLS. Signed-off-by: Tariq Toukan <tariqt@mellanox.com> Reviewed-by: Raed Salem <raeds@mellanox.com> Reviewed-by: Boris Pismenny <borisp@mellanox.com> Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
2020-07-17net/mlx5e: Fix build break when CONFIG_XPS is not setSaeed Mahameed2-11/+11
mlx5e_accel_sk_get_rxq is only used in ktls_rx.c file which already depends on XPS to be compiled, move it from the generic en_accel.h header to be local in ktls_rx.c, to fix the below build break In file included from ../drivers/net/ethernet/mellanox/mlx5/core/en_main.c:49:0: ../drivers/net/ethernet/mellanox/mlx5/core/en_accel/en_accel.h: In function ‘mlx5e_accel_sk_get_rxq’: ../drivers/net/ethernet/mellanox/mlx5/core/en_accel/en_accel.h:153:12: error: implicit declaration of function ‘sk_rx_queue_get’ ... int rxq = sk_rx_queue_get(sk); ^~~~~~~~~~~~~~~ Fixes: 1182f3659357 ("net/mlx5e: kTLS, Add kTLS RX HW offload support") Signed-off-by: Saeed Mahameed <saeedm@mellanox.com> Reported-by: Randy Dunlap <rdunlap@infradead.org>
2020-07-17net/mlx5e: Fix missing switch_id for representorsParav Pandit1-8/+12
Cited commit in fixes tag missed to set the switch id of the PF and VF ports. Due to this flow cannot be offloaded, a simple command like below fails to offload with below error. tc filter add dev ens2f0np0 parent ffff: prio 1 flower \ dst_mac 00:00:00:00:00:00/00:00:00:00:00:00 skip_sw \ action mirred egress redirect dev ens2f0np0pf0vf0 Error: mlx5_core: devices are not on same switch HW, can't offload forwarding. Hence, fix it by setting switch id for each PF and VF representors port as before the cited commit. Fixes: 71ad8d55f8e5 ("devlink: Replace devlink_port_attrs_set parameters with a struct") Signed-off-by: Parav Pandit <parav@mellanox.com> Reviewed-by: Roi Dayan <roid@mellanox.com>
2020-07-16net: mscc: ocelot: rethink Kconfig dependencies againVladimir Oltean2-5/+4
Having the users of MSCC_OCELOT_SWITCH_LIB depend on REGMAP_MMIO was a bad idea, since that symbol is not user-selectable. So we should have kept a 'select REGMAP_MMIO'. When we do that, we run into 2 more problems: - By depending on GENERIC_PHY, we are causing a recursive dependency. But it looks like GENERIC_PHY has no other dependencies, and other drivers select it, so we can select it too: drivers/of/Kconfig:69:error: recursive dependency detected! drivers/of/Kconfig:69: symbol OF_IRQ depends on IRQ_DOMAIN kernel/irq/Kconfig:68: symbol IRQ_DOMAIN is selected by REGMAP drivers/base/regmap/Kconfig:7: symbol REGMAP default is visible depending on REGMAP_MMIO drivers/base/regmap/Kconfig:39: symbol REGMAP_MMIO is selected by MSCC_OCELOT_SWITCH_LIB drivers/net/ethernet/mscc/Kconfig:15: symbol MSCC_OCELOT_SWITCH_LIB is selected by MSCC_OCELOT_SWITCH drivers/net/ethernet/mscc/Kconfig:22: symbol MSCC_OCELOT_SWITCH depends on GENERIC_PHY drivers/phy/Kconfig:8: symbol GENERIC_PHY is selected by PHY_BCM_NS_USB3 drivers/phy/broadcom/Kconfig:41: symbol PHY_BCM_NS_USB3 depends on MDIO_BUS drivers/net/phy/Kconfig:13: symbol MDIO_BUS depends on MDIO_DEVICE drivers/net/phy/Kconfig:6: symbol MDIO_DEVICE is selected by PHYLIB drivers/net/phy/Kconfig:254: symbol PHYLIB is selected by ARC_EMAC_CORE drivers/net/ethernet/arc/Kconfig:19: symbol ARC_EMAC_CORE is selected by ARC_EMAC drivers/net/ethernet/arc/Kconfig:25: symbol ARC_EMAC depends on OF_IRQ - By depending on PHYLIB, we are causing a recursive dependency. PHYLIB only has a single dependency, "depends on NETDEVICES", which we are already depending on, so we can again hack our way into conformance by turning the PHYLIB dependency into a select. drivers/of/Kconfig:69:error: recursive dependency detected! drivers/of/Kconfig:69: symbol OF_IRQ depends on IRQ_DOMAIN kernel/irq/Kconfig:68: symbol IRQ_DOMAIN is selected by REGMAP drivers/base/regmap/Kconfig:7: symbol REGMAP default is visible depending on REGMAP_MMIO drivers/base/regmap/Kconfig:39: symbol REGMAP_MMIO is selected by MSCC_OCELOT_SWITCH_LIB drivers/net/ethernet/mscc/Kconfig:15: symbol MSCC_OCELOT_SWITCH_LIB is selected by MSCC_OCELOT_SWITCH drivers/net/ethernet/mscc/Kconfig:22: symbol MSCC_OCELOT_SWITCH depends on PHYLIB drivers/net/phy/Kconfig:254: symbol PHYLIB is selected by ARC_EMAC_CORE drivers/net/ethernet/arc/Kconfig:19: symbol ARC_EMAC_CORE is selected by ARC_EMAC drivers/net/ethernet/arc/Kconfig:25: symbol ARC_EMAC depends on OF_IRQ Fixes: f4d0323bae4e ("net: mscc: ocelot: convert MSCC_OCELOT_SWITCH into a library") Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com> Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2020-07-16net: fec: replace snprintf() with strlcpy() in fec_ptp_init()Sergey Organov1-1/+1
No need to use snprintf() on a constant string, nor using magic constant in the fixed code was a good idea. Signed-off-by: Sergey Organov <sorganov@gmail.com> Acked-by: Fugang Duan <fugang.duan@nxp.com> Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2020-07-16net: fec: get rid of redundant code in fec_ptp_set()Sergey Organov1-3/+1
Code of the form "if(x) x = 0" replaced with "x = 0". Code of the form "if(x == a) x = a" removed. Signed-off-by: Sergey Organov <sorganov@gmail.com> Acked-by: Fugang Duan <fugang.duan@nxp.com> Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2020-07-16net: fec: initialize clock with 0 rather than current kernel timeSergey Organov1-1/+1
Initializing with 0 makes it much easier to identify time stamps from otherwise uninitialized clock. Initialization of PTP clock with current kernel time makes little sense as PTP time scale differs from UTC time scale that kernel time represents. It only leads to confusion when no actual PTP initialization happens, as these time scales differ in a small integer number of seconds (37 at the time of writing.) Signed-off-by: Sergey Organov <sorganov@gmail.com> Acked-by: Fugang Duan <fugang.duan@nxp.com> Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2020-07-16net: fec: enable to use PPS feature without time stampingSergey Organov1-5/+0
PPS feature could be useful even when hardware time stamping of network packets is not in use, so remove offending check for this condition from fec_ptp_enable_pps(). Signed-off-by: Sergey Organov <sorganov@gmail.com> Acked-by: Fugang Duan <fugang.duan@nxp.com> Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2020-07-16drivers: net: wan: Fix trivial spellingKieran Bingham1-1/+1
The word 'descriptor' is misspelled throughout the tree. Fix it up accordingly: decriptor -> descriptor Signed-off-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com> Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2020-07-16mlxsw: spectrum_acl: Offload FLOW_ACTION_POLICEIdo Schimmel4-5/+96
Offload action police when used with a flower classifier. The number of dropped packets is read from the policer and reported to tc. Signed-off-by: Ido Schimmel <idosch@mellanox.com> Reviewed-by: Jiri Pirko <jiri@mellanox.com> Reviewed-by: Petr Machata <petrm@mellanox.com> Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2020-07-16mlxsw: core_acl_flex_actions: Add police actionIdo Schimmel2-0/+225
Add core functionality required to support police action in the policy engine. The utilized hardware policers are stored in a hash table keyed by the flow action index. This allows to support policer sharing between multiple ACL rules. Signed-off-by: Ido Schimmel <idosch@mellanox.com> Reviewed-by: Jiri Pirko <jiri@mellanox.com> Reviewed-by: Petr Machata <petrm@mellanox.com> Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2020-07-16mlxsw: core_acl_flex_actions: Work around hardware limitationIdo Schimmel1-16/+71
In the policy engine, each ACL rule points to an action block where the ACL actions are stored. Each action block consists of one or more action sets. Each action set holds one or more individual actions, up to a maximum queried from the device. For example: Action set #1 Action set #2 +----------+ +--------------+ +--------------+ | ACL rule +----------> Action #1 | +-----> Action #4 | +----------+ +--------------+ | +--------------+ | Action #2 | | | Action #5 | +--------------+ | +--------------+ | Action #3 +------+ | | +--------------+ +--------------+ <---------+ Action block +-----------------> The hardware has a limitation that prevents a policing action (MLXSW_AFA_POLCNT_CODE when used with a policer, not a counter) from being configured in the same action set with a trap action (i.e., MLXSW_AFA_TRAP_CODE or MLXSW_AFA_TRAPWU_CODE). Note that the latter used to implement multiple actions: 'trap', 'mirred', 'drop'. Work around this limitation by teaching mlxsw_afa_block_append_action() to create a new action set not only when there is no more room left in the current set, but also when there is a conflict between previously mentioned actions. Signed-off-by: Ido Schimmel <idosch@mellanox.com> Reviewed-by: Jiri Pirko <jiri@mellanox.com> Reviewed-by: Petr Machata <petrm@mellanox.com> Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2020-07-16mlxsw: spectrum_policer: Add devlink resource supportIdo Schimmel3-0/+76
Expose via devlink-resource the maximum number of single-rate policers and their current occupancy. Example: $ devlink resource show pci/0000:01:00.0 ... name global_policers size 1000 unit entry dpipe_tables none resources: name single_rate_policers size 968 occ 0 unit entry dpipe_tables none Signed-off-by: Ido Schimmel <idosch@mellanox.com> Reviewed-by: Jiri Pirko <jiri@mellanox.com> Reviewed-by: Petr Machata <petrm@mellanox.com> Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2020-07-16mlxsw: spectrum_policer: Add policer coreIdo Schimmel4-1/+448
Add common code to handle all policer-related functionality in mlxsw. Currently, only policer for policy engines are supported, but it in the future more policer families will be added such as CPU (trap) policers and storm control policers. The API allows different modules to add / delete policers and read their drop counter. Signed-off-by: Ido Schimmel <idosch@mellanox.com> Reviewed-by: Jiri Pirko <jiri@mellanox.com> Reviewed-by: Petr Machata <petrm@mellanox.com> Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2020-07-16mlxsw: resources: Add resource identifier for global policersIdo Schimmel1-0/+2
Add a resource identifier for maximum global policers so that it could be later used to query the information from firmware. Signed-off-by: Ido Schimmel <idosch@mellanox.com> Reviewed-by: Jiri Pirko <jiri@mellanox.com> Reviewed-by: Petr Machata <petrm@mellanox.com> Signed-off-by: Jakub Kicinski <kuba@kernel.org>
generated by cgit v1.2.3 (git 2.39.0) at 2024-08-19 14:37:33 +0300