starfive-tech/linux.git - StarFive Tech Linux Kernel for VisionFive (JH7110) boards (mirror)

Age	Commit message (Collapse)	Author	Files	Lines
2023-05-16	dt-bindings: tegra: Add ICC IDs for dummy memory clients	Sumit Gupta	1	-0/+5
	Add ICC IDs for dummy software clients representing CCPLEX clusters. Signed-off-by: Sumit Gupta <sumitg@nvidia.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Thierry Reding <treding@nvidia.com>
2022-11-21	dt-bindings: tegra: Update headers for Tegra234	Jon Hunter	1	-23/+416
	Update the device-tree clock, memory, power and reset headers for Tegra234 by adding the definitions for all the various devices. Signed-off-by: Jon Hunter <jonathanh@nvidia.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Thierry Reding <treding@nvidia.com>
2022-10-24	dt-bindings: Add headers for NVDEC on Tegra234	Mikko Perttunen	1	-0/+3
	Add clock, memory controller, powergate and reset dt-binding headers necessary for NVDEC. Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Thierry Reding <treding@nvidia.com>
2022-09-15	dt-bindings: Add Host1x context stream IDs on Tegra234	Mikko Perttunen	1	-0/+10
	Add defines for stream IDs used for Host1x context isolation on Tegra234. The same stream IDs are used for both NISO0 and NISO1 SMMUs since Host1x's stream ID protection tables don't make a distinction between the two. Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Thierry Reding <treding@nvidia.com>
2022-07-08	dt-bindings: Add headers for Host1x and VIC on Tegra234	Mikko Perttunen	1	-0/+5
	Add clock, memory controller, powergate and reset dt-binding headers for Host1x and VIC on Tegra234. Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Thierry Reding <treding@nvidia.com>
2022-07-08	dt-bindings: memory: Add Tegra234 MGBE memory clients	Thierry Reding	1	-0/+20
	Add the memory client and stream ID definitions for the MGBE hardware found on Tegra234 SoCs. Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Bhadram Varka <vbhadram@nvidia.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Thierry Reding <treding@nvidia.com>
2022-06-08	dt-bindings: Add headers for Tegra234 GPCDMA	Akhil R	1	-0/+1
	Add reset and IOMMU header for Tegra234 GPCDMA Signed-off-by: Akhil R <akhilrajeev@nvidia.com> Reviewed-by: Jon Hunter <jonathanh@nvidia.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Thierry Reding <treding@nvidia.com>
2022-02-24	dt-bindings: memory: Add Tegra234 PCIe memory	Vidya Sagar	1	-0/+63
	Add the memory client and stream ID definitions for the PCIe hardware found on Tegra234 SoCs. Signed-off-by: Vidya Sagar <vidyas@nvidia.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Thierry Reding <treding@nvidia.com>
2022-02-24	dt-bindings: Add HDA support for Tegra234	Mohan Kumar	1	-0/+5
	Add hda clocks, memory ,power and reset binding entries for Tegra234. Signed-off-by: Mohan Kumar <mkumard@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2022-02-17	dt-bindings: Add Tegra234 APE support	Sameer Pujar	1	-0/+7
	Add clocks, power-domain and memory bindings to support APE subsystem on Tegra234. Signed-off-by: Sameer Pujar <spujar@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-12-16	dt-bindings: memory: tegra: Add Tegra234 support	Thierry Reding	1	-0/+32
	Document the variant of the memory controller and external memory controllers found on Tegra234 and add some memory client and SMMU stream ID definitions for use in device tree files. Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Thierry Reding <treding@nvidia.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> Signed-off-by: Thierry Reding <treding@nvidia.com>