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2024-03-13Merge branches 'clk-remove', 'clk-amlogic', 'clk-qcom', 'clk-parent' and ↵Stephen Boyd9-0/+330
'clk-microchip' into clk-next * clk-remove: clk: starfive: jh7110-vout: Convert to platform remove callback returning void clk: starfive: jh7110-isp: Convert to platform remove callback returning void clk: imx: imx8-acm: Convert to platform remove callback returning void * clk-amlogic: clk: meson: Add missing clocks to axg_clk_regmaps * clk-qcom: (62 commits) clk: qcom: gcc-ipq5018: fix register offset for GCC_UBI0_AXI_ARES reset clk: qcom: gcc-ipq5018: fix 'halt_reg' offset of 'gcc_pcie1_pipe_clk' clk: qcom: gcc-ipq5018: fix 'enable_reg' offset of 'gcc_gmac0_sys_clk' clk: qcom: camcc-x1e80100: Fix missing DT_IFACE enum in x1e80100 camcc clk: qcom: mmcc-msm8974: fix terminating of frequency table arrays clk: qcom: mmcc-apq8084: fix terminating of frequency table arrays clk: qcom: camcc-sc8280xp: fix terminating of frequency table arrays clk: qcom: gcc-ipq9574: fix terminating of frequency table arrays clk: qcom: gcc-ipq8074: fix terminating of frequency table arrays clk: qcom: gcc-ipq6018: fix terminating of frequency table arrays clk: qcom: gcc-ipq5018: fix terminating of frequency table arrays clk: qcom: dispcc-sdm845: Adjust internal GDSC wait times dt-bindings: clk: qcom: drop the SC7180 Modem subsystem clock controller clk: qcom: drop the SC7180 Modem subsystem clock driver clk: qcom: Use qcom_branch_set_clk_en() clk: qcom: branch: Add a helper for setting the enable bit clk: qcom: dispcc-sm8250: Make clk_init_data and pll_vco const clk: qcom: gcc-sc8180x: Add missing UFS QREF clocks clk: qcom: gcc-msm8953: add more resets clk: qcom: videocc-*: switch to module_platform_driver ... * clk-parent: clk: Fix clk_core_get NULL dereference * clk-microchip: clk: microchip: mpfs: convert MSSPLL outputs to clk_divider clk: microchip: mpfs: add missing MSSPLL outputs clk: microchip: mpfs: setup for using other mss pll outputs clk: microchip: mpfs: split MSSPLL in two dt-bindings: can: mpfs: add missing required clock dt-bindings: clock: mpfs: add more MSSPLL output definitions
2024-03-13Merge branches 'clk-aspeed', 'clk-keystone', 'clk-mobileye' and ↵Stephen Boyd2-0/+23
'clk-allwinner' into clk-next * clk-aspeed: clk: ast2600: Add FSI parent clock with correct rate dt-bindings: clock: ast2600: Add FSI clock * clk-keystone: clk: keystone: sci-clk: Adding support for non contiguous clocks * clk-mobileye: dt-bindings: reset: mobileye,eyeq5-reset: add bindings dt-bindings: clock: mobileye,eyeq5-clk: add bindings clk: fixed-factor: add fwname-based constructor functions clk: fixed-factor: add optional accuracy support * clk-allwinner: clk: sunxi: usb: fix kernel-doc warnings clk: sunxi: sun9i-cpus: fix kernel-doc warnings clk: sunxi: a20-gmac: fix kernel-doc warnings
2024-03-13Merge branches 'clk-renesas', 'clk-cleanup', 'clk-hisilicon', 'clk-mediatek' ↵Stephen Boyd1-0/+6
and 'clk-bulk' into clk-next - Add a devm_clk_bulk_get_all_enable() API to get and enable all clks for a device - Fix some static checker errors in the hisilicon clk driver * clk-renesas: (25 commits) clk: renesas: r8a779h0: Add RPC-IF clock clk: renesas: r8a779h0: Add SYS-DMAC clocks clk: renesas: r8a779h0: Add SDHI clock clk: renesas: r8a779h0: Add EtherAVB clocks clk: renesas: r9a07g04[34]: Fix typo for sel_shdi variable clk: renesas: r9a07g04[34]: Use SEL_SDHI1_STS status configuration for SD1 mux clk: renesas: r8a779f0: Correct PFC/GPIO parent clock clk: renesas: r8a779g0: Correct PFC/GPIO parent clocks clk: renesas: r8a779h0: Add I2C clocks clk: renesas: r8a779h0: Add watchdog clock clk: renesas: r8a779h0: Add PFC/GPIO clocks clk: renesas: r8a779g0: Fix PCIe clock name clk: renesas: cpg-mssr: Add support for R-Car V4M clk: renesas: rcar-gen4: Add support for FRQCRC1 clk: renesas: r9a07g043: Add clock and reset entries for CRU clk: renesas: r9a08g045: Add clock and reset support for watchdog dt-bindings: clock: Add R8A779H0 V4M CPG Core Clock Definitions dt-bindings: clock: renesas,cpg-mssr: Document R-Car V4M support dt-bindings: power: Add r8a779h0 SYSC power domain definitions dt-bindings: power: renesas,rcar-sysc: Document R-Car V4M support ... * clk-cleanup: clk: zynq: Prevent null pointer dereference caused by kmalloc failure clk: fractional-divider: Use bit operations consistently clk: fractional-divider: Move mask calculations out of lock clk: ti: dpll3xxx: use correct function names in kernel-doc clk: clocking-wizard: Remove redundant initialization of pointer div_addr clk: keystone: sci-clk: match func name comment to actual clk: cdce925: Remove redundant assignment to variable 'rate' MAINTAINERS: drop Sekhar Nori * clk-hisilicon: clk: hisilicon: Use devm_kcalloc() instead of devm_kzalloc() clk: hisilicon: hi3559a: Fix an erroneous devm_kfree() clk: hisilicon: hi3519: Release the correct number of gates in hi3519_clk_unregister() * clk-mediatek: clk: mediatek: clk-mt8173-apmixedsys: Use common error handling code in clk_mt8173_apmixed_probe() clk: mediatek: add infracfg reset controller for mt7988 dt-bindings: reset: mediatek: add MT7988 infracfg reset IDs dt-bindings: clock: mediatek: convert SSUSBSYS to the json-schema clock dt-bindings: clock: mediatek: convert PCIESYS to the json-schema clock dt-bindings: clock: mediatek: convert hifsys to the json-schema clock clk: mediatek: mt7981-topckgen: flag SGM_REG_SEL as critical clk: mediatek: mt8183: Correct parent of CLK_INFRA_SSPM_32K_SELF clk: mediatek: mt7622-apmixedsys: Fix an error handling path in clk_mt8135_apmixed_probe() clk: mediatek: mt8135: Fix an error handling path in clk_mt8135_apmixed_probe() * clk-bulk: clk: Provide managed helper to get and enable bulk clocks
2024-02-22dt-bindings: clock: mobileye,eyeq5-clk: add bindingsThéo Lebrun1-0/+22
Add DT schema bindings for the EyeQ5 clock controller driver. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Théo Lebrun <theo.lebrun@bootlin.com> Link: https://lore.kernel.org/r/20240221-mbly-clk-v7-3-31d4ce3630c3@bootlin.com Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2024-02-22dt-bindings: clock: ast2600: Add FSI clockEddie James1-0/+1
Add a definition for the FSI clock. Signed-off-by: Eddie James <eajames@linux.ibm.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20240215220759.976998-2-eajames@linux.ibm.com Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2024-02-22dt-bindings: reset: mediatek: add MT7988 infracfg reset IDsFrank Wunderlich1-0/+6
Add reset constants for using as index in driver and dts. Value is starting again from 0 because resets are used in another device than existing constants. Signed-off-by: Frank Wunderlich <frank-w@public-files.de> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/20240201182409.39878-2-linux@fw-web.de Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2024-02-13clk: renesas: r8a779g0: Correct PFC/GPIO parent clocksGeert Uytterhoeven1-0/+1
According to the R-Car V4H Series Hardware User’s Manual Rev.1.00, the parent clock of the Pin Function (PFC/GPIO) module clocks is the CP clock. Fix this by adding the missing CP clock, and correcting the PFC parents. Fixes: f2afa78d5a0c0b0b ("dt-bindings: clock: Add r8a779g0 CPG Core Clock Definitions") Fixes: 36ff366033f0dde1 ("clk: renesas: r8a779g0: Add PFC/GPIO clocks") Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/5401fccd204dc90b44f0013e7f53b9eff8df8214.1706197297.git.geert+renesas@glider.be
2024-02-07Merge branch '20240131-ufs-phy-clock-v3-3-58a49d2f4605@linaro.org' into ↵Bjorn Andersson1-0/+2
clk-for-6.9 Merge the two SC8180X reset defines through a topic branch, to allow them being picked up in the DeviceTree source tree as well.
2024-02-07Merge branch '20240125-msm8953-mdss-reset-v2-1-fd7824559426@z3ntu.xyz' into ↵Bjorn Andersson1-0/+4
clk-for-6.9 Merge MSM8953 GCC DeviceTree binding update through topic branch, to allow it to be merged into DeviceTree source tree as well.
2024-02-07dt-bindings: clock: qcom: Add missing UFS QREF clocksManivannan Sadhasivam1-0/+2
Add missing QREF clocks for UFS MEM and UFS CARD controllers. Fixes: 0fadcdfdcf57 ("dt-bindings: clock: Add SC8180x GCC binding") Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Link: https://lore.kernel.org/r/20240131-ufs-phy-clock-v3-3-58a49d2f4605@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-02-07dt-bindings: clock: gcc-msm8953: add more resetsVladimir Lypak1-0/+4
Add new defines for some more BCRs found on MSM8953. Signed-off-by: Vladimir Lypak <vladimir.lypak@gmail.com> [luca: expand commit message, add more resets] Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Luca Weiss <luca@z3ntu.xyz> Link: https://lore.kernel.org/r/20240125-msm8953-mdss-reset-v2-1-fd7824559426@z3ntu.xyz Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-02-06Merge branch ↵Bjorn Andersson5-0/+316
'20240202-x1e80100-clock-controllers-v4-5-7fb08c861c7c@linaro.org' into clk-for-6.9 Merge X1E clock bindings through a topic branch, to make the defines available for inclusion in DeviceTree branches as well.
2024-02-06dt-bindings: clock: qcom: Document the X1E80100 Camera Clock ControllerRajendra Nayak1-0/+135
Add bindings documentation for the X1E80100 Camera Clock Controller. Signed-off-by: Rajendra Nayak <quic_rjendra@quicinc.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Abel Vesa <abel.vesa@linaro.org> Link: https://lore.kernel.org/r/20240202-x1e80100-clock-controllers-v4-5-7fb08c861c7c@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-02-06dt-bindings: clock: qcom: Document the X1E80100 TCSR Clock ControllerAbel Vesa1-0/+23
Add bindings documentation for the X1E80100 TCSR Clock Controller. Co-developed-by: Rajendra Nayak <quic_rjendra@quicinc.com> Signed-off-by: Rajendra Nayak <quic_rjendra@quicinc.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Abel Vesa <abel.vesa@linaro.org> Link: https://lore.kernel.org/r/20240202-x1e80100-clock-controllers-v4-4-7fb08c861c7c@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-02-06dt-bindings: clock: qcom: Document the X1E80100 GPU Clock ControllerRajendra Nayak2-0/+60
Add bindings documentation for the X1E80100 Graphics Clock Controller. Signed-off-by: Rajendra Nayak <quic_rjendra@quicinc.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Abel Vesa <abel.vesa@linaro.org> Link: https://lore.kernel.org/r/20240202-x1e80100-clock-controllers-v4-3-7fb08c861c7c@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-02-06dt-bindings: clock: qcom: Document the X1E80100 Display Clock ControllerRajendra Nayak1-0/+98
Add bindings documentation for the X1E80100 Display Clock Controller. Signed-off-by: Rajendra Nayak <quic_rjendra@quicinc.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Abel Vesa <abel.vesa@linaro.org> Link: https://lore.kernel.org/r/20240202-x1e80100-clock-controllers-v4-2-7fb08c861c7c@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-02-06dt-bindings: clock: mpfs: add more MSSPLL output definitionsConor Dooley1-0/+5
There are 3 undocumented outputs of the MSSPLL that are used for the CAN bus, "user crypto" module and eMMC. Add their clock IDs so that they can be hooked up in DT. Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
2024-01-31dt-bindings: clock: Add R8A779H0 V4M CPG Core Clock DefinitionsDuy Nguyen1-0/+96
Add all Clock Pulse Generator Core Clock Outputs for the Renesas R-Car V4M (R8A779H0) SoC. Signed-off-by: Duy Nguyen <duy.nguyen.rh@renesas.com> Signed-off-by: Hai Pham <hai.pham.ud@renesas.com> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/11acbd2a30b58607474e9c32eb798b3a00e85e73.1706194617.git.geert+renesas@glider.be
2024-01-30dt-bindings: power: Add r8a779h0 SYSC power domain definitionsDuy Nguyen1-0/+49
Add power domain indices for the Renesas R-Car V4M (R8A779H0) SoC. Signed-off-by: Duy Nguyen <duy.nguyen.rh@renesas.com> Signed-off-by: Hai Pham <hai.pham.ud@renesas.com> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/c5cbef71178cada761e9da7bcbb6f21334f93ef8.1706194617.git.geert+renesas@glider.be Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2024-01-28dt-bindings: clock: qcom,gcc-sm8150: Add gcc video resets for sm8150Satya Priya Kakitapalli1-0/+3
Add gcc video axic, axi0 and axi1 resets for the global clock controller on sm8150. Signed-off-by: Satya Priya Kakitapalli <quic_skakitap@quicinc.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20240111-sm8150-dfs-support-v2-2-6edb44c83d3b@quicinc.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-01-21Merge tag 'dmaengine-fix-6.8-rc1' of ↵Linus Torvalds1-0/+21
git://git.kernel.org/pub/scm/linux/kernel/git/vkoul/dmaengine Pull dmaengine updates from Vinod Koul: "New support: - Loongson LS2X APB DMA controller - sf-pdma: mpfs-pdma support - Qualcomm X1E80100 GPI dma controller support Updates: - Xilinx XDMA updates to support interleaved DMA transfers - TI PSIL threads for AM62P and J722S and cfg register regions description - axi-dmac Improving the cyclic DMA transfers - Tegra Support dma-channel-mask property - Remaining platform remove callback returning void conversions Driver fixes for: - Xilinx xdma driver operator precedence and initialization fix - Excess kernel-doc warning fix in imx-sdma xilinx xdma drivers - format-overflow warning fix for rz-dmac, sh usb dmac drivers - 'output may be truncated' fix for shdma, fsl-qdma and dw-edma drivers" * tag 'dmaengine-fix-6.8-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/vkoul/dmaengine: (58 commits) dmaengine: dw-edma: increase size of 'name' in debugfs code dmaengine: fsl-qdma: increase size of 'irq_name' dmaengine: shdma: increase size of 'dev_id' dmaengine: xilinx: xdma: Fix kernel-doc warnings dmaengine: usb-dmac: Avoid format-overflow warning dmaengine: sh: rz-dmac: Avoid format-overflow warning dmaengine: imx-sdma: fix Excess kernel-doc warnings dmaengine: xilinx: xdma: Fix initialization location of desc in xdma_channel_isr() dmaengine: xilinx: xdma: Fix operator precedence in xdma_prep_interleaved_dma() dmaengine: xilinx: xdma: statify xdma_prep_interleaved_dma dmaengine: xilinx: xdma: Workaround truncation compilation error dmaengine: pl330: issue_pending waits until WFP state dmaengine: xilinx: xdma: Implement interleaved DMA transfers dmaengine: xilinx: xdma: Prepare the introduction of interleaved DMA transfers dmaengine: xilinx: xdma: Add transfer error reporting dmaengine: xilinx: xdma: Add error checking in xdma_channel_isr() dmaengine: xilinx: xdma: Rework xdma_terminate_all() dmaengine: xilinx: xdma: Ease dma_pool alignment requirements dmaengine: xilinx: xdma: Add necessary macro definitions dmaengine: xilinx: xdma: Get rid of unused code ...
2024-01-13Merge tag 'pmdomain-v6.8' of ↵Linus Torvalds1-0/+1
git://git.kernel.org/pub/scm/linux/kernel/git/ulfh/linux-pm Pull pmdomain updates from Ulf Hansson: "Core: - Move the generic PM domain and its governor to the pmdomain subsystem - Drop the unused pm_genpd_opp_to_performance_state() Providers: - Convert some providers to let the ->remove() callback return void - amlogic: Add support for G12A ISP power domain - arm: Move the SCPI power-domain driver to the pmdomain subsystem - arm: Move Kconfig options to the pmdomain subsystem - qcom: Update part number to X1E80100 for the rpmhpd" * tag 'pmdomain-v6.8' of git://git.kernel.org/pub/scm/linux/kernel/git/ulfh/linux-pm: PM: domains: Move genpd and its governor to the pmdomain subsystem PM: domains: Drop redundant header for genpd PM: domains: Drop the unused pm_genpd_opp_to_performance_state() PM: domains: fix domain_governor kernel-doc warnings pmdomain: xilinx/zynqmp: Convert to platform remove callback returning void pmdomain: qcom-cpr: Convert to platform remove callback returning void pmdomain: imx93-pd: Convert to platform remove callback returning void pmdomain: imx93-blk-ctrl: Convert to platform remove callback returning void pmdomain: imx8mp-blk-ctrl: Convert to platform remove callback returning void pmdomain: imx8m-blk-ctrl: Convert to platform remove callback returning void pmdomain: imx-gpcv2: Convert to platform remove callback returning void pmdomain: imx-gpc: Convert to platform remove callback returning void pmdomain: imx-pgc: Convert to platform remove callback returning void pmdomain: amlogic: meson-ee-pwrc: add support for G12A ISP power domain dt-bindings: power: meson-g12a-power: document ISP power domain firmware: arm_scpi: Move power-domain driver to the pmdomain dir pmdomain: arm_scmi: Move Kconfig options to the pmdomain subsystem pmdomain: qcom: rpmhpd: Update part number to X1E80100 dt-bindings: power: rpmpd: Update part number to X1E80100
2024-01-13Merge tag 'clk-for-linus' of ↵Linus Torvalds9-0/+1293
git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux Pull clk updates from Stephen Boyd: "Only a couple new SoCs have support added this time, primarily for Qualcomm SM8650 based on the diffstat. Otherwise this is a collection of non-critical fixes and cleanups to various clk drivers and their DT bindings. Nothing is changed in the core clk framework this time, although there's a patch to fix a basic clk type initialization function. In general, this pile looks to be on the smaller side. New Drivers: - Global, display, gpu, tcsr, and rpmh clocks on Qualcomm SM8650 - Mediatek MT7988 SoC clocks Updates: - Update Zynqmp driver for Versal NET platforms - Add clk driver for Versal clocking wizard IP - Support for stm32mp25 clks - Add glitch free PLL setting support to si5351 clk driver - Add DSI clocks on Amlogic g12/sm1 - Add CSI and ISP clocks on Amlogic g12/sm1 - Document bindings for i.MX93 ANATOP clock driver - Free clk_node in i.MX SCU driver for resource with different owner - Update the LVDS clocks to be compatible with i.MX SCU firmware 1.15 - Fix the name of the fvco in i.MX pll14xx by renaming it to fout - Add EtherNet TSN and PCIe clocks on the Renesas R-Car V4H SoC - Add interrupt controller and Ethernet clocks and resets on Renesas RZ/G3S - Check reset monitor registers on Renesas RZ/G2L-alike SoCs - Reuse reset functionality in the Renesas RZ/G2L clock driver - Global and RPMh clock support for the Qualcomm X1E80100 SoC - Support for the Stromer APCS PLL found in Qualcomm IPQ5018 - Add a new type of branch clock, with support for controlling separate memory control bits, to the Qualcomm clk driver - Use above new branch type in Qualcomm ECPRI clk driver for QDU1000 and QRU1000 - Add a number of missing clocks related to CSI2 on Qualcomm MSM8939 - Add support for the camera clock controller on Qualcomm SC8280XP - Correct PLL configuration in GPU and video clock controllers for Qualcomm SM8150 - Add runtime PM support and a few missing resets to Qualcomm SM8150 video clock controller - Fix configuration of various GCC GDSCs on Qualcomm SM8550 - Mark shared RCGs appropriately in the Qualcomm SM8550 GCC driver - Fix up GPU and display clock controllers PLL configuration settings on Qualcomm SM8550 - Cleanup variable init in Allwinner nkm module - Convert various DT bindings to YAML - A few kernel-doc fixes for Samsung SoC clock controllers" * tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (93 commits) clk: mediatek: add drivers for MT7988 SoC clk: mediatek: add pcw_chg_bit control for PLLs of MT7988 dt-bindings: clock: mediatek: add clock controllers of MT7988 dt-bindings: reset: mediatek: add MT7988 ethwarp reset IDs dt-bindings: clock: mediatek: add MT7988 clock IDs clk: mediatek: mt8188-topckgen: Refactor parents for top_dp/edp muxes clk: mediatek: mt8195-topckgen: Refactor parents for top_dp/edp muxes clk: mediatek: clk-mux: Support custom parent indices for muxes dt-bindings: clock: sophgo: Add clock controller of CV1800 series SoC clk: starfive: jh7100: Add CLK_SET_RATE_PARENT to gmac_tx clk: starfive: Add flags argument to JH71X0__MUX macro clk: imx: pll14xx: change naming of fvco to fout clk: imx: clk-imx8qxp: fix LVDS bypass, pixel and phy clocks clk: imx: scu: Fix memory leak in __imx_clk_gpr_scu() clk: fixed-rate: fix clk_hw_register_fixed_rate_with_accuracy_parent_hw clk: qcom: dispcc-sm8650: Add test_ctl parameters to PLL config clk: qcom: gpucc-sm8650: Add test_ctl parameters to PLL config clk: qcom: dispcc-sm8550: Use the correct PLL configuration function clk: qcom: dispcc-sm8550: Update disp PLL settings clk: qcom: gpucc-sm8550: Update GPU PLL settings ...
2024-01-12Merge tag 'drm-next-2024-01-10' of git://anongit.freedesktop.org/drm/drmLinus Torvalds1-0/+4
Pull drm updates from Dave Airlie: "This contains two major new drivers: - imagination is a first driver for Imagination Technologies devices, it only covers very specific devices, but there is hope to grow it - xe is a reboot of the i915 GPU (shares display) side using a more upstream focused development model, and trying to maximise code sharing. It's not enabled for any hw by default, and will hopefully get switched on for Intel's Lunarlake. This also drops a bunch of the old UMS ioctls. It's been dead long enough. amdgpu has a bunch of new color management code that is being used in the Steam Deck. amdgpu also has a new ACPI WBRF interaction to help avoid radio interference. Otherwise it's the usual lots of changes in lots of places. Detailed summary: new drivers: - imagination - new driver for Imagination Technologies GPU - xe - new driver for Intel GPUs using core drm concepts core: - add CLOSE_FB ioctl - remove old UMS ioctls - increase max objects to accomodate AMD color mgmt encoder: - create per-encoder debugfs directory edid: - split out drm_eld - SAD helpers - drop edid_firmware module parameter format-helper: - cache format conversion buffers sched: - move from kthread to workqueue - rename some internals - implement dynamic job-flow control gpuvm: - provide more features to handle GEM objects client: - don't acquire module reference displayport: - add mst path property documentation fdinfo: - alignment fix dma-buf: - add fence timestamp helper - add fence deadline support bridge: - transparent aux-bridge for DP/USB-C - lt8912b: add suspend/resume support and power regulator support panel: - edp: AUO B116XTN02, BOE NT116WHM-N21,836X2, NV116WHM-N49 - chromebook panel support - elida-kd35t133: rework pm - powkiddy RK2023 panel - himax-hx8394: drop prepare/unprepare and shutdown logic - BOE BP101WX1-100, Powkiddy X55, Ampire AM8001280G - Evervision VGG644804, SDC ATNA45AF01 - nv3052c: register docs, init sequence fixes, fascontek FS035VG158 - st7701: Anbernic RG-ARC support - r63353 panel controller - Ilitek ILI9805 panel controller - AUO G156HAN04.0 simplefb: - support memory regions - support power domains amdgpu: - add new 64-bit sequence number infrastructure - add AMD specific color management - ACPI WBRF support for RF interference handling - GPUVM updates - RAS updates - DCN 3.5 updates - Rework PCIe link speed handling - Document GPU reset types - DMUB fixes - eDP fixes - NBIO 7.9/7.11 updates - SubVP updates - XGMI PCIe state dumping for aqua vanjaram - GFX11 golden register updates - enable tunnelling on high pri compute amdkfd: - Migrate TLB flushing logic to amdgpu - Trap handler fixes - Fix restore workers handling on suspend/resume - Fix possible memory leak in pqm_uninit() - support import/export of dma-bufs using GEM handles radeon: - fix possible overflows in command buffer checking - check for errors in ring_lock i915: - reorg display code for reuse in xe driver - fdinfo memory stats printing - DP MST bandwidth mgmt improvements - DP panel replay enabling - MTL C20 phy state verification - MTL DP DSC fractional bpp support - Audio fastset support - use dma_fence interfaces instead of i915_sw_fence - Separate gem and display code - AUX register macro refactoring - Separate display module/device parameters - Move display capabilities debugfs under display - Makefile cleanups - Register cleanups - Move display lock inits under display/ - VLV/CHV DPIO PHY register and interface refactoring - DSI VBT sequence refactoring - C10/C20 PHY PLL hardware readout - DPLL code cleanups - Cleanup PXP plane protection checks - Improve display debug msgs - PSR selective fetch fixes/improvements - DP MST fixes - Xe2LPD FBC restrictions removed - DGFX uses direct VBT pin mapping - more MTL WAs - fix MTL eDP bug - eliminate use of kmap_atomic habanalabs: - sysfs entry to identify a device minor id with debugfs path - sysfs entry to expose device module id - add signed device info retrieval through INFO ioctl - add Gaudi2C device support - pcie reset prepare/done hooks msm: - Add support for SDM670, SM8650 - Handle the CFG interconnect to fix the obscure hangs / timeouts - Kconfig fix for QMP dependency - use managed allocators - DPU: SDM670, SM8650 support - DPU: Enable SmartDMA on SM8350 and SM8450 - DP: enable runtime PM support - GPU: add metadata UAPI - GPU: move devcoredumps to GPU device - GPU: convert to drm_exec ivpu: - update FW API - new debugfs file - a new NOP job submission test mode - improve suspend/resume - PM improvements - MMU PT optimizations - firmware profile frequency support - support for uncached buffers - switch to gem shmem helpers - replace kthread with threaded irqs rockchip: - rk3066_hdmi: convert to atomic - vop2: support nv20 and nv30 - rk3588 support mediatek: - use devm_platform_ioremap_resource - stop using iommu_present - MT8188 VDOSYS1 display support panfrost: - PM improvements - improve interrupt handling as poweroff qaic: - allow to run with single MSI - support host/device time sync - switch to persistent DRM devices exynos: - fix potential error pointer dereference - fix wrong error checking - add missing call to drm_atomic_helper_shutdown omapdrm: - dma-fence lockdep annotation fix tidss: - dma-fence lockdep annotation fix - support for AM62A7 v3d: - BCM2712 - rpi5 support - fdinfo + gputop support - uapi for CPU job handling virtio-gpu: - add context debug name" * tag 'drm-next-2024-01-10' of git://anongit.freedesktop.org/drm/drm: (2340 commits) drm/amd/display: Allow z8/z10 from driver drm/amd/display: fix bandwidth validation failure on DCN 2.1 drm/amdgpu: apply the RV2 system aperture fix to RN/CZN as well drm/amd/display: Move fixpt_from_s3132 to amdgpu_dm drm/amd/display: Fix recent checkpatch errors in amdgpu_dm Revert "drm/amdkfd: Relocate TBA/TMA to opposite side of VM hole" drm/amd/display: avoid stringop-overflow warnings for dp_decide_lane_settings() drm/amd/display: Fix power_helpers.c codestyle drm/amd/display: Fix hdcp_log.h codestyle drm/amd/display: Fix hdcp2_execution.c codestyle drm/amd/display: Fix hdcp_psp.h codestyle drm/amd/display: Fix freesync.c codestyle drm/amd/display: Fix hdcp_psp.c codestyle drm/amd/display: Fix hdcp1_execution.c codestyle drm/amd/pm/smu7: fix a memleak in smu7_hwmgr_backend_init drm/amdkfd: Fix iterator used outside loop in 'kfd_add_peer_prop()' drm/amdgpu: Drop 'fence' check in 'to_amdgpu_amdkfd_fence()' drm/amdkfd: Confirm list is non-empty before utilizing list_first_entry in kfd_topology.c drm/amdgpu: Fix '*fw' from request_firmware() not released in 'amdgpu_ucode_request()' drm/amdgpu: Fix variable 'mca_funcs' dereferenced before NULL check in 'amdgpu_mca_smu_get_mca_entry()' ...
2024-01-11Merge tag 'soc-drivers-6.8' of ↵Linus Torvalds3-74/+194
git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc Pull SoC driver updates from Arnd Bergmann: "A new drivers/cache/ subsystem is added to contain drivers for abstracting cache flush methods on riscv and potentially others, as this is needed for handling non-coherent DMA but several SoCs require nonstandard hardware methods for it. op-tee gains support for asynchronous notification with FF-A, as well as support for a system thread for executing in secure world. The tee, reset, bus, memory and scmi subsystems have a couple of minor updates. Platform specific soc driver changes include: - Samsung Exynos gains driver support for Google GS101 (Tensor G1) across multiple subsystems - Qualcomm Snapdragon gains support for SM8650 and X1E along with added features for some other SoCs - Mediatek adds support for "Smart Voltage Scaling" on MT8186 and MT8195, and driver support for MT8188 along with some code refactoring. - Microchip Polarfire FPGA support for "Auto Update" of the FPGA bitstream - Apple M1 mailbox driver is rewritten into a SoC driver - minor updates on amlogic, mvebu, ti, zynq, imx, renesas and hisilicon" * tag 'soc-drivers-6.8' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (189 commits) memory: ti-emif-pm: Convert to platform remove callback returning void memory: ti-aemif: Convert to platform remove callback returning void memory: tegra210-emc: Convert to platform remove callback returning void memory: tegra186-emc: Convert to platform remove callback returning void memory: stm32-fmc2-ebi: Convert to platform remove callback returning void memory: exynos5422-dmc: Convert to platform remove callback returning void memory: renesas-rpc-if: Convert to platform remove callback returning void memory: omap-gpmc: Convert to platform remove callback returning void memory: mtk-smi: Convert to platform remove callback returning void memory: jz4780-nemc: Convert to platform remove callback returning void memory: fsl_ifc: Convert to platform remove callback returning void memory: fsl-corenet-cf: Convert to platform remove callback returning void memory: emif: Convert to platform remove callback returning void memory: brcmstb_memc: Convert to platform remove callback returning void memory: brcmstb_dpfe: Convert to platform remove callback returning void soc: qcom: llcc: Fix LLCC_TRP_ATTR2_CFGn offset firmware: qcom: qseecom: fix memory leaks in error paths dt-bindings: clock: google,gs101: rename CMU_TOP gate defines soc: qcom: llcc: Fix typo in kernel-doc dt-bindings: soc: qcom,aoss-qmp: document the X1E80100 Always-On Subsystem side channel ...
2024-01-09Merge branches 'clk-zynq', 'clk-xilinx' and 'clk-stm' into clk-nextStephen Boyd2-0/+659
- Update Zynqmp driver for Versal NET platforms - Add clk driver for Versal clocking wizard IP * clk-zynq: drivers: clk: zynqmp: update divider round rate logic drivers: clk: zynqmp: calculate closest mux rate * clk-xilinx: clocking-wizard: Add support for versal clocking wizard dt-bindings: clock: xilinx: add versal compatible * clk-stm: dt-bindings: stm32: add clocks and reset binding for stm32mp25 platform clk: stm32mp1: use stm32mp13 reset driver clk: stm32mp1: move stm32mp1 clock driver into stm32 directory
2024-01-09Merge branches 'clk-imx', 'clk-qcom', 'clk-amlogic' and 'clk-mediatek' into ↵Stephen Boyd13-0/+1559
clk-next * clk-imx: clk: imx: pll14xx: change naming of fvco to fout clk: imx: clk-imx8qxp: fix LVDS bypass, pixel and phy clocks clk: imx: scu: Fix memory leak in __imx_clk_gpr_scu() dt-bindings: clock: support i.MX93 ANATOP clock module * clk-qcom: (41 commits) clk: qcom: dispcc-sm8650: Add test_ctl parameters to PLL config clk: qcom: gpucc-sm8650: Add test_ctl parameters to PLL config clk: qcom: dispcc-sm8550: Use the correct PLL configuration function clk: qcom: dispcc-sm8550: Update disp PLL settings clk: qcom: gpucc-sm8550: Update GPU PLL settings clk: qcom: gcc-sm8550: Mark RCGs shared where applicable clk: qcom: gcc-sm8550: use collapse-voting for PCIe GDSCs clk: qcom: gcc-sm8550: Mark the PCIe GDSCs votable clk: qcom: gcc-sm8550: Add the missing RETAIN_FF_ENABLE GDSC flag clk: qcom: camcc-sc8280xp: Prevent error pointer dereference clk: qcom: videocc-sm8150: Add runtime PM support clk: qcom: videocc-sm8150: Add missing PLL config property clk: qcom: videocc-sm8150: Update the videocc resets dt-bindings: clock: Update the videocc resets for sm8150 clk: qcom: rpmh: Add support for X1E80100 rpmh clocks clk: qcom: Add Global Clock controller (GCC) driver for X1E80100 dt-bindings: clock: qcom-rpmhcc: Add RPMHCC bindings for X1E80100 dt-bindings: clock: qcom: Add X1E80100 GCC clocks clk: qcom: Add ECPRICC driver support for QDU1000 and QRU1000 clk: qcom: branch: Add mem ops support for branch2 clocks ... * clk-amlogic: clk: meson: g12a: add CSI & ISP gates clocks clk: meson: g12a: add MIPI ISP clocks dt-bindings: clock: g12a-clkc: add MIPI ISP & CSI PHY clock ids clk: meson: g12a: add CTS_ENCL & CTS_ENCL_SEL clocks dt-bindings: clk: g12a-clkc: add CTS_ENCL clock ids * clk-mediatek: clk: mediatek: add drivers for MT7988 SoC clk: mediatek: add pcw_chg_bit control for PLLs of MT7988 dt-bindings: clock: mediatek: add clock controllers of MT7988 dt-bindings: reset: mediatek: add MT7988 ethwarp reset IDs dt-bindings: clock: mediatek: add MT7988 clock IDs clk: mediatek: mt8188-topckgen: Refactor parents for top_dp/edp muxes clk: mediatek: mt8195-topckgen: Refactor parents for top_dp/edp muxes clk: mediatek: clk-mux: Support custom parent indices for muxes dt-bindings: clock: brcm,kona-ccu: convert to YAML dt-bindings: arm: mediatek: move ethsys controller & convert to DT schema dt-bindings: Remove alt_ref from versal
2024-01-04dt-bindings: reset: mediatek: add MT7988 ethwarp reset IDsDaniel Golle1-0/+13
Add reset ID for ethwarp subsystem allowing to reset the built-in Ethernet switch of the MediaTek MT7988 SoC. Signed-off-by: Daniel Golle <daniel@makrotopia.org> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/0c14bbacf471683af67ffa7572bfa1d5c45a0b5d.1702849494.git.daniel@makrotopia.org Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2024-01-04dt-bindings: clock: mediatek: add MT7988 clock IDsSam Shih1-0/+280
Add MT7988 clock dt-bindings for topckgen, apmixedsys, infracfg, ethernet and xfipll subsystem clocks. Signed-off-by: Sam Shih <sam.shih@mediatek.com> Signed-off-by: Daniel Golle <daniel@makrotopia.org> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://lore.kernel.org/r/27f99db432e9ccc804cc5b6501d7d17d72cae879.1702849494.git.daniel@makrotopia.org Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2024-01-04dt-bindings: clock: sophgo: Add clock controller of CV1800 series SoCInochi Amaoto1-0/+176
Add definition for the clock controller of the CV1800 series SoC. For CV181X, it has a clock that CV180X does not have. To avoid misuse, also add a compatible string to identify CV181X series SoC. Signed-off-by: Inochi Amaoto <inochiama@outlook.com> Link: https://github.com/milkv-duo/duo-files/blob/main/hardware/CV1800B/CV1800B-CV1801B-Preliminary-Datasheet-full-en.pdf Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/IA1PR20MB49535E448097F6FFC1218C39BB90A@IA1PR20MB4953.namprd20.prod.outlook.com Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2023-12-22Merge tag 'qcom-arm64-for-6.8' of ↵Arnd Bergmann13-0/+1664
https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into soc/dt Qualcomm ARM64 updates for v6.8 Support is added for the new Snapdragon 8 Gen 3 mobile platform, with support for the MTP and QRD development devices, the new Snapdragon X Elite compute platform with QCP and CRD development/references devices, the QCS6590/QCM6490 platform with support for the IDP development device and the Robotics RB3gen2 board, the Huawei Honor 5X/GR5 handset built on MSM8939, and Xiaomi Pad 6 on SM8250. On IPQ5018 and IPQ6018 platform support for CPUfreq, USB, and one additional QUP SPI controller is added. CPU OPP tables are selectively enabled based on fuses, for both IPQ5332 and IPQ6018. IPQ6018 gains description of a few more SPI and UART nodes. Common elements of the IPQ9574 RDP boards are refactored into a common include file. IPQ9574 also gains description of its LEDs and WPS busttons. MSM8916 finally gets the DSP-based audio described, and this is enabled for a variety of boards. Acer Iconia Talk S and Loncheer L8910 gains notification LED, battery and charger support is added to Loncheer L8150, and GPU is enabled for Samsung Galaxy Tab A. Similariy DSP-based audio is added on MSM8939, the BAM-DMUX support is enabled as well. The Longcheer L9100 gains RGB notification LED support, and the wireless subsystem is enabled. Missing SPI controllers are described on MSM8953. On MSM8996 the MPM is enabled, to allow using wakeup interrupts. Interconnect providers, MPM and display are added to QCM2290. UFS, remoteprocs and WiFi is enabled for Fairphone FP5. On Fairphone FP3 audio, WiFi and Bluetooth are enabled. On the Robotics RB1, HDMI and the CAN bus controller are added. On Robotics RB2 Bluetooth, the modem remoteproc and WiFi are enabled. Bluetooth is enabled on the Robotics RB5. On SA8775P tsens and thermal is added, as well as the random number generator. Sound and RTC support is added for the Acer Aspire 1. On SC7280 DeviceTree is refactored, in order to allow non-Chrome devices to inherit the base dtsi. Support for UFS, crypto, TrustZone based remoteprocs, the Camera Control Interface (CCI) and random number generator support are added. Additionally a variety of smaller fixes are introduced. A variety of fixes are introduced for SC8180X, in particular missing power-domains and interconnects. On SC8280XP the camera clock controller is added, and a number of smaller fixes are introduced. The display subsystem in SDM670 is described. On SDX75 interconnect providers are added, as is USB3 and the related PHY, which is then enabled on the IDP device. On SM6115 interconnect providers are added and existing clients are wired up. A UART controller is added as well. The MPM is added, to provide wakeup interrutps, on SM6375. The modem subsystem, and WiFi are enabled on Sony Xperia 10 IV, a few regulator supplies are corrected. On SM8150 the DisplayPort controller is added, for USB Type-C output, which together with the addition of HDMI is described on the HDK board. GPU and random number generator support are added to SM8450, and enabled on the HDK board. On SM8550 GPU, IPA, random number generator, missing SoundWire ports are added, and enabled on both MTP and QRD devices. Additionally a large number of smaller functional and DeviceTree binding validation issues are corrected across a variety of platforms. * tag 'qcom-arm64-for-6.8' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: (288 commits) arm64: dts: qcom: sc8180x-primus: Allow UFS regulators load/mode setting arm64: dts: qcom: sc8180x: Describe the GIC redistributor arm64: dts: qcom: sc8180x: Add interconnects to UFS arm64: dts: qcom: sc8180x: Add missing MDP clocks arm64: dts: qcom: sc8180x: Add UFS GDSC arm64: dts: qcom: sc7280*: move MPSS and WPSS memory to dtsi arm64: dts: qcom: sc7280: Rename reserved-memory nodes arm64: dts: qcom: sc7280: Remove unused second MPSS reg arm64: dts: qcom: sdm670: add display subsystem arm64: dts: qcom: sm8150-hdk: enable DisplayPort and USB-C altmode arm64: dts: qcom: sm8150: add USB-C ports to the OTG USB host arm64: dts: qcom: sm8150: add USB-C ports to the USB+DP QMP PHY arm64: dts: qcom: sm8150: add DisplayPort controller arm64: dts: qcom: sm8150-hdk: fix SS USB regulators arm64: dts: qcom: sm8150-hdk: enable HDMI output arm64: dts: qcom: sm8150: make dispcc cast minimal vote on MMCX arm64: dts: qcom: sm8650: add fastrpc-compute-cb nodes arm64: dts: qcom: sm8550-qrd: add PM8010 regulators arm64: dts: qcom: sm8550-mtp: Add pm8010 regulators arm64: dts: qcom: qcm2290: Hook up MPM ... Link: https://lore.kernel.org/r/20231219145402.874161-1-andersson@kernel.org Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2023-12-22Merge tag 'reset-for-v6.8' of git://git.pengutronix.de/pza/linux into ↵Arnd Bergmann1-0/+119
soc/drivers Reset controller updates for v6.8 Make use of devm_platform_get_and_ioremap_resource() and device_get_match_data() in several drivers, support the Amlogic C3 reset controller, and improve various device tree binding documents. * tag 'reset-for-v6.8' of git://git.pengutronix.de/pza/linux: dt-bindings: reset: hisilicon,hi3660-reset: Drop providers and consumers from example dt-bindings: reset: imx-src: Simplify compatible schema and drop unneeded quotes dt-bindings: reset: qcom: drop unneeded quotes dt-bindings: reset: renesas,rzg2l-usbphy-ctrl: Document RZ/Five SoC reset: Use device_get_match_data() reset: reset-meson: add support for Amlogic C3 SoC Reset Controller dt-bindings: reset: Add compatible and DT bindings for Amlogic C3 Reset Controller reset: uniphier-glue: Use devm_platform_get_and_ioremap_resource() reset: sunplus: Use devm_platform_get_and_ioremap_resource() reset: simple: Convert to devm_platform_get_and_ioremap_resource() reset: qcom: Convert to devm_platform_ioremap_resource() reset: qcom-aoss: Convert to devm_platform_ioremap_resource() reset: meson-audio-arb: Convert to devm_platform_ioremap_resource() reset: brcmstb: Use devm_platform_get_and_ioremap_resource() Link: https://lore.kernel.org/r/20231213153313.278867-1-p.zabel@pengutronix.de Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2023-12-22Merge tag 'samsung-drivers-6.8' of ↵Arnd Bergmann1-0/+392
https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into soc/drivers Samsung SoC driver changes for v6.8 1. Add support for Google GS101 SoC to different drivers: clock controller, serial and watchdog. The clock driver changes depend on few bindings headers, which I put in a topic branch with the bindings refactoring and GS101 support, therefore this this pull request includes that bindings topic branch. The rest of the bindings topic branch is not necessary here, however keeping everything together makes it easier to share between branches. The bindings topic branch is mostly refactoring all the compatibles to add SoC-specific compatible followed by fallback. 2. Exynos ChipID: recognize ExynosAutov920. * tag 'samsung-drivers-6.8' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux: (40 commits) dt-bindings: clock: google,gs101: rename CMU_TOP gate defines watchdog: s3c2410_wdt: Add support for Google gs101 SoC watchdog: s3c2410_wdt: Update QUIRK macros to use BIT macro watchdog: s3c2410_wdt: Add support for WTCON register DBGACK_MASK bit tty: serial: samsung: Add gs101 compatible and common fifoszdt_serial_drv_data clk: samsung: clk-gs101: Add cmu_top, cmu_misc and cmu_apm support clk: samsung: clk-pll: Add support for pll_{0516,0517,518} dt-bindings: clock: google,gs101: fix incorrect numbering and DGB suffix dt-bindings: soc: samsung: usi: add google,gs101-usi compatible dt-bindings: serial: samsung: Make samsung,uart-fifosize a required property dt-bindings: serial: samsung: Add google-gs101-uart compatible dt-bindings: watchdog: Document Google gs101 watchdog bindings dt-bindings: samsung: exynos-sysreg: combine exynosautov920 with other enum dt-bindings: soc: google: exynos-sysreg: add dedicated SYSREG compatibles to GS101 dt-bindings: clock: Add Google gs101 clock management unit bindings dt-bindings: soc: samsung: exynos-pmu: Add gs101 compatible dt-bindings: watchdog: samsung: add specific compatible for Tesla FSD dt-bindings: samsung: exynos-pmu: add specific compatible for Tesla FSD dt-bindings: serial: samsung: add specific compatible for Tesla FSD dt-bindings: pwm: samsung: add specific compatible for Tesla FSD ... Link: https://lore.kernel.org/r/20231220084722.22149-1-krzysztof.kozlowski@linaro.org Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2023-12-21dt-bindings: dma: fsl-edma: Add fsl-edma.h to prevent hardcoding in dtsFrank Li1-0/+21
Introduce a common dt-bindings header file, fsl-edma.h, shared between the driver and dts files. This addition aims to eliminate hardcoded values in dts files, promoting maintainability and consistency. DTS header file not support BIT() macro yet. Directly use 2^n number. Signed-off-by: Frank Li <Frank.Li@nxp.com> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20231114154824.3617255-3-Frank.Li@nxp.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2023-12-21Merge tag 'mtk-dts64-for-v6.8' of ↵Arnd Bergmann1-0/+75
https://git.kernel.org/pub/scm/linux/kernel/git/mediatek/linux into soc/dt MediaTek ARM64 DeviceTree updates for v6.8 This adds devicetree bindings and nodes for: - Media Data Path 3 (MDP3) bindings and enablement on MT8195 - Smart Voltage Scaling (SVS) on MT8195 - LVTS SoC thermal on MT8192 - MT8188 SoC along with its resets, display bindings, and more - MT8183 hardware video decoder (mtk-vcodec-dec) Adds the following new machines: - MT8188 Evaluation Board (EVB) - MT8183 Chromebooks: Kukui-Katsu, Jacuzzi-Makomo, Pico, Pico6 Performs cleanups for various MediaTek SoCs and PMICs, and also includes some spare fixes. * tag 'mtk-dts64-for-v6.8' of https://git.kernel.org/pub/scm/linux/kernel/git/mediatek/linux: (60 commits) arm64: dts: mediatek: mt8192: Add Smart Voltage Scaling node arm64: dts: mediatek: mt8195: Add SVS node and reduce LVTS_AP iospace arm64: dts: mediatek: mt8183: Change iospaces for thermal and svs arm64: dts: mediatek: mt8186: fix address warning for ADSP mailboxes arm64: dts: mediatek: mt8186: Fix alias prefix for ovl_2l0 arm64: dts: mt6358: Drop bogus "regulator-fixed" compatible properties arm64: dts: mt8183: kukui-jacuzzi: Drop bogus anx7625 panel_flag property arm64: dts: Add MediaTek MT8188 dts and evaluation board and Makefile dt-bindings: soc: mediatek: pwrap: Modify compatible for MT8188 dt-bindings: arm: mediatek: Add mt8188 pericfg compatible dt-bindings: arm: Add compatible for MediaTek MT8188 arm64: dts: mediatek: mt8195: add DSI and MIPI DPHY nodes dt-bindings: display: mediatek: dsi: add compatible for MediaTek MT8195 arm64: dts: mediatek: mt6358: Merge ldo_vcn33_* regulators dt-bindings: arm: mediatek: convert audsys and mt2701-afe-pcm to yaml arm64: dts: mediatek: mt8195: add MDP3 nodes arm64: dts: mediatek: mt8195: revise VDOSYS RDMA node name arm64: dts: mediatek: mt8183: correct MDP3 DMA-related nodes dt-bindings: display: mediatek: padding: add compatible for MT8195 dt-bindings: display: mediatek: split: add compatible for MT8195 ... Link: https://lore.kernel.org/r/20231212114515.121695-1-angelogioacchino.delregno@collabora.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2023-12-18dt-bindings: clock: google,gs101: rename CMU_TOP gate definesTudor Ambarus1-72/+72
The gs101 clock defines from the bindings header are derived from the clock register names found in the datasheet under some certain rules. The CMU TOP gate clock defines missed to include the required "CMU" differentiator which will cause collisions with the gate clock defines of other clock units. Rename the TOP gate clock defines to include "CMU". Update the clock driver to use the new defines in order to not break compilation and bisect-ability. There are no device trees that use the previous defines. Fixes: 0a910f160638 ("dt-bindings: clock: Add Google gs101 clock management unit bindings") Signed-off-by: Tudor Ambarus <tudor.ambarus@linaro.org> Reviewed-by: Sam Protsenko <semen.protsenko@linaro.org> Reviewed-by: Peter Griffin <peter.griffin@linaro.org> Link: https://lore.kernel.org/r/20231218064333.479885-1-tudor.ambarus@linaro.org Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2023-12-18dt-bindings: stm32: add clocks and reset binding for stm32mp25 platformGabriel Fernandez2-0/+659
Adds clock and reset binding entries for STM32MP25 SoC family Signed-off-by: Gabriel Fernandez <gabriel.fernandez@foss.st.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20231208143700.354785-4-gabriel.fernandez@foss.st.com Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2023-12-17Merge branch 'icc-sm6115' of ↵Bjorn Andersson1-0/+111
https://git.kernel.org/pub/scm/linux/kernel/git/djakov/icc into HEAD Merge the SM6115 interconnect binding to allow referecing the interconnect header files and the ports defined in these.
2023-12-16Merge branch '20231201-videocc-8150-v3-1-56bec3a5e443@quicinc.com' into ↵Bjorn Andersson1-0/+4
clk-for-6.8 Merge SM8150 Video clock controller through a topic branch, to allow constants to be made available in the DeviceTree branch as well.
2023-12-16dt-bindings: clock: Update the videocc resets for sm8150Satya Priya Kakitapalli1-0/+4
Add all the available resets for the video clock controller on sm8150. Signed-off-by: Satya Priya Kakitapalli <quic_skakitap@quicinc.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20231201-videocc-8150-v3-1-56bec3a5e443@quicinc.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-12-13dt-bindings: rockchip,vop2: Add more endpoint definitionAndy Yan1-0/+4
There are 2 HDMI, 2 DP, 2 eDP on rk3588, so add corresponding endpoint definition for it. Signed-off-by: Andy Yan <andy.yan@rock-chips.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Heiko Stuebner <heiko@sntech.de> Link: https://patchwork.freedesktop.org/patch/msgid/20231211115907.1785377-1-andyshrk@163.com
2023-12-12dt-bindings: clock: google,gs101: fix incorrect numbering and DGB suffixPeter Griffin1-59/+59
166 was skipped by mistake and two clocks: * CLK_MOUT_CMU_HSI0_USBDPDGB * CLK_GOUT_HSI0_USBDPDGB Have an incorrect DGB ending instead of DBG. This is an ABI break, but as the patch was only applied yesterday this header has never been in an actual release so it seems better to fix this early than ignore it. Fixes: 0a910f160638 ("dt-bindings: clock: Add Google gs101 clock management unit bindings") Signed-off-by: Peter Griffin <peter.griffin@linaro.org> Reviewed-by: Chanwoo Choi <cw00.choi@samsung.com> Reviewed-by: Sam Protsenko <semen.protsenko@linaro.org> Reviewed-by: André Draszik <andre.draszik@linaro.org> Link: https://lore.kernel.org/r/20231211162331.435900-7-peter.griffin@linaro.org Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2023-12-11dt-bindings: reset: mt8188: Add VDOSYS reset control bitsHsiao Chien Sung1-0/+75
Add MT8188 VDOSYS0 and VDOSYS1 reset control bits. Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Hsiao Chien Sung <shawn.sung@mediatek.com> Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
2023-12-10dt-bindings: clock: Add Google gs101 clock management unit bindingsPeter Griffin1-0/+392
Provide dt-schema documentation for Google gs101 SoC clock controller. Currently this adds support for cmu_top, cmu_misc and cmu_apm. Reviewed-by: Sam Protsenko <semen.protsenko@linaro.org> Signed-off-by: Peter Griffin <peter.griffin@linaro.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20231209233106.147416-3-peter.griffin@linaro.org Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2023-12-08Merge branch 'icc-x1e80100' of ↵Bjorn Andersson1-0/+207
https://git.kernel.org/pub/scm/linux/kernel/git/djakov/icc into arm64-for-6.8 Merge the X1E80100 interconnect binding to get access to the interconnect port constants.
2023-12-08Merge branch '20231205061002.30759-4-quic_sibis@quicinc.com' into arm64-for-6.8Bjorn Andersson1-0/+485
Merge the X1E80100 clock bindings to get access to the clock constants.
2023-12-08Merge branch '20231205061002.30759-4-quic_sibis@quicinc.com' into clk-for-6.8Bjorn Andersson1-0/+485
Merge the X1E80100 DeviceTree bindings through a topic branch, to allow the clock constants to be shared with the DeviceTree branch.
2023-12-08dt-bindings: clock: qcom: Add X1E80100 GCC clocksRajendra Nayak1-0/+485
Add device tree bindings for global clock controller on X1E80100 SoCs. Signed-off-by: Rajendra Nayak <quic_rjendra@quicinc.com> Co-developed-by: Sibi Sankar <quic_sibis@quicinc.com> Signed-off-by: Sibi Sankar <quic_sibis@quicinc.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20231205061002.30759-2-quic_sibis@quicinc.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-12-08Merge branch 'icc-sm8650' of ↵Bjorn Andersson1-0/+154
https://git.kernel.org/pub/scm/linux/kernel/git/djakov/icc into arm64-for-6.8 Merge the SM8650 interconnect binding, to gain access to the interconnect port constants.
2023-12-08Merge branch ↵Bjorn Andersson5-0/+437
'20231106-topic-sm8650-upstream-clocks-v3-5-761a6fadb4c0@linaro.org' into arm64-for-6.8 Merge the SM8650 clock bindings, to gain access to the clock constants.
generated by cgit v1.2.3 (git 2.39.0) at 2024-10-02 21:59:10 +0300