From 297fa85fbe96a442aa2c1f0eb062f84e59aa6d6b Mon Sep 17 00:00:00 2001 From: Justin Swartz Date: Sat, 16 Mar 2024 06:54:37 +0200 Subject: mips: dts: ralink: mt7621: reorder mmc node attributes MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Shuffle the attributes of the MMC node to meet the guidelines provided by the DTS style guide. Signed-off-by: Justin Swartz Reviewed-by: Arınç ÜNAL Reviewed-by: AngeloGioacchino Del Regno Reviewed-by: Sergio Paracuellos Signed-off-by: Thomas Bogendoerfer --- arch/mips/boot/dts/ralink/mt7621.dtsi | 26 +++++++++++++++----------- 1 file changed, 15 insertions(+), 11 deletions(-) diff --git a/arch/mips/boot/dts/ralink/mt7621.dtsi b/arch/mips/boot/dts/ralink/mt7621.dtsi index b28aee1e4ca3..1fbe345bd239 100644 --- a/arch/mips/boot/dts/ralink/mt7621.dtsi +++ b/arch/mips/boot/dts/ralink/mt7621.dtsi @@ -289,29 +289,33 @@ }; mmc: mmc@1e130000 { - status = "disabled"; - compatible = "mediatek,mt7620-mmc"; reg = <0x1e130000 0x4000>; bus-width = <4>; - max-frequency = <48000000>; - cap-sd-highspeed; - cap-mmc-highspeed; - vmmc-supply = <&mmc_fixed_3v3>; - vqmmc-supply = <&mmc_fixed_1v8_io>; - disable-wp; - pinctrl-names = "default", "state_uhs"; - pinctrl-0 = <&sdhci_pins>; - pinctrl-1 = <&sdhci_pins>; + cap-mmc-highspeed; + cap-sd-highspeed; clocks = <&sysc MT7621_CLK_SHXC>, <&sysc MT7621_CLK_50M>; clock-names = "source", "hclk"; + disable-wp; + interrupt-parent = <&gic>; interrupts = ; + + max-frequency = <48000000>; + + pinctrl-names = "default", "state_uhs"; + pinctrl-0 = <&sdhci_pins>; + pinctrl-1 = <&sdhci_pins>; + + vmmc-supply = <&mmc_fixed_3v3>; + vqmmc-supply = <&mmc_fixed_1v8_io>; + + status = "disabled"; }; usb: usb@1e1c0000 { -- cgit v1.2.3