From 4b6ea87be44ef34732846fc71e44c41125f0c4fa Mon Sep 17 00:00:00 2001 From: Douglas Anderson Date: Tue, 13 Oct 2020 14:25:28 -0700 Subject: soc: qcom: geni: More properly switch to DMA mode On geni-i2c transfers using DMA, it was seen that if you program the command (I2C_READ) before calling geni_se_rx_dma_prep() that it could cause interrupts to fire. If we get unlucky, these interrupts can just keep firing (and not be handled) blocking further progress and hanging the system. In commit 02b9aec59243 ("i2c: i2c-qcom-geni: Fix DMA transfer race") we avoided that by making sure we didn't program the command until after geni_se_rx_dma_prep() was called. While that avoided the problems, it also turns out to be invalid. At least in the TX case we started seeing sporadic corrupted transfers. This is easily seen by adding an msleep() between the DMA prep and the writing of the command, which makes the problem worse. That means we need to revert that commit and find another way to fix the bogus IRQs. Specifically, after reverting commit 02b9aec59243 ("i2c: i2c-qcom-geni: Fix DMA transfer race"), I put some traces in. I found that the when the interrupts were firing like crazy: - "m_stat" had bits for M_RX_IRQ_EN, M_RX_FIFO_WATERMARK_EN set. - "dma" was set. Further debugging showed that I could make the problem happen more reliably by adding an "msleep(1)" any time after geni_se_setup_m_cmd() ran up until geni_se_rx_dma_prep() programmed the length. A rather simple fix is to change geni_se_select_dma_mode() so it's a true inverse of geni_se_select_fifo_mode() and disables all the FIFO related interrupts. Now the problematic interrupts can't fire and we can program things in the correct order without worrying. As part of this, let's also change the writel_relaxed() in the prepare function to a writel() so that our DMA is guaranteed to be prepared now that we can't rely on geni_se_setup_m_cmd()'s writel(). NOTE: the only current user of GENI_SE_DMA in mainline is i2c. Fixes: 37692de5d523 ("i2c: i2c-qcom-geni: Add bus driver for the Qualcomm GENI I2C controller") Fixes: 02b9aec59243 ("i2c: i2c-qcom-geni: Fix DMA transfer race") Signed-off-by: Douglas Anderson Reviewed-by: Stephen Boyd Reviewed-by: Akash Asthana Tested-by: Dmitry Baryshkov Link: https://lore.kernel.org/r/20201013142448.v2.1.Ifdb1b69fa3367b81118e16e9e4e63299980ca798@changeid Signed-off-by: Bjorn Andersson --- drivers/soc/qcom/qcom-geni-se.c | 17 +++++++++++++++-- 1 file changed, 15 insertions(+), 2 deletions(-) diff --git a/drivers/soc/qcom/qcom-geni-se.c b/drivers/soc/qcom/qcom-geni-se.c index d0e4f520cff8..751a49f6534f 100644 --- a/drivers/soc/qcom/qcom-geni-se.c +++ b/drivers/soc/qcom/qcom-geni-se.c @@ -289,10 +289,23 @@ static void geni_se_select_fifo_mode(struct geni_se *se) static void geni_se_select_dma_mode(struct geni_se *se) { + u32 proto = geni_se_read_proto(se); u32 val; geni_se_irq_clear(se); + val = readl_relaxed(se->base + SE_GENI_M_IRQ_EN); + if (proto != GENI_SE_UART) { + val &= ~(M_CMD_DONE_EN | M_TX_FIFO_WATERMARK_EN); + val &= ~(M_RX_FIFO_WATERMARK_EN | M_RX_FIFO_LAST_EN); + } + writel_relaxed(val, se->base + SE_GENI_M_IRQ_EN); + + val = readl_relaxed(se->base + SE_GENI_S_IRQ_EN); + if (proto != GENI_SE_UART) + val &= ~S_CMD_DONE_EN; + writel_relaxed(val, se->base + SE_GENI_S_IRQ_EN); + val = readl_relaxed(se->base + SE_GENI_DMA_MODE_EN); val |= GENI_DMA_MODE_EN; writel_relaxed(val, se->base + SE_GENI_DMA_MODE_EN); @@ -651,7 +664,7 @@ int geni_se_tx_dma_prep(struct geni_se *se, void *buf, size_t len, writel_relaxed(lower_32_bits(*iova), se->base + SE_DMA_TX_PTR_L); writel_relaxed(upper_32_bits(*iova), se->base + SE_DMA_TX_PTR_H); writel_relaxed(GENI_SE_DMA_EOT_BUF, se->base + SE_DMA_TX_ATTR); - writel_relaxed(len, se->base + SE_DMA_TX_LEN); + writel(len, se->base + SE_DMA_TX_LEN); return 0; } EXPORT_SYMBOL(geni_se_tx_dma_prep); @@ -688,7 +701,7 @@ int geni_se_rx_dma_prep(struct geni_se *se, void *buf, size_t len, writel_relaxed(upper_32_bits(*iova), se->base + SE_DMA_RX_PTR_H); /* RX does not have EOT buffer type bit. So just reset RX_ATTR */ writel_relaxed(0, se->base + SE_DMA_RX_ATTR); - writel_relaxed(len, se->base + SE_DMA_RX_LEN); + writel(len, se->base + SE_DMA_RX_LEN); return 0; } EXPORT_SYMBOL(geni_se_rx_dma_prep); -- cgit v1.2.3 From 9cb4c67d7717135d6f4600a49ab07b470ea4ee2f Mon Sep 17 00:00:00 2001 From: Douglas Anderson Date: Tue, 13 Oct 2020 14:25:29 -0700 Subject: Revert "i2c: i2c-qcom-geni: Fix DMA transfer race" This reverts commit 02b9aec59243c6240fc42884acc958602146ddf6. As talked about in the patch ("soc: qcom: geni: More properly switch to DMA mode"), swapping the order of geni_se_setup_m_cmd() and geni_se_xx_dma_prep() can sometimes cause corrupted transfers. Thus we traded one problem for another. Now that we've debugged the problem further and fixed the geni helper functions to more disable FIFO interrupts when we move to DMA mode we can revert it and end up with (hopefully) zero problems! To be explicit, the patch ("soc: qcom: geni: More properly switch to DMA mode") is a prerequisite for this one. Fixes: 02b9aec59243 ("i2c: i2c-qcom-geni: Fix DMA transfer race") Signed-off-by: Douglas Anderson Reviewed-by: Stephen Boyd Reviewed-by: Akash Asthana Tested-by: Dmitry Baryshkov Link: https://lore.kernel.org/r/20201013142448.v2.2.I7b22281453b8a18ab16ef2bfd4c641fb1cc6a92c@changeid Signed-off-by: Bjorn Andersson --- drivers/i2c/busses/i2c-qcom-geni.c | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-) diff --git a/drivers/i2c/busses/i2c-qcom-geni.c b/drivers/i2c/busses/i2c-qcom-geni.c index 8b4c35f47a70..dce75b85253c 100644 --- a/drivers/i2c/busses/i2c-qcom-geni.c +++ b/drivers/i2c/busses/i2c-qcom-geni.c @@ -366,6 +366,7 @@ static int geni_i2c_rx_one_msg(struct geni_i2c_dev *gi2c, struct i2c_msg *msg, geni_se_select_mode(se, GENI_SE_FIFO); writel_relaxed(len, se->base + SE_I2C_RX_TRANS_LEN); + geni_se_setup_m_cmd(se, I2C_READ, m_param); if (dma_buf && geni_se_rx_dma_prep(se, dma_buf, len, &rx_dma)) { geni_se_select_mode(se, GENI_SE_FIFO); @@ -373,8 +374,6 @@ static int geni_i2c_rx_one_msg(struct geni_i2c_dev *gi2c, struct i2c_msg *msg, dma_buf = NULL; } - geni_se_setup_m_cmd(se, I2C_READ, m_param); - time_left = wait_for_completion_timeout(&gi2c->done, XFER_TIMEOUT); if (!time_left) geni_i2c_abort_xfer(gi2c); @@ -408,6 +407,7 @@ static int geni_i2c_tx_one_msg(struct geni_i2c_dev *gi2c, struct i2c_msg *msg, geni_se_select_mode(se, GENI_SE_FIFO); writel_relaxed(len, se->base + SE_I2C_TX_TRANS_LEN); + geni_se_setup_m_cmd(se, I2C_WRITE, m_param); if (dma_buf && geni_se_tx_dma_prep(se, dma_buf, len, &tx_dma)) { geni_se_select_mode(se, GENI_SE_FIFO); @@ -415,8 +415,6 @@ static int geni_i2c_tx_one_msg(struct geni_i2c_dev *gi2c, struct i2c_msg *msg, dma_buf = NULL; } - geni_se_setup_m_cmd(se, I2C_WRITE, m_param); - if (!dma_buf) /* Get FIFO IRQ */ writel_relaxed(1, se->base + SE_GENI_TX_WATERMARK_REG); -- cgit v1.2.3 From 80e8eaab5e98fc013fd4afb4aab1fceeb049cbfd Mon Sep 17 00:00:00 2001 From: Douglas Anderson Date: Tue, 13 Oct 2020 14:25:30 -0700 Subject: soc: qcom: geni: Optimize/comment select fifo/dma mode The functions geni_se_select_fifo_mode() and geni_se_select_fifo_mode() are a little funny. They read/write a bunch of memory mapped registers even if they don't change or aren't relevant for the current protocol. Let's make them a little more sane. We'll also add a comment explaining why we don't do some of the operations for UART. NOTE: there is no evidence at all that this makes any performance difference and it fixes no bugs. However, it seems (to me) like it makes the functions a little easier to understand. Decreasing the amount of times we read/write memory mapped registers is also nice, even if we are using "relaxed" variants. Signed-off-by: Douglas Anderson Link: https://lore.kernel.org/r/20201013142448.v2.3.I646736d3969dc47de8daceb379c6ba85993de9f4@changeid Signed-off-by: Bjorn Andersson --- drivers/soc/qcom/qcom-geni-se.c | 50 ++++++++++++++++++++++++++--------------- 1 file changed, 32 insertions(+), 18 deletions(-) diff --git a/drivers/soc/qcom/qcom-geni-se.c b/drivers/soc/qcom/qcom-geni-se.c index 751a49f6534f..7649b2057b9a 100644 --- a/drivers/soc/qcom/qcom-geni-se.c +++ b/drivers/soc/qcom/qcom-geni-se.c @@ -266,49 +266,63 @@ EXPORT_SYMBOL(geni_se_init); static void geni_se_select_fifo_mode(struct geni_se *se) { u32 proto = geni_se_read_proto(se); - u32 val; + u32 val, val_old; geni_se_irq_clear(se); - val = readl_relaxed(se->base + SE_GENI_M_IRQ_EN); + /* + * The RX path for the UART is asynchronous and so needs more + * complex logic for enabling / disabling its interrupts. + * + * Specific notes: + * - The done and TX-related interrupts are managed manually. + * - We don't RX from the main sequencer (we use the secondary) so + * we don't need the RX-related interrupts enabled in the main + * sequencer for UART. + */ if (proto != GENI_SE_UART) { + val_old = val = readl_relaxed(se->base + SE_GENI_M_IRQ_EN); val |= M_CMD_DONE_EN | M_TX_FIFO_WATERMARK_EN; val |= M_RX_FIFO_WATERMARK_EN | M_RX_FIFO_LAST_EN; - } - writel_relaxed(val, se->base + SE_GENI_M_IRQ_EN); + if (val != val_old) + writel_relaxed(val, se->base + SE_GENI_M_IRQ_EN); - val = readl_relaxed(se->base + SE_GENI_S_IRQ_EN); - if (proto != GENI_SE_UART) + val_old = val = readl_relaxed(se->base + SE_GENI_S_IRQ_EN); val |= S_CMD_DONE_EN; - writel_relaxed(val, se->base + SE_GENI_S_IRQ_EN); + if (val != val_old) + writel_relaxed(val, se->base + SE_GENI_S_IRQ_EN); + } - val = readl_relaxed(se->base + SE_GENI_DMA_MODE_EN); + val_old = val = readl_relaxed(se->base + SE_GENI_DMA_MODE_EN); val &= ~GENI_DMA_MODE_EN; - writel_relaxed(val, se->base + SE_GENI_DMA_MODE_EN); + if (val != val_old) + writel_relaxed(val, se->base + SE_GENI_DMA_MODE_EN); } static void geni_se_select_dma_mode(struct geni_se *se) { u32 proto = geni_se_read_proto(se); - u32 val; + u32 val, val_old; geni_se_irq_clear(se); - val = readl_relaxed(se->base + SE_GENI_M_IRQ_EN); if (proto != GENI_SE_UART) { + val_old = val = readl_relaxed(se->base + SE_GENI_M_IRQ_EN); val &= ~(M_CMD_DONE_EN | M_TX_FIFO_WATERMARK_EN); val &= ~(M_RX_FIFO_WATERMARK_EN | M_RX_FIFO_LAST_EN); - } - writel_relaxed(val, se->base + SE_GENI_M_IRQ_EN); + if (val != val_old) + writel_relaxed(val, se->base + SE_GENI_M_IRQ_EN); - val = readl_relaxed(se->base + SE_GENI_S_IRQ_EN); - if (proto != GENI_SE_UART) + val_old = val = readl_relaxed(se->base + SE_GENI_S_IRQ_EN); val &= ~S_CMD_DONE_EN; - writel_relaxed(val, se->base + SE_GENI_S_IRQ_EN); + if (val != val_old) + writel_relaxed(val, se->base + SE_GENI_S_IRQ_EN); + } - val = readl_relaxed(se->base + SE_GENI_DMA_MODE_EN); + val_old = val = readl_relaxed(se->base + SE_GENI_DMA_MODE_EN); val |= GENI_DMA_MODE_EN; - writel_relaxed(val, se->base + SE_GENI_DMA_MODE_EN); + if (val != val_old) + writel_relaxed(val, se->base + SE_GENI_DMA_MODE_EN); } /** -- cgit v1.2.3 From 46d43ee48d4fed3f8a5c93295f5a414c71a30fd4 Mon Sep 17 00:00:00 2001 From: Alexandre Belloni Date: Wed, 30 Sep 2020 16:56:54 +0200 Subject: i2c: at91: remove legacy DMA left overs Commit dc6df6e90de9 ("i2c: at91: remove legacy DMA support") removed legcy DMA support from the driver. Remove the last use of the definitions from linux/platform_data/dma-atmel.h and stop including this header. Signed-off-by: Alexandre Belloni Reviewed-by: Codrin Ciubotariu [wsa: fixed typo in subject] Signed-off-by: Wolfram Sang --- drivers/i2c/busses/i2c-at91-master.c | 1 - drivers/i2c/busses/i2c-at91.h | 2 -- 2 files changed, 3 deletions(-) diff --git a/drivers/i2c/busses/i2c-at91-master.c b/drivers/i2c/busses/i2c-at91-master.c index 66864f9cf7ac..1cceb6866689 100644 --- a/drivers/i2c/busses/i2c-at91-master.c +++ b/drivers/i2c/busses/i2c-at91-master.c @@ -26,7 +26,6 @@ #include #include #include -#include #include #include "i2c-at91.h" diff --git a/drivers/i2c/busses/i2c-at91.h b/drivers/i2c/busses/i2c-at91.h index eae673ae786c..942e9c3973bb 100644 --- a/drivers/i2c/busses/i2c-at91.h +++ b/drivers/i2c/busses/i2c-at91.h @@ -18,7 +18,6 @@ #include #include #include -#include #include #define AT91_I2C_TIMEOUT msecs_to_jiffies(100) /* transfer timeout */ @@ -123,7 +122,6 @@ struct at91_twi_pdata { bool has_adv_dig_filtr; bool has_ana_filtr; bool has_clear_cmd; - struct at_dma_slave dma_slave; }; struct at91_twi_dma { -- cgit v1.2.3 From b8be24ec67b6374efded49b35a10b84a1b255b30 Mon Sep 17 00:00:00 2001 From: Cristian Ciocaltea Date: Fri, 9 Oct 2020 00:44:40 +0300 Subject: i2c: owl: Add support for atomic transfers Atomic transfers are required to properly power off a machine through an I2C controlled PMIC, such as the Actions Semi ATC260x series. System shutdown may happen with interrupts being disabled and, as a consequence, the kernel may hang if the driver does not support atomic transfers. This functionality is essentially implemented by polling the FIFO Status register until either Command Execute Completed or NACK Error bits are set. Signed-off-by: Cristian Ciocaltea Reviewed-by: Manivannan Sadhasivam [wsa: rebased to current tree] Signed-off-by: Wolfram Sang --- drivers/i2c/busses/i2c-owl.c | 73 ++++++++++++++++++++++++++++++++------------ 1 file changed, 54 insertions(+), 19 deletions(-) diff --git a/drivers/i2c/busses/i2c-owl.c b/drivers/i2c/busses/i2c-owl.c index 9918b2a0b909..de3e107ab8d2 100644 --- a/drivers/i2c/busses/i2c-owl.c +++ b/drivers/i2c/busses/i2c-owl.c @@ -14,6 +14,7 @@ #include #include #include +#include #include #include @@ -76,6 +77,7 @@ #define OWL_I2C_FIFOCTL_TFR BIT(2) /* I2Cc_FIFOSTAT Bit Mask */ +#define OWL_I2C_FIFOSTAT_CECB BIT(0) #define OWL_I2C_FIFOSTAT_RNB BIT(1) #define OWL_I2C_FIFOSTAT_RFE BIT(2) #define OWL_I2C_FIFOSTAT_TFF BIT(5) @@ -83,7 +85,8 @@ #define OWL_I2C_FIFOSTAT_RFD GENMASK(15, 8) /* I2C bus timeout */ -#define OWL_I2C_TIMEOUT msecs_to_jiffies(4 * 1000) +#define OWL_I2C_TIMEOUT_MS (4 * 1000) +#define OWL_I2C_TIMEOUT msecs_to_jiffies(OWL_I2C_TIMEOUT_MS) #define OWL_I2C_MAX_RETRIES 50 @@ -161,14 +164,11 @@ static void owl_i2c_set_freq(struct owl_i2c_dev *i2c_dev) writel(OWL_I2C_DIV_FACTOR(val), i2c_dev->base + OWL_I2C_REG_CLKDIV); } -static irqreturn_t owl_i2c_interrupt(int irq, void *_dev) +static void owl_i2c_xfer_data(struct owl_i2c_dev *i2c_dev) { - struct owl_i2c_dev *i2c_dev = _dev; struct i2c_msg *msg = i2c_dev->msg; unsigned int stat, fifostat; - spin_lock(&i2c_dev->lock); - i2c_dev->err = 0; /* Handle NACK from slave */ @@ -178,7 +178,7 @@ static irqreturn_t owl_i2c_interrupt(int irq, void *_dev) /* Clear NACK error bit by writing "1" */ owl_i2c_update_reg(i2c_dev->base + OWL_I2C_REG_FIFOSTAT, OWL_I2C_FIFOSTAT_RNB, true); - goto stop; + return; } /* Handle bus error */ @@ -188,7 +188,7 @@ static irqreturn_t owl_i2c_interrupt(int irq, void *_dev) /* Clear BUS error bit by writing "1" */ owl_i2c_update_reg(i2c_dev->base + OWL_I2C_REG_STAT, OWL_I2C_STAT_BEB, true); - goto stop; + return; } /* Handle FIFO read */ @@ -206,8 +206,16 @@ static irqreturn_t owl_i2c_interrupt(int irq, void *_dev) i2c_dev->base + OWL_I2C_REG_TXDAT); } } +} + +static irqreturn_t owl_i2c_interrupt(int irq, void *_dev) +{ + struct owl_i2c_dev *i2c_dev = _dev; + + spin_lock(&i2c_dev->lock); + + owl_i2c_xfer_data(i2c_dev); -stop: /* Clear pending interrupts */ owl_i2c_update_reg(i2c_dev->base + OWL_I2C_REG_STAT, OWL_I2C_STAT_IRQP, true); @@ -240,8 +248,8 @@ static int owl_i2c_check_bus_busy(struct i2c_adapter *adap) return 0; } -static int owl_i2c_master_xfer(struct i2c_adapter *adap, struct i2c_msg *msgs, - int num) +static int owl_i2c_xfer_common(struct i2c_adapter *adap, struct i2c_msg *msgs, + int num, bool atomic) { struct owl_i2c_dev *i2c_dev = i2c_get_adapdata(adap); struct i2c_msg *msg; @@ -285,11 +293,12 @@ static int owl_i2c_master_xfer(struct i2c_adapter *adap, struct i2c_msg *msgs, goto err_exit; } - reinit_completion(&i2c_dev->msg_complete); + if (!atomic) + reinit_completion(&i2c_dev->msg_complete); - /* Enable I2C controller interrupt */ + /* Enable/disable I2C controller interrupt */ owl_i2c_update_reg(i2c_dev->base + OWL_I2C_REG_CTL, - OWL_I2C_CTL_IRQE, true); + OWL_I2C_CTL_IRQE, !atomic); /* * Select: FIFO enable, Master mode, Stop enable, Data count enable, @@ -357,20 +366,33 @@ static int owl_i2c_master_xfer(struct i2c_adapter *adap, struct i2c_msg *msgs, spin_unlock_irqrestore(&i2c_dev->lock, flags); - time_left = wait_for_completion_timeout(&i2c_dev->msg_complete, - adap->timeout); + if (atomic) { + /* Wait for Command Execute Completed or NACK Error bits */ + ret = readl_poll_timeout_atomic(i2c_dev->base + OWL_I2C_REG_FIFOSTAT, + val, val & (OWL_I2C_FIFOSTAT_CECB | + OWL_I2C_FIFOSTAT_RNB), + 10, OWL_I2C_TIMEOUT_MS * 1000); + } else { + time_left = wait_for_completion_timeout(&i2c_dev->msg_complete, + adap->timeout); + if (!time_left) + ret = -ETIMEDOUT; + } spin_lock_irqsave(&i2c_dev->lock, flags); - if (time_left == 0) { + + if (ret) { dev_err(&adap->dev, "Transaction timed out\n"); /* Send stop condition and release the bus */ owl_i2c_update_reg(i2c_dev->base + OWL_I2C_REG_CTL, OWL_I2C_CTL_GBCC_STOP | OWL_I2C_CTL_RB, true); - ret = -ETIMEDOUT; goto err_exit; } + if (atomic) + owl_i2c_xfer_data(i2c_dev); + ret = i2c_dev->err < 0 ? i2c_dev->err : num; err_exit: @@ -384,9 +406,22 @@ unlocked_err_exit: return ret; } +static int owl_i2c_xfer(struct i2c_adapter *adap, struct i2c_msg *msgs, + int num) +{ + return owl_i2c_xfer_common(adap, msgs, num, false); +} + +static int owl_i2c_xfer_atomic(struct i2c_adapter *adap, + struct i2c_msg *msgs, int num) +{ + return owl_i2c_xfer_common(adap, msgs, num, true); +} + static const struct i2c_algorithm owl_i2c_algorithm = { - .master_xfer = owl_i2c_master_xfer, - .functionality = owl_i2c_func, + .master_xfer = owl_i2c_xfer, + .master_xfer_atomic = owl_i2c_xfer_atomic, + .functionality = owl_i2c_func, }; static const struct i2c_adapter_quirks owl_i2c_quirks = { -- cgit v1.2.3 From 46f8bfebf3a2ddfe949d45a1b63556de4354e706 Mon Sep 17 00:00:00 2001 From: Cristian Ciocaltea Date: Fri, 9 Oct 2020 00:44:41 +0300 Subject: i2c: owl: Enable asynchronous probing Speed up the boot process by using the asynchronous probing feature supported by the recent kernels. For SBCs based on the Actions Semi S500 SoC, the overall boot time is expected to be reduced by 200-300 ms. Suggested-by: Manivannan Sadhasivam Signed-off-by: Cristian Ciocaltea Reviewed-by: Manivannan Sadhasivam Signed-off-by: Wolfram Sang --- drivers/i2c/busses/i2c-owl.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/i2c/busses/i2c-owl.c b/drivers/i2c/busses/i2c-owl.c index de3e107ab8d2..5cf5a119a6ad 100644 --- a/drivers/i2c/busses/i2c-owl.c +++ b/drivers/i2c/busses/i2c-owl.c @@ -519,6 +519,7 @@ static struct platform_driver owl_i2c_driver = { .driver = { .name = "owl-i2c", .of_match_table = of_match_ptr(owl_i2c_of_match), + .probe_type = PROBE_PREFER_ASYNCHRONOUS, }, }; module_platform_driver(owl_i2c_driver); -- cgit v1.2.3 From eda03fa0279a43b5211485b50686f075bd17e5aa Mon Sep 17 00:00:00 2001 From: Sagar Shrikant Kadam Date: Wed, 21 Oct 2020 07:50:14 -0700 Subject: i2c: ocores: fix polling mode workaround on FU540-C000 SoC The FU540-C000 has a broken IRQ and support was added earlier so that it will operate in polling mode, but seems to work only in case interrupts property is missing from the i2c0 dt-node. This should not be the case and the driver should handle polling mode with the interrupt property present in i2c0 node of the device tree. So check if it's the FU540-C000 soc and enable polling mode master xfers, as the IRQ for this chip is broken. Fixes commit c45d4ba86731 ("i2c: ocores: add polling mode workaround for Sifive FU540-C000 SoC") Signed-off-by: Sagar Shrikant Kadam Acked-by: Peter Korsgaard Signed-off-by: Wolfram Sang --- drivers/i2c/busses/i2c-ocores.c | 23 +++++++++++------------ 1 file changed, 11 insertions(+), 12 deletions(-) diff --git a/drivers/i2c/busses/i2c-ocores.c b/drivers/i2c/busses/i2c-ocores.c index f5fc75b65a19..a97cbaabd308 100644 --- a/drivers/i2c/busses/i2c-ocores.c +++ b/drivers/i2c/busses/i2c-ocores.c @@ -83,7 +83,6 @@ struct ocores_i2c { #define TYPE_OCORES 0 #define TYPE_GRLIB 1 -#define TYPE_SIFIVE_REV0 2 #define OCORES_FLAG_BROKEN_IRQ BIT(1) /* Broken IRQ for FU540-C000 SoC */ @@ -476,11 +475,9 @@ static const struct of_device_id ocores_i2c_match[] = { }, { .compatible = "sifive,fu540-c000-i2c", - .data = (void *)TYPE_SIFIVE_REV0, }, { .compatible = "sifive,i2c0", - .data = (void *)TYPE_SIFIVE_REV0, }, {}, }; @@ -606,7 +603,6 @@ static int ocores_i2c_probe(struct platform_device *pdev) { struct ocores_i2c *i2c; struct ocores_i2c_platform_data *pdata; - const struct of_device_id *match; struct resource *res; int irq; int ret; @@ -687,16 +683,19 @@ static int ocores_i2c_probe(struct platform_device *pdev) init_waitqueue_head(&i2c->wait); irq = platform_get_irq(pdev, 0); + /* + * Since the SoC does have an interrupt, its DT has an interrupt + * property - But this should be bypassed as the IRQ logic in this + * SoC is broken. + */ + if (of_device_is_compatible(pdev->dev.of_node, + "sifive,fu540-c000-i2c")) { + i2c->flags |= OCORES_FLAG_BROKEN_IRQ; + irq = -ENXIO; + } + if (irq == -ENXIO) { ocores_algorithm.master_xfer = ocores_xfer_polling; - - /* - * Set in OCORES_FLAG_BROKEN_IRQ to enable workaround for - * FU540-C000 SoC in polling mode. - */ - match = of_match_node(ocores_i2c_match, pdev->dev.of_node); - if (match && (long)match->data == TYPE_SIFIVE_REV0) - i2c->flags |= OCORES_FLAG_BROKEN_IRQ; } else { if (irq < 0) return irq; -- cgit v1.2.3 From c0164159c2dce4acdd6e9901b3d2fe0995b78430 Mon Sep 17 00:00:00 2001 From: Martin Kaiser Date: Sun, 1 Nov 2020 18:18:05 +0100 Subject: i2c: exynos5: remove duplicate error message platform_get_irq already prints an error message if the requested irq was not found. Don't print another message in the driver. Signed-off-by: Martin Kaiser Reviewed-by: Krzysztof Kozlowski Signed-off-by: Wolfram Sang --- drivers/i2c/busses/i2c-exynos5.c | 1 - 1 file changed, 1 deletion(-) diff --git a/drivers/i2c/busses/i2c-exynos5.c b/drivers/i2c/busses/i2c-exynos5.c index 6ce3ec03b595..c5f5fb28762d 100644 --- a/drivers/i2c/busses/i2c-exynos5.c +++ b/drivers/i2c/busses/i2c-exynos5.c @@ -779,7 +779,6 @@ static int exynos5_i2c_probe(struct platform_device *pdev) i2c->irq = ret = platform_get_irq(pdev, 0); if (ret <= 0) { - dev_err(&pdev->dev, "cannot find HS-I2C IRQ\n"); ret = -EINVAL; goto err_clk; } -- cgit v1.2.3 From 40af583d16465aae2a570e469fc72a5d24438a20 Mon Sep 17 00:00:00 2001 From: Martin Kaiser Date: Sun, 1 Nov 2020 18:18:06 +0100 Subject: i2c: exynos5: fix platform_get_irq error handling If platform_get_irq returns an error, relay this error to the caller of the probe function. Don't change all errors to -EINVAL. This breaks the case where platform_get_irq returns -EPROBE_DEFER. Signed-off-by: Martin Kaiser Reviewed-by: Krzysztof Kozlowski Signed-off-by: Wolfram Sang --- drivers/i2c/busses/i2c-exynos5.c | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) diff --git a/drivers/i2c/busses/i2c-exynos5.c b/drivers/i2c/busses/i2c-exynos5.c index c5f5fb28762d..fad1c52857aa 100644 --- a/drivers/i2c/busses/i2c-exynos5.c +++ b/drivers/i2c/busses/i2c-exynos5.c @@ -778,10 +778,8 @@ static int exynos5_i2c_probe(struct platform_device *pdev) init_completion(&i2c->msg_complete); i2c->irq = ret = platform_get_irq(pdev, 0); - if (ret <= 0) { - ret = -EINVAL; + if (ret <= 0) goto err_clk; - } ret = devm_request_irq(&pdev->dev, i2c->irq, exynos5_i2c_irq, IRQF_NO_SUSPEND, dev_name(&pdev->dev), i2c); -- cgit v1.2.3 From 5df324b5f4baa3a51990f078fa445800197dfba3 Mon Sep 17 00:00:00 2001 From: Martin Kaiser Date: Sun, 1 Nov 2020 18:18:07 +0100 Subject: i2c: exynos5: don't check for irq 0 platform_get_irq never returns 0. Don't check for this. Make it clear that the error path always returns a negative error code. Signed-off-by: Martin Kaiser Reviewed-by: Krzysztof Kozlowski Signed-off-by: Wolfram Sang --- drivers/i2c/busses/i2c-exynos5.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/i2c/busses/i2c-exynos5.c b/drivers/i2c/busses/i2c-exynos5.c index fad1c52857aa..20a9881a0d6c 100644 --- a/drivers/i2c/busses/i2c-exynos5.c +++ b/drivers/i2c/busses/i2c-exynos5.c @@ -778,7 +778,7 @@ static int exynos5_i2c_probe(struct platform_device *pdev) init_completion(&i2c->msg_complete); i2c->irq = ret = platform_get_irq(pdev, 0); - if (ret <= 0) + if (ret < 0) goto err_clk; ret = devm_request_irq(&pdev->dev, i2c->irq, exynos5_i2c_irq, -- cgit v1.2.3 From 9c7cae2427715502227f823364a6a77828fdf3ea Mon Sep 17 00:00:00 2001 From: Mark Tomlinson Date: Thu, 27 Aug 2020 10:35:16 +1200 Subject: i2c: mv64xxx: Add bus error recovery This adds i2c bus recovery to the mv64xxx driver. Implement bus recovery to recover from SCL/SDA stuck low. This uses the generic recovery function, setting the clock/data lines as GPIO pins, and sending 9 clocks to try and recover the bus. Signed-off-by: Mark Tomlinson [wsa: added some curly braces] Signed-off-by: Wolfram Sang --- drivers/i2c/busses/i2c-mv64xxx.c | 29 ++++++++++++++++++++++++++++- 1 file changed, 28 insertions(+), 1 deletion(-) diff --git a/drivers/i2c/busses/i2c-mv64xxx.c b/drivers/i2c/busses/i2c-mv64xxx.c index e0e45fc19b8f..5cfe70aedced 100644 --- a/drivers/i2c/busses/i2c-mv64xxx.c +++ b/drivers/i2c/busses/i2c-mv64xxx.c @@ -17,6 +17,7 @@ #include #include #include +#include #include #include #include @@ -147,6 +148,7 @@ struct mv64xxx_i2c_data { bool irq_clear_inverted; /* Clk div is 2 to the power n, not 2 to the power n + 1 */ bool clk_n_base_0; + struct i2c_bus_recovery_info rinfo; }; static struct mv64xxx_i2c_regs mv64xxx_i2c_regs_mv64xxx = { @@ -325,7 +327,8 @@ mv64xxx_i2c_fsm(struct mv64xxx_i2c_data *drv_data, u32 status) drv_data->msg->flags); drv_data->action = MV64XXX_I2C_ACTION_SEND_STOP; mv64xxx_i2c_hw_init(drv_data); - drv_data->rc = -EIO; + i2c_recover_bus(&drv_data->adapter); + drv_data->rc = -EAGAIN; } } @@ -561,6 +564,7 @@ mv64xxx_i2c_wait_for_completion(struct mv64xxx_i2c_data *drv_data) "time_left: %d\n", drv_data->block, (int)time_left); mv64xxx_i2c_hw_init(drv_data); + i2c_recover_bus(&drv_data->adapter); } } else spin_unlock_irqrestore(&drv_data->lock, flags); @@ -870,6 +874,25 @@ mv64xxx_of_config(struct mv64xxx_i2c_data *drv_data, } #endif /* CONFIG_OF */ +static int mv64xxx_i2c_init_recovery_info(struct mv64xxx_i2c_data *drv_data, + struct device *dev) +{ + struct i2c_bus_recovery_info *rinfo = &drv_data->rinfo; + + rinfo->pinctrl = devm_pinctrl_get(dev); + if (IS_ERR(rinfo->pinctrl)) { + if (PTR_ERR(rinfo->pinctrl) == -EPROBE_DEFER) + return -EPROBE_DEFER; + dev_info(dev, "can't get pinctrl, bus recovery not supported\n"); + return PTR_ERR(rinfo->pinctrl); + } else if (!rinfo->pinctrl) { + return -ENODEV; + } + + drv_data->adapter.bus_recovery_info = rinfo; + return 0; +} + static int mv64xxx_i2c_probe(struct platform_device *pd) { @@ -926,6 +949,10 @@ mv64xxx_i2c_probe(struct platform_device *pd) goto exit_reset; } + rc = mv64xxx_i2c_init_recovery_info(drv_data, &pd->dev); + if (rc == -EPROBE_DEFER) + goto exit_reset; + drv_data->adapter.dev.parent = &pd->dev; drv_data->adapter.algo = &mv64xxx_i2c_algo; drv_data->adapter.owner = THIS_MODULE; -- cgit v1.2.3 From 579f8983c4597ccb0011fa7c5a388c322f4b46ef Mon Sep 17 00:00:00 2001 From: Khalil Blaiech Date: Fri, 20 Nov 2020 18:06:06 -0500 Subject: dt-bindings: i2c: mellanox,i2c-mlxbf: convert txt to YAML schema Write the devicetree binding text file associated with the Mellanox BlueField I2C controller in schema file, JSON compatible subset of YAML. Besides, add an entry within MAINTAINERS file. Signed-off-by: Khalil Blaiech Reviewed-by: Rob Herring Signed-off-by: Wolfram Sang --- .../devicetree/bindings/i2c/mellanox,i2c-mlxbf.txt | 42 ------------ .../bindings/i2c/mellanox,i2c-mlxbf.yaml | 78 ++++++++++++++++++++++ MAINTAINERS | 1 + 3 files changed, 79 insertions(+), 42 deletions(-) delete mode 100644 Documentation/devicetree/bindings/i2c/mellanox,i2c-mlxbf.txt create mode 100644 Documentation/devicetree/bindings/i2c/mellanox,i2c-mlxbf.yaml diff --git a/Documentation/devicetree/bindings/i2c/mellanox,i2c-mlxbf.txt b/Documentation/devicetree/bindings/i2c/mellanox,i2c-mlxbf.txt deleted file mode 100644 index 566ea861aa00..000000000000 --- a/Documentation/devicetree/bindings/i2c/mellanox,i2c-mlxbf.txt +++ /dev/null @@ -1,42 +0,0 @@ -Device tree configuration for the Mellanox I2C SMBus on BlueField SoCs - -Required Properties: - -- compatible : should be "mellanox,i2c-mlxbf1" or "mellanox,i2c-mlxbf2". - -- reg : address offset and length of the device registers. The - registers consist of the following set of resources: - 1) Smbus block registers. - 2) Cause master registers. - 3) Cause slave registers. - 4) Cause coalesce registers (if compatible isn't set - to "mellanox,i2c-mlxbf1"). - -- interrupts : interrupt number. - -Optional Properties: - -- clock-frequency : bus frequency used to configure timing registers; - allowed values are 100000, 400000 and 1000000; - those are expressed in Hz. Default is 100000. - -Example: - -i2c@2804000 { - compatible = "mellanox,i2c-mlxbf1"; - reg = <0x02804000 0x800>, - <0x02801200 0x020>, - <0x02801260 0x020>; - interrupts = <57>; - clock-frequency = <100000>; -}; - -i2c@2808800 { - compatible = "mellanox,i2c-mlxbf2"; - reg = <0x02808800 0x600>, - <0x02808e00 0x020>, - <0x02808e20 0x020>, - <0x02808e40 0x010>; - interrupts = <57>; - clock-frequency = <400000>; -}; diff --git a/Documentation/devicetree/bindings/i2c/mellanox,i2c-mlxbf.yaml b/Documentation/devicetree/bindings/i2c/mellanox,i2c-mlxbf.yaml new file mode 100644 index 000000000000..d2b401d062b9 --- /dev/null +++ b/Documentation/devicetree/bindings/i2c/mellanox,i2c-mlxbf.yaml @@ -0,0 +1,78 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/i2c/mellanox,i2c-mlxbf.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Mellanox I2C SMBus on BlueField SoCs + +maintainers: + - Khalil Blaiech + +allOf: + - $ref: /schemas/i2c/i2c-controller.yaml# + +properties: + compatible: + enum: + - mellanox,i2c-mlxbf1 + - mellanox,i2c-mlxbf2 + + reg: + minItems: 3 + maxItems: 4 + items: + - description: Smbus block registers + - description: Cause master registers + - description: Cause slave registers + - description: Cause coalesce registers + + interrupts: + maxItems: 1 + + clock-frequency: + enum: [ 100000, 400000, 1000000 ] + description: + bus frequency used to configure timing registers; + The frequency is expressed in Hz. Default is 100000. + +required: + - compatible + - reg + - interrupts + +unevaluatedProperties: false + +if: + properties: + compatible: + contains: + enum: + - mellanox,i2c-mlxbf1 + +then: + properties: + reg: + maxItems: 3 + +examples: + - | + i2c@2804000 { + compatible = "mellanox,i2c-mlxbf1"; + reg = <0x02804000 0x800>, + <0x02801200 0x020>, + <0x02801260 0x020>; + interrupts = <57>; + clock-frequency = <100000>; + }; + + - | + i2c@2808800 { + compatible = "mellanox,i2c-mlxbf2"; + reg = <0x02808800 0x600>, + <0x02808e00 0x020>, + <0x02808e20 0x020>, + <0x02808e40 0x010>; + interrupts = <57>; + clock-frequency = <400000>; + }; diff --git a/MAINTAINERS b/MAINTAINERS index b516bb34a8d5..b2b505ff31f5 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -11166,6 +11166,7 @@ MELLANOX BLUEFIELD I2C DRIVER M: Khalil Blaiech L: linux-i2c@vger.kernel.org S: Supported +F: Documentation/devicetree/bindings/i2c/mellanox,i2c-mlxbf.yaml F: drivers/i2c/busses/i2c-mlxbf.c MELLANOX ETHERNET DRIVER (mlx4_en) -- cgit v1.2.3 From b4ff421f123ebc16b4c8cb4474485be29812b5ed Mon Sep 17 00:00:00 2001 From: Vaibhav Gupta Date: Sat, 7 Nov 2020 13:51:51 +0530 Subject: i2c: nvidia-gpu: drop empty stub for runtime pm After the commit c5eb1190074c ("PCI / PM: Allow runtime PM without callback functions") we no more need empty stubs for runtime-pm to work. The driver has no device specific task(s) for .suspend() . The stub was placed just for runtime-pm, which can be dropped now. Reported-by: Bjorn Helgaas Signed-off-by: Vaibhav Gupta Reviewed-by: Jarkko Nikula Signed-off-by: Wolfram Sang --- drivers/i2c/busses/i2c-nvidia-gpu.c | 10 +--------- 1 file changed, 1 insertion(+), 9 deletions(-) diff --git a/drivers/i2c/busses/i2c-nvidia-gpu.c b/drivers/i2c/busses/i2c-nvidia-gpu.c index f9a69b109e5c..6b20601ffb13 100644 --- a/drivers/i2c/busses/i2c-nvidia-gpu.c +++ b/drivers/i2c/busses/i2c-nvidia-gpu.c @@ -353,15 +353,7 @@ static void gpu_i2c_remove(struct pci_dev *pdev) pci_free_irq_vectors(pdev); } -/* - * We need gpu_i2c_suspend() even if it is stub, for runtime pm to work - * correctly. Without it, lspci shows runtime pm status as "D0" for the card. - * Documentation/power/pci.rst also insists for driver to provide this. - */ -static __maybe_unused int gpu_i2c_suspend(struct device *dev) -{ - return 0; -} +#define gpu_i2c_suspend NULL static __maybe_unused int gpu_i2c_resume(struct device *dev) { -- cgit v1.2.3 From c610199cd392e6e2d41811ef83d85355c1b862b3 Mon Sep 17 00:00:00 2001 From: Fabio Estevam Date: Mon, 16 Nov 2020 17:29:10 -0300 Subject: i2c: imx: Remove unused .id_table support MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Since 5.10-rc1 i.MX is a devicetree-only platform and the existing .id_table support in this driver was only useful for old non-devicetree platforms. Signed-off-by: Fabio Estevam Acked-by: Uwe Kleine-König Signed-off-by: Wolfram Sang --- drivers/i2c/busses/i2c-imx.c | 20 +------------------- 1 file changed, 1 insertion(+), 19 deletions(-) diff --git a/drivers/i2c/busses/i2c-imx.c b/drivers/i2c/busses/i2c-imx.c index c98529c76348..ebf66120c51e 100644 --- a/drivers/i2c/busses/i2c-imx.c +++ b/drivers/i2c/busses/i2c-imx.c @@ -233,19 +233,6 @@ static struct imx_i2c_hwdata vf610_i2c_hwdata = { }; -static const struct platform_device_id imx_i2c_devtype[] = { - { - .name = "imx1-i2c", - .driver_data = (kernel_ulong_t)&imx1_i2c_hwdata, - }, { - .name = "imx21-i2c", - .driver_data = (kernel_ulong_t)&imx21_i2c_hwdata, - }, { - /* sentinel */ - } -}; -MODULE_DEVICE_TABLE(platform, imx_i2c_devtype); - static const struct of_device_id i2c_imx_dt_ids[] = { { .compatible = "fsl,imx1-i2c", .data = &imx1_i2c_hwdata, }, { .compatible = "fsl,imx21-i2c", .data = &imx21_i2c_hwdata, }, @@ -1141,11 +1128,7 @@ static int i2c_imx_probe(struct platform_device *pdev) return -ENOMEM; match = device_get_match_data(&pdev->dev); - if (match) - i2c_imx->hwdata = match; - else - i2c_imx->hwdata = (struct imx_i2c_hwdata *) - platform_get_device_id(pdev)->driver_data; + i2c_imx->hwdata = match; /* Setup i2c_imx driver structure */ strlcpy(i2c_imx->adapter.name, pdev->name, sizeof(i2c_imx->adapter.name)); @@ -1316,7 +1299,6 @@ static struct platform_driver i2c_imx_driver = { .of_match_table = i2c_imx_dt_ids, .acpi_match_table = i2c_imx_acpi_ids, }, - .id_table = imx_i2c_devtype, }; static int __init i2c_adap_imx_init(void) -- cgit v1.2.3 From 83eb65b6ac7cd17ba87e5ebd15cd44f4034ccf3d Mon Sep 17 00:00:00 2001 From: Uwe Kleine-König Date: Mon, 23 Nov 2020 21:27:46 +0100 Subject: i2c: pca-platform: drop two members from driver data that are assigned to only MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit io_base and io_size are assigned to only in .probe() and otherwise unused. Signed-off-by: Uwe Kleine-König Signed-off-by: Wolfram Sang --- drivers/i2c/busses/i2c-pca-platform.c | 4 ---- 1 file changed, 4 deletions(-) diff --git a/drivers/i2c/busses/i2c-pca-platform.c b/drivers/i2c/busses/i2c-pca-platform.c index 546426a470cc..86d4f75ef8d3 100644 --- a/drivers/i2c/busses/i2c-pca-platform.c +++ b/drivers/i2c/busses/i2c-pca-platform.c @@ -33,8 +33,6 @@ struct i2c_pca_pf_data { wait_queue_head_t wait; struct i2c_adapter adap; struct i2c_algo_pca_data algo_data; - unsigned long io_base; - unsigned long io_size; }; /* Read/Write functions for different register alignments */ @@ -156,8 +154,6 @@ static int i2c_pca_pf_probe(struct platform_device *pdev) init_waitqueue_head(&i2c->wait); - i2c->io_base = res->start; - i2c->io_size = resource_size(res); i2c->irq = irq; i2c->adap.nr = pdev->id; -- cgit v1.2.3 From c32abd8b569144b20c9c9b6dd7232828c612452f Mon Sep 17 00:00:00 2001 From: Fabio Estevam Date: Mon, 23 Nov 2020 21:28:49 -0300 Subject: i2c: mxs: Remove unneeded platform_device_id The i2c-mxs driver only runs on DT-platform and there is no need to use the platform_device_id structure to pass the driver data. Get rid of it to make the code simpler. Signed-off-by: Fabio Estevam Reported-by: kernel test robot Signed-off-by: Wolfram Sang --- drivers/i2c/busses/i2c-mxs.c | 22 +++------------------- 1 file changed, 3 insertions(+), 19 deletions(-) diff --git a/drivers/i2c/busses/i2c-mxs.c b/drivers/i2c/busses/i2c-mxs.c index c4b08a924461..f97243f02231 100644 --- a/drivers/i2c/busses/i2c-mxs.c +++ b/drivers/i2c/busses/i2c-mxs.c @@ -781,28 +781,15 @@ static int mxs_i2c_get_ofdata(struct mxs_i2c_dev *i2c) return 0; } -static const struct platform_device_id mxs_i2c_devtype[] = { - { - .name = "imx23-i2c", - .driver_data = MXS_I2C_V1, - }, { - .name = "imx28-i2c", - .driver_data = MXS_I2C_V2, - }, { /* sentinel */ } -}; -MODULE_DEVICE_TABLE(platform, mxs_i2c_devtype); - static const struct of_device_id mxs_i2c_dt_ids[] = { - { .compatible = "fsl,imx23-i2c", .data = &mxs_i2c_devtype[0], }, - { .compatible = "fsl,imx28-i2c", .data = &mxs_i2c_devtype[1], }, + { .compatible = "fsl,imx23-i2c", .data = (void *)MXS_I2C_V1, }, + { .compatible = "fsl,imx28-i2c", .data = (void *)MXS_I2C_V2, }, { /* sentinel */ } }; MODULE_DEVICE_TABLE(of, mxs_i2c_dt_ids); static int mxs_i2c_probe(struct platform_device *pdev) { - const struct of_device_id *of_id = - of_match_device(mxs_i2c_dt_ids, &pdev->dev); struct device *dev = &pdev->dev; struct mxs_i2c_dev *i2c; struct i2c_adapter *adap; @@ -812,10 +799,7 @@ static int mxs_i2c_probe(struct platform_device *pdev) if (!i2c) return -ENOMEM; - if (of_id) { - const struct platform_device_id *device_id = of_id->data; - i2c->dev_type = device_id->driver_data; - } + i2c->dev_type = (enum mxs_i2c_devtype)of_device_get_match_data(&pdev->dev); i2c->regs = devm_platform_ioremap_resource(pdev, 0); if (IS_ERR(i2c->regs)) -- cgit v1.2.3 From 70f16fab5272bfc5b83c24bc1a8e877697bf17cc Mon Sep 17 00:00:00 2001 From: Bjorn Andersson Date: Tue, 24 Nov 2020 12:57:43 -0600 Subject: Revert "i2c: qcom-geni: Disable DMA processing on the Lenovo Yoga C630" A combination of recent bug fixes by Doug Anderson and the proper definition of iommu streams means that this hack is no longer needed. Let's clean up the code by reverting '127068abe85b ("i2c: qcom-geni: Disable DMA processing on the Lenovo Yoga C630")'. Signed-off-by: Bjorn Andersson Acked-by: Shawn Guo Acked-by: Caleb Connolly Tested-by: Steev Klimaszewski Reviewed-by: Akash Asthana Signed-off-by: Wolfram Sang --- drivers/i2c/busses/i2c-qcom-geni.c | 12 ++++-------- 1 file changed, 4 insertions(+), 8 deletions(-) diff --git a/drivers/i2c/busses/i2c-qcom-geni.c b/drivers/i2c/busses/i2c-qcom-geni.c index dce75b85253c..046d241183c5 100644 --- a/drivers/i2c/busses/i2c-qcom-geni.c +++ b/drivers/i2c/busses/i2c-qcom-geni.c @@ -353,13 +353,11 @@ static int geni_i2c_rx_one_msg(struct geni_i2c_dev *gi2c, struct i2c_msg *msg, { dma_addr_t rx_dma; unsigned long time_left; - void *dma_buf = NULL; + void *dma_buf; struct geni_se *se = &gi2c->se; size_t len = msg->len; - if (!of_machine_is_compatible("lenovo,yoga-c630")) - dma_buf = i2c_get_dma_safe_msg_buf(msg, 32); - + dma_buf = i2c_get_dma_safe_msg_buf(msg, 32); if (dma_buf) geni_se_select_mode(se, GENI_SE_DMA); else @@ -394,13 +392,11 @@ static int geni_i2c_tx_one_msg(struct geni_i2c_dev *gi2c, struct i2c_msg *msg, { dma_addr_t tx_dma; unsigned long time_left; - void *dma_buf = NULL; + void *dma_buf; struct geni_se *se = &gi2c->se; size_t len = msg->len; - if (!of_machine_is_compatible("lenovo,yoga-c630")) - dma_buf = i2c_get_dma_safe_msg_buf(msg, 32); - + dma_buf = i2c_get_dma_safe_msg_buf(msg, 32); if (dma_buf) geni_se_select_mode(se, GENI_SE_DMA); else -- cgit v1.2.3 From dc4e10b62695558a39aafa65210f5980125285b3 Mon Sep 17 00:00:00 2001 From: Stefan Lässer Date: Thu, 3 Dec 2020 16:02:52 +0100 Subject: i2c: ocores: Avoid false-positive error log message. MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Since commit 7723f4c5ecdb ("driver core: platform: Add an error message to platform_get_irq*()"), platform_get_irq() will call dev_err() on an error. In case of i2c ocores this leads to a false-positive error being logged: [ 4.173989] 007: ocores-i2c ocores-i2c: IRQ index 0 not found i2c ocores already handles the case when the IRQ cannot be found and therefore there is no benefit in having this error message being logged. This commit switches to platform_get_irq_optional(), which does not log in case the IRQ cannot be found. Signed-off-by: Stefan Lässer Reviewed-by: Andrew Lunn Reviewed-by: Peter Korsgaard Signed-off-by: Wolfram Sang --- drivers/i2c/busses/i2c-ocores.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/i2c/busses/i2c-ocores.c b/drivers/i2c/busses/i2c-ocores.c index a97cbaabd308..273222e38056 100644 --- a/drivers/i2c/busses/i2c-ocores.c +++ b/drivers/i2c/busses/i2c-ocores.c @@ -682,7 +682,7 @@ static int ocores_i2c_probe(struct platform_device *pdev) init_waitqueue_head(&i2c->wait); - irq = platform_get_irq(pdev, 0); + irq = platform_get_irq_optional(pdev, 0); /* * Since the SoC does have an interrupt, its DT has an interrupt * property - But this should be bypassed as the IRQ logic in this -- cgit v1.2.3 From 5e9a97b1f4491b8b65874901ad084348fcaba327 Mon Sep 17 00:00:00 2001 From: Mario Alejandro Posso Escobar Date: Mon, 16 Nov 2020 17:32:45 +0200 Subject: i2c: ismt: Adding support for I2C_SMBUS_BLOCK_PROC_CALL Expand the driver to support I2C_SMBUS_BLOCK_PROC_CALL since HW supports it already. Co-developed-by: Andy Shevchenko Signed-off-by: Andy Shevchenko Signed-off-by: Mario Alejandro Posso Escobar Signed-off-by: Wolfram Sang --- drivers/i2c/busses/i2c-ismt.c | 19 +++++++++++++++++-- 1 file changed, 17 insertions(+), 2 deletions(-) diff --git a/drivers/i2c/busses/i2c-ismt.c b/drivers/i2c/busses/i2c-ismt.c index a35a27c320e7..a6187cbec2c9 100644 --- a/drivers/i2c/busses/i2c-ismt.c +++ b/drivers/i2c/busses/i2c-ismt.c @@ -53,7 +53,7 @@ * Features supported by this driver: * Hardware PEC yes * Block buffer yes - * Block process call transaction no + * Block process call transaction yes * Slave mode no */ @@ -332,7 +332,8 @@ static int ismt_process_desc(const struct ismt_desc *desc, if (desc->status & ISMT_DESC_SCS) { if (read_write == I2C_SMBUS_WRITE && - size != I2C_SMBUS_PROC_CALL) + size != I2C_SMBUS_PROC_CALL && + size != I2C_SMBUS_BLOCK_PROC_CALL) return 0; switch (size) { @@ -345,6 +346,7 @@ static int ismt_process_desc(const struct ismt_desc *desc, data->word = dma_buffer[0] | (dma_buffer[1] << 8); break; case I2C_SMBUS_BLOCK_DATA: + case I2C_SMBUS_BLOCK_PROC_CALL: if (desc->rxbytes != dma_buffer[0] + 1) return -EMSGSIZE; @@ -518,6 +520,18 @@ static int ismt_access(struct i2c_adapter *adap, u16 addr, } break; + case I2C_SMBUS_BLOCK_PROC_CALL: + dev_dbg(dev, "I2C_SMBUS_BLOCK_PROC_CALL\n"); + dma_size = I2C_SMBUS_BLOCK_MAX; + desc->tgtaddr_rw = ISMT_DESC_ADDR_RW(addr, 1); + desc->wr_len_cmd = data->block[0] + 1; + desc->rd_len = dma_size; + desc->control |= ISMT_DESC_BLK; + dma_direction = DMA_BIDIRECTIONAL; + dma_buffer[0] = command; + memcpy(&dma_buffer[1], &data->block[1], data->block[0]); + break; + case I2C_SMBUS_I2C_BLOCK_DATA: /* Make sure the length is valid */ if (data->block[0] < 1) @@ -624,6 +638,7 @@ static u32 ismt_func(struct i2c_adapter *adap) I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_WORD_DATA | I2C_FUNC_SMBUS_PROC_CALL | + I2C_FUNC_SMBUS_BLOCK_PROC_CALL | I2C_FUNC_SMBUS_BLOCK_DATA | I2C_FUNC_SMBUS_I2C_BLOCK | I2C_FUNC_SMBUS_PEC; -- cgit v1.2.3 From f7414cd6923fd7f78e57086fc964ba2dc25db5c1 Mon Sep 17 00:00:00 2001 From: Biwen Li Date: Wed, 11 Nov 2020 19:32:55 +0800 Subject: i2c: imx: support slave mode for imx I2C driver The patch supports slave mode for imx I2C driver Signed-off-by: Biwen Li Acked-by: Oleksij Rempel Signed-off-by: Wolfram Sang --- drivers/i2c/busses/Kconfig | 1 + drivers/i2c/busses/i2c-imx.c | 219 ++++++++++++++++++++++++++++++++++++++----- 2 files changed, 196 insertions(+), 24 deletions(-) diff --git a/drivers/i2c/busses/Kconfig b/drivers/i2c/busses/Kconfig index a49e0ed4a599..d4d60ad0eda0 100644 --- a/drivers/i2c/busses/Kconfig +++ b/drivers/i2c/busses/Kconfig @@ -675,6 +675,7 @@ config I2C_IMG config I2C_IMX tristate "IMX I2C interface" depends on ARCH_MXC || ARCH_LAYERSCAPE || COLDFIRE + select I2C_SLAVE help Say Y here if you want to use the IIC bus controller on the Freescale i.MX/MXC, Layerscape or ColdFire processors. diff --git a/drivers/i2c/busses/i2c-imx.c b/drivers/i2c/busses/i2c-imx.c index a04d17c28339..b444fbf1a262 100644 --- a/drivers/i2c/busses/i2c-imx.c +++ b/drivers/i2c/busses/i2c-imx.c @@ -17,6 +17,7 @@ * Copyright (C) 2008 Darius Augulis * * Copyright 2013 Freescale Semiconductor, Inc. + * Copyright 2020 NXP * */ @@ -73,6 +74,11 @@ #define IMX_I2C_I2SR 0x03 /* i2c status */ #define IMX_I2C_I2DR 0x04 /* i2c transfer data */ +/* + * All of the layerscape series SoCs support IBIC register. + */ +#define IMX_I2C_IBIC 0x05 /* i2c bus interrupt config */ + #define IMX_I2C_REGSHIFT 2 #define VF610_I2C_REGSHIFT 0 @@ -91,6 +97,7 @@ #define I2CR_MSTA 0x20 #define I2CR_IIEN 0x40 #define I2CR_IEN 0x80 +#define IBIC_BIIE 0x80 /* Bus idle interrupt enable */ /* register bits different operating codes definition: * 1) I2SR: Interrupt flags clear operation differ between SoCs: @@ -201,6 +208,7 @@ struct imx_i2c_struct { struct pinctrl_state *pinctrl_pins_gpio; struct imx_i2c_dma *dma; + struct i2c_client *slave; }; static const struct imx_i2c_hwdata imx1_i2c_hwdata = { @@ -252,6 +260,11 @@ static inline int is_imx1_i2c(struct imx_i2c_struct *i2c_imx) return i2c_imx->hwdata->devtype == IMX1_I2C; } +static inline int is_vf610_i2c(struct imx_i2c_struct *i2c_imx) +{ + return i2c_imx->hwdata->devtype == VF610_I2C; +} + static inline void imx_i2c_write_reg(unsigned int val, struct imx_i2c_struct *i2c_imx, unsigned int reg) { @@ -264,6 +277,27 @@ static inline unsigned char imx_i2c_read_reg(struct imx_i2c_struct *i2c_imx, return readb(i2c_imx->base + (reg << i2c_imx->hwdata->regshift)); } +static void i2c_imx_clear_irq(struct imx_i2c_struct *i2c_imx, unsigned int bits) +{ + unsigned int temp; + + /* + * i2sr_clr_opcode is the value to clear all interrupts. Here we want to + * clear only , so we write ~i2sr_clr_opcode with just + * toggled. This is required because i.MX needs W0C and Vybrid uses W1C. + */ + temp = ~i2c_imx->hwdata->i2sr_clr_opcode ^ bits; + imx_i2c_write_reg(temp, i2c_imx, IMX_I2C_I2SR); +} + +/* Set up i2c controller register and i2c status register to default value. */ +static void i2c_imx_reset_regs(struct imx_i2c_struct *i2c_imx) +{ + imx_i2c_write_reg(i2c_imx->hwdata->i2cr_ien_opcode ^ I2CR_IEN, + i2c_imx, IMX_I2C_I2CR); + i2c_imx_clear_irq(i2c_imx, I2SR_IIF | I2SR_IAL); +} + /* Functions for DMA support */ static void i2c_imx_dma_request(struct imx_i2c_struct *i2c_imx, dma_addr_t phy_addr) @@ -399,19 +433,6 @@ static void i2c_imx_dma_free(struct imx_i2c_struct *i2c_imx) dma->chan_using = NULL; } -static void i2c_imx_clear_irq(struct imx_i2c_struct *i2c_imx, unsigned int bits) -{ - unsigned int temp; - - /* - * i2sr_clr_opcode is the value to clear all interrupts. Here we want to - * clear only , so we write ~i2sr_clr_opcode with just - * toggled. This is required because i.MX needs W0C and Vybrid uses W1C. - */ - temp = ~i2c_imx->hwdata->i2sr_clr_opcode ^ bits; - imx_i2c_write_reg(temp, i2c_imx, IMX_I2C_I2SR); -} - static int i2c_imx_bus_busy(struct imx_i2c_struct *i2c_imx, int for_busy, bool atomic) { unsigned long orig_jiffies = jiffies; @@ -625,18 +646,165 @@ static void i2c_imx_stop(struct imx_i2c_struct *i2c_imx, bool atomic) imx_i2c_write_reg(temp, i2c_imx, IMX_I2C_I2CR); } +/* + * Enable bus idle interrupts + * Note: IBIC register will be cleared after disabled i2c module. + * All of layerscape series SoCs support IBIC register. + */ +static void i2c_imx_enable_bus_idle(struct imx_i2c_struct *i2c_imx) +{ + if (is_vf610_i2c(i2c_imx)) { + unsigned int temp; + + temp = imx_i2c_read_reg(i2c_imx, IMX_I2C_IBIC); + temp |= IBIC_BIIE; + imx_i2c_write_reg(temp, i2c_imx, IMX_I2C_IBIC); + } +} + +static irqreturn_t i2c_imx_slave_isr(struct imx_i2c_struct *i2c_imx, + unsigned int status, unsigned int ctl) +{ + u8 value; + + if (status & I2SR_IAL) { /* Arbitration lost */ + i2c_imx_clear_irq(i2c_imx, I2SR_IAL); + if (!(status & I2SR_IAAS)) + return IRQ_HANDLED; + } + + if (status & I2SR_IAAS) { /* Addressed as a slave */ + if (status & I2SR_SRW) { /* Master wants to read from us*/ + dev_dbg(&i2c_imx->adapter.dev, "read requested"); + i2c_slave_event(i2c_imx->slave, I2C_SLAVE_READ_REQUESTED, &value); + + /* Slave transmit */ + ctl |= I2CR_MTX; + imx_i2c_write_reg(ctl, i2c_imx, IMX_I2C_I2CR); + + /* Send data */ + imx_i2c_write_reg(value, i2c_imx, IMX_I2C_I2DR); + } else { /* Master wants to write to us */ + dev_dbg(&i2c_imx->adapter.dev, "write requested"); + i2c_slave_event(i2c_imx->slave, I2C_SLAVE_WRITE_REQUESTED, &value); + + /* Slave receive */ + ctl &= ~I2CR_MTX; + imx_i2c_write_reg(ctl, i2c_imx, IMX_I2C_I2CR); + /* Dummy read */ + imx_i2c_read_reg(i2c_imx, IMX_I2C_I2DR); + } + } else if (!(ctl & I2CR_MTX)) { /* Receive mode */ + if (status & I2SR_IBB) { /* No STOP signal detected */ + value = imx_i2c_read_reg(i2c_imx, IMX_I2C_I2DR); + i2c_slave_event(i2c_imx->slave, I2C_SLAVE_WRITE_RECEIVED, &value); + } else { /* STOP signal is detected */ + dev_dbg(&i2c_imx->adapter.dev, + "STOP signal detected"); + i2c_slave_event(i2c_imx->slave, I2C_SLAVE_STOP, &value); + } + } else if (!(status & I2SR_RXAK)) { /* Transmit mode received ACK */ + ctl |= I2CR_MTX; + imx_i2c_write_reg(ctl, i2c_imx, IMX_I2C_I2CR); + + i2c_slave_event(i2c_imx->slave, I2C_SLAVE_READ_PROCESSED, &value); + + imx_i2c_write_reg(value, i2c_imx, IMX_I2C_I2DR); + } else { /* Transmit mode received NAK */ + ctl &= ~I2CR_MTX; + imx_i2c_write_reg(ctl, i2c_imx, IMX_I2C_I2CR); + imx_i2c_read_reg(i2c_imx, IMX_I2C_I2DR); + } + + return IRQ_HANDLED; +} + +static void i2c_imx_slave_init(struct imx_i2c_struct *i2c_imx) +{ + int temp; + + /* Set slave addr. */ + imx_i2c_write_reg((i2c_imx->slave->addr << 1), i2c_imx, IMX_I2C_IADR); + + i2c_imx_reset_regs(i2c_imx); + + /* Enable module */ + temp = i2c_imx->hwdata->i2cr_ien_opcode; + imx_i2c_write_reg(temp, i2c_imx, IMX_I2C_I2CR); + + /* Enable interrupt from i2c module */ + temp |= I2CR_IIEN; + imx_i2c_write_reg(temp, i2c_imx, IMX_I2C_I2CR); + + i2c_imx_enable_bus_idle(i2c_imx); +} + +static int i2c_imx_reg_slave(struct i2c_client *client) +{ + struct imx_i2c_struct *i2c_imx = i2c_get_adapdata(client->adapter); + int ret; + + if (i2c_imx->slave) + return -EBUSY; + + i2c_imx->slave = client; + + /* Resume */ + ret = pm_runtime_get_sync(i2c_imx->adapter.dev.parent); + if (ret < 0) { + dev_err(&i2c_imx->adapter.dev, "failed to resume i2c controller"); + return ret; + } + + i2c_imx_slave_init(i2c_imx); + + return 0; +} + +static int i2c_imx_unreg_slave(struct i2c_client *client) +{ + struct imx_i2c_struct *i2c_imx = i2c_get_adapdata(client->adapter); + int ret; + + if (!i2c_imx->slave) + return -EINVAL; + + /* Reset slave address. */ + imx_i2c_write_reg(0, i2c_imx, IMX_I2C_IADR); + + i2c_imx_reset_regs(i2c_imx); + + i2c_imx->slave = NULL; + + /* Suspend */ + ret = pm_runtime_put_sync(i2c_imx->adapter.dev.parent); + if (ret < 0) + dev_err(&i2c_imx->adapter.dev, "failed to suspend i2c controller"); + + return ret; +} + +static irqreturn_t i2c_imx_master_isr(struct imx_i2c_struct *i2c_imx, unsigned int status) +{ + /* save status register */ + i2c_imx->i2csr = status; + wake_up(&i2c_imx->queue); + + return IRQ_HANDLED; +} + static irqreturn_t i2c_imx_isr(int irq, void *dev_id) { struct imx_i2c_struct *i2c_imx = dev_id; - unsigned int temp; + unsigned int ctl, status; - temp = imx_i2c_read_reg(i2c_imx, IMX_I2C_I2SR); - if (temp & I2SR_IIF) { - /* save status register */ - i2c_imx->i2csr = temp; + status = imx_i2c_read_reg(i2c_imx, IMX_I2C_I2SR); + ctl = imx_i2c_read_reg(i2c_imx, IMX_I2C_I2CR); + if (status & I2SR_IIF) { i2c_imx_clear_irq(i2c_imx, I2SR_IIF); - wake_up(&i2c_imx->queue); - return IRQ_HANDLED; + if (i2c_imx->slave && !(ctl & I2CR_MSTA)) + return i2c_imx_slave_isr(i2c_imx, status, ctl); + return i2c_imx_master_isr(i2c_imx, status); } return IRQ_NONE; @@ -1014,6 +1182,10 @@ fail0: dev_dbg(&i2c_imx->adapter.dev, "<%s> exit with: %s: %d\n", __func__, (result < 0) ? "error" : "success msg", (result < 0) ? result : num); + /* After data is transferred, switch to slave mode(as a receiver) */ + if (i2c_imx->slave) + i2c_imx_slave_init(i2c_imx); + return (result < 0) ? result : num; } @@ -1127,6 +1299,8 @@ static const struct i2c_algorithm i2c_imx_algo = { .master_xfer = i2c_imx_xfer, .master_xfer_atomic = i2c_imx_xfer_atomic, .functionality = i2c_imx_func, + .reg_slave = i2c_imx_reg_slave, + .unreg_slave = i2c_imx_unreg_slave, }; static int i2c_imx_probe(struct platform_device *pdev) @@ -1216,10 +1390,7 @@ static int i2c_imx_probe(struct platform_device *pdev) clk_notifier_register(i2c_imx->clk, &i2c_imx->clk_change_nb); i2c_imx_set_clk(i2c_imx, clk_get_rate(i2c_imx->clk)); - /* Set up chip registers to defaults */ - imx_i2c_write_reg(i2c_imx->hwdata->i2cr_ien_opcode ^ I2CR_IEN, - i2c_imx, IMX_I2C_I2CR); - imx_i2c_write_reg(i2c_imx->hwdata->i2sr_clr_opcode, i2c_imx, IMX_I2C_I2SR); + i2c_imx_reset_regs(i2c_imx); /* Init optional bus recovery function */ ret = i2c_imx_init_recovery_info(i2c_imx, pdev); -- cgit v1.2.3 From 730f205190a15439c8896f420cde6bbe50c454c2 Mon Sep 17 00:00:00 2001 From: Cristian Ciocaltea Date: Fri, 20 Nov 2020 01:56:04 +0200 Subject: dt-bindings: i2c: owl: Convert Actions Semi Owl binding to a schema Convert the Actions Semi Owl I2C DT binding to a YAML schema for enabling DT validation. Additionally, add a new compatible string corresponding to the I2C controller found in the S500 variant of the Actions Semi Owl SoCs family. Signed-off-by: Cristian Ciocaltea Reviewed-by: Rob Herring Signed-off-by: Wolfram Sang --- Documentation/devicetree/bindings/i2c/i2c-owl.txt | 29 ---------- Documentation/devicetree/bindings/i2c/i2c-owl.yaml | 62 ++++++++++++++++++++++ MAINTAINERS | 2 +- 3 files changed, 63 insertions(+), 30 deletions(-) delete mode 100644 Documentation/devicetree/bindings/i2c/i2c-owl.txt create mode 100644 Documentation/devicetree/bindings/i2c/i2c-owl.yaml diff --git a/Documentation/devicetree/bindings/i2c/i2c-owl.txt b/Documentation/devicetree/bindings/i2c/i2c-owl.txt deleted file mode 100644 index 54c05dbdb2e4..000000000000 --- a/Documentation/devicetree/bindings/i2c/i2c-owl.txt +++ /dev/null @@ -1,29 +0,0 @@ -Actions Semiconductor Owl I2C controller - -Required properties: - -- compatible : Should be one of the following: - - "actions,s700-i2c" for S700 SoC - - "actions,s900-i2c" for S900 SoC -- reg : Offset and length of the register set for the device. -- #address-cells : Should be 1. -- #size-cells : Should be 0. -- interrupts : A single interrupt specifier. -- clocks : Phandle of the clock feeding the I2C controller. - -Optional properties: - -- clock-frequency : Desired I2C bus clock frequency in Hz. As only Normal and - Fast modes are supported, possible values are 100000 and - 400000. -Examples: - - i2c0: i2c@e0170000 { - compatible = "actions,s900-i2c"; - reg = <0 0xe0170000 0 0x1000>; - #address-cells = <1>; - #size-cells = <0>; - interrupts = ; - clocks = <&clock CLK_I2C0>; - clock-frequency = <100000>; - }; diff --git a/Documentation/devicetree/bindings/i2c/i2c-owl.yaml b/Documentation/devicetree/bindings/i2c/i2c-owl.yaml new file mode 100644 index 000000000000..d96908badf81 --- /dev/null +++ b/Documentation/devicetree/bindings/i2c/i2c-owl.yaml @@ -0,0 +1,62 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/i2c/i2c-owl.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Actions Semi Owl I2C Controller + +maintainers: + - Manivannan Sadhasivam + +description: | + This I2C controller is found in the Actions Semi Owl SoCs: + S500, S700 and S900. + +allOf: + - $ref: /schemas/i2c/i2c-controller.yaml# + +properties: + compatible: + enum: + - actions,s500-i2c # Actions Semi S500 compatible SoCs + - actions,s700-i2c # Actions Semi S700 compatible SoCs + - actions,s900-i2c # Actions Semi S900 compatible SoCs + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + clocks: + description: Phandle of the clock feeding the I2C controller. + minItems: 1 + + clock-frequency: + description: | + Desired I2C bus clock frequency in Hz. As only Standard and Fast + modes are supported, possible values are 100000 and 400000. + enum: [100000, 400000] + +required: + - compatible + - reg + - interrupts + - clocks + +unevaluatedProperties: false + +examples: + - | + #include + #include + i2c@e0170000 { + compatible = "actions,s900-i2c"; + reg = <0xe0170000 0x1000>; + interrupts = ; + clocks = <&cmu CLK_I2C0>; + clock-frequency = <100000>; + }; + +... diff --git a/MAINTAINERS b/MAINTAINERS index 1d097b9da354..693207a781ab 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -1501,7 +1501,7 @@ S: Maintained F: Documentation/devicetree/bindings/arm/actions.yaml F: Documentation/devicetree/bindings/clock/actions,owl-cmu.txt F: Documentation/devicetree/bindings/dma/owl-dma.yaml -F: Documentation/devicetree/bindings/i2c/i2c-owl.txt +F: Documentation/devicetree/bindings/i2c/i2c-owl.yaml F: Documentation/devicetree/bindings/interrupt-controller/actions,owl-sirq.yaml F: Documentation/devicetree/bindings/mmc/owl-mmc.yaml F: Documentation/devicetree/bindings/pinctrl/actions,* -- cgit v1.2.3 From 04fd6f0a9e678b62831104182354e03a5c901280 Mon Sep 17 00:00:00 2001 From: Cristian Ciocaltea Date: Fri, 20 Nov 2020 01:56:06 +0200 Subject: i2c: owl: Add compatible for the Actions Semi S500 I2C controller Add S500 variant to the list of devices supported by the Actions Semi Owl I2C driver. Signed-off-by: Cristian Ciocaltea Reviewed-by: Manivannan Sadhasivam Reviewed-by: Manivannan Sadhasivam Signed-off-by: Wolfram Sang --- drivers/i2c/busses/i2c-owl.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/i2c/busses/i2c-owl.c b/drivers/i2c/busses/i2c-owl.c index 5cf5a119a6ad..98882fe4e965 100644 --- a/drivers/i2c/busses/i2c-owl.c +++ b/drivers/i2c/busses/i2c-owl.c @@ -508,6 +508,7 @@ disable_clk: } static const struct of_device_id owl_i2c_of_match[] = { + { .compatible = "actions,s500-i2c" }, { .compatible = "actions,s700-i2c" }, { .compatible = "actions,s900-i2c" }, { /* sentinel */ } -- cgit v1.2.3 From e8a61e5a7e2abb71168092b403f8524a0af1f1d3 Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Tue, 13 Oct 2020 16:12:01 +0200 Subject: i2c: sh_mobile: Mark adapter suspended during suspend When a driver tries to send an I2C message while the adapter is suspended, this typically fails with: i2c-sh_mobile e60b0000.i2c: Transfer request timed out Avoid accessing the adapter while it is suspended by marking it suspended during suspend. This allows the I2C core to catch this, and print a warning: WARNING: CPU: 1 PID: 13 at drivers/i2c/i2c-core.h:54 __i2c_transfer+0x4a4/0x4e4 i2c i2c-6: Transfer while suspended Signed-off-by: Geert Uytterhoeven Signed-off-by: Wolfram Sang --- drivers/i2c/busses/i2c-sh_mobile.c | 28 ++++++++++++++++++++++++++++ 1 file changed, 28 insertions(+) diff --git a/drivers/i2c/busses/i2c-sh_mobile.c b/drivers/i2c/busses/i2c-sh_mobile.c index bdd60770779a..3ae6ca21a02c 100644 --- a/drivers/i2c/busses/i2c-sh_mobile.c +++ b/drivers/i2c/busses/i2c-sh_mobile.c @@ -956,10 +956,38 @@ static int sh_mobile_i2c_remove(struct platform_device *dev) return 0; } +#ifdef CONFIG_PM_SLEEP +static int sh_mobile_i2c_suspend(struct device *dev) +{ + struct sh_mobile_i2c_data *pd = dev_get_drvdata(dev); + + i2c_mark_adapter_suspended(&pd->adap); + return 0; +} + +static int sh_mobile_i2c_resume(struct device *dev) +{ + struct sh_mobile_i2c_data *pd = dev_get_drvdata(dev); + + i2c_mark_adapter_resumed(&pd->adap); + return 0; +} + +static const struct dev_pm_ops sh_mobile_i2c_pm_ops = { + SET_NOIRQ_SYSTEM_SLEEP_PM_OPS(sh_mobile_i2c_suspend, + sh_mobile_i2c_resume) +}; + +#define DEV_PM_OPS (&sh_mobile_i2c_pm_ops) +#else +#define DEV_PM_OPS NULL +#endif /* CONFIG_PM_SLEEP */ + static struct platform_driver sh_mobile_i2c_driver = { .driver = { .name = "i2c-sh_mobile", .of_match_table = sh_mobile_i2c_dt_ids, + .pm = DEV_PM_OPS, }, .probe = sh_mobile_i2c_probe, .remove = sh_mobile_i2c_remove, -- cgit v1.2.3 From 0b01392c18b9993a584f36ace1d61118772ad0ca Mon Sep 17 00:00:00 2001 From: Codrin Ciubotariu Date: Sun, 4 Oct 2020 13:07:11 +0300 Subject: i2c: pxa: move to generic GPIO recovery Starting with commit 75820314de26 ("i2c: core: add generic I2C GPIO recovery") GPIO bus recovery is supported by the I2C core, so we can remove the driver implementation and use that one instead. Signed-off-by: Codrin Ciubotariu Signed-off-by: Wolfram Sang --- drivers/i2c/busses/i2c-pxa.c | 76 +++++--------------------------------------- 1 file changed, 8 insertions(+), 68 deletions(-) diff --git a/drivers/i2c/busses/i2c-pxa.c b/drivers/i2c/busses/i2c-pxa.c index 35ca2c02c9b9..a636ea0eb50a 100644 --- a/drivers/i2c/busses/i2c-pxa.c +++ b/drivers/i2c/busses/i2c-pxa.c @@ -264,9 +264,6 @@ struct pxa_i2c { u32 hs_mask; struct i2c_bus_recovery_info recovery; - struct pinctrl *pinctrl; - struct pinctrl_state *pinctrl_default; - struct pinctrl_state *pinctrl_recovery; }; #define _IBMR(i2c) ((i2c)->reg_ibmr) @@ -1305,13 +1302,12 @@ static void i2c_pxa_prepare_recovery(struct i2c_adapter *adap) */ gpiod_set_value(i2c->recovery.scl_gpiod, ibmr & IBMR_SCLS); gpiod_set_value(i2c->recovery.sda_gpiod, ibmr & IBMR_SDAS); - - WARN_ON(pinctrl_select_state(i2c->pinctrl, i2c->pinctrl_recovery)); } static void i2c_pxa_unprepare_recovery(struct i2c_adapter *adap) { struct pxa_i2c *i2c = adap->algo_data; + struct i2c_bus_recovery_info *bri = adap->bus_recovery_info; u32 isr; /* @@ -1325,7 +1321,7 @@ static void i2c_pxa_unprepare_recovery(struct i2c_adapter *adap) i2c_pxa_do_reset(i2c); } - WARN_ON(pinctrl_select_state(i2c->pinctrl, i2c->pinctrl_default)); + WARN_ON(pinctrl_select_state(bri->pinctrl, bri->pins_default)); dev_dbg(&i2c->adap.dev, "recovery: IBMR 0x%08x ISR 0x%08x\n", readl(_IBMR(i2c)), readl(_ISR(i2c))); @@ -1347,76 +1343,20 @@ static int i2c_pxa_init_recovery(struct pxa_i2c *i2c) if (IS_ENABLED(CONFIG_I2C_PXA_SLAVE)) return 0; - i2c->pinctrl = devm_pinctrl_get(dev); - if (PTR_ERR(i2c->pinctrl) == -ENODEV) - i2c->pinctrl = NULL; - if (IS_ERR(i2c->pinctrl)) - return PTR_ERR(i2c->pinctrl); - - if (!i2c->pinctrl) - return 0; - - i2c->pinctrl_default = pinctrl_lookup_state(i2c->pinctrl, - PINCTRL_STATE_DEFAULT); - i2c->pinctrl_recovery = pinctrl_lookup_state(i2c->pinctrl, "recovery"); - - if (IS_ERR(i2c->pinctrl_default) || IS_ERR(i2c->pinctrl_recovery)) { - dev_info(dev, "missing pinmux recovery information: %ld %ld\n", - PTR_ERR(i2c->pinctrl_default), - PTR_ERR(i2c->pinctrl_recovery)); - return 0; - } - - /* - * Claiming GPIOs can influence the pinmux state, and may glitch the - * I2C bus. Do this carefully. - */ - bri->scl_gpiod = devm_gpiod_get(dev, "scl", GPIOD_OUT_HIGH_OPEN_DRAIN); - if (bri->scl_gpiod == ERR_PTR(-EPROBE_DEFER)) - return -EPROBE_DEFER; - if (IS_ERR(bri->scl_gpiod)) { - dev_info(dev, "missing scl gpio recovery information: %pe\n", - bri->scl_gpiod); - return 0; - } - - /* - * We have SCL. Pull SCL low and wait a bit so that SDA glitches - * have no effect. - */ - gpiod_direction_output(bri->scl_gpiod, 0); - udelay(10); - bri->sda_gpiod = devm_gpiod_get(dev, "sda", GPIOD_OUT_HIGH_OPEN_DRAIN); - - /* Wait a bit in case of a SDA glitch, and then release SCL. */ - udelay(10); - gpiod_direction_output(bri->scl_gpiod, 1); - - if (bri->sda_gpiod == ERR_PTR(-EPROBE_DEFER)) - return -EPROBE_DEFER; - - if (IS_ERR(bri->sda_gpiod)) { - dev_info(dev, "missing sda gpio recovery information: %pe\n", - bri->sda_gpiod); + bri->pinctrl = devm_pinctrl_get(dev); + if (PTR_ERR(bri->pinctrl) == -ENODEV) { + bri->pinctrl = NULL; return 0; } + if (IS_ERR(bri->pinctrl)) + return PTR_ERR(bri->pinctrl); bri->prepare_recovery = i2c_pxa_prepare_recovery; bri->unprepare_recovery = i2c_pxa_unprepare_recovery; - bri->recover_bus = i2c_generic_scl_recovery; i2c->adap.bus_recovery_info = bri; - /* - * Claiming GPIOs can change the pinmux state, which confuses the - * pinctrl since pinctrl's idea of the current setting is unaffected - * by the pinmux change caused by claiming the GPIO. Work around that - * by switching pinctrl to the GPIO state here. We do it this way to - * avoid glitching the I2C bus. - */ - pinctrl_select_state(i2c->pinctrl, i2c->pinctrl_recovery); - - return pinctrl_select_state(i2c->pinctrl, i2c->pinctrl_default); + return 0; } static int i2c_pxa_probe(struct platform_device *dev) -- cgit v1.2.3 From a5df4c14b9a9c576cd8229deb87da21aeb8aa82c Mon Sep 17 00:00:00 2001 From: Andy Shevchenko Date: Tue, 8 Dec 2020 16:03:35 +0200 Subject: i2c: designware: Switch header to use BIT() and GENMASK() Currently header file uses partially BIT() and GENMASK() macros. Switch it to use those macros in all cases where it's applicable for the sake of consistency. Signed-off-by: Andy Shevchenko Acked-by: Jarkko Nikula Signed-off-by: Wolfram Sang --- drivers/i2c/busses/i2c-designware-core.h | 92 ++++++++++++++++---------------- 1 file changed, 46 insertions(+), 46 deletions(-) diff --git a/drivers/i2c/busses/i2c-designware-core.h b/drivers/i2c/busses/i2c-designware-core.h index eb5ef4d0f463..c129074be63c 100644 --- a/drivers/i2c/busses/i2c-designware-core.h +++ b/drivers/i2c/busses/i2c-designware-core.h @@ -25,18 +25,18 @@ I2C_FUNC_SMBUS_BLOCK_DATA | \ I2C_FUNC_SMBUS_I2C_BLOCK) -#define DW_IC_CON_MASTER 0x1 -#define DW_IC_CON_SPEED_STD 0x2 -#define DW_IC_CON_SPEED_FAST 0x4 -#define DW_IC_CON_SPEED_HIGH 0x6 -#define DW_IC_CON_SPEED_MASK 0x6 -#define DW_IC_CON_10BITADDR_SLAVE 0x8 -#define DW_IC_CON_10BITADDR_MASTER 0x10 -#define DW_IC_CON_RESTART_EN 0x20 -#define DW_IC_CON_SLAVE_DISABLE 0x40 -#define DW_IC_CON_STOP_DET_IFADDRESSED 0x80 -#define DW_IC_CON_TX_EMPTY_CTRL 0x100 -#define DW_IC_CON_RX_FIFO_FULL_HLD_CTRL 0x200 +#define DW_IC_CON_MASTER BIT(0) +#define DW_IC_CON_SPEED_STD (1 << 1) +#define DW_IC_CON_SPEED_FAST (2 << 1) +#define DW_IC_CON_SPEED_HIGH (3 << 1) +#define DW_IC_CON_SPEED_MASK GENMASK(2, 1) +#define DW_IC_CON_10BITADDR_SLAVE BIT(3) +#define DW_IC_CON_10BITADDR_MASTER BIT(4) +#define DW_IC_CON_RESTART_EN BIT(5) +#define DW_IC_CON_SLAVE_DISABLE BIT(6) +#define DW_IC_CON_STOP_DET_IFADDRESSED BIT(7) +#define DW_IC_CON_TX_EMPTY_CTRL BIT(8) +#define DW_IC_CON_RX_FIFO_FULL_HLD_CTRL BIT(9) /* * Registers offset @@ -81,19 +81,19 @@ #define DW_IC_COMP_TYPE 0xfc #define DW_IC_COMP_TYPE_VALUE 0x44570140 -#define DW_IC_INTR_RX_UNDER 0x001 -#define DW_IC_INTR_RX_OVER 0x002 -#define DW_IC_INTR_RX_FULL 0x004 -#define DW_IC_INTR_TX_OVER 0x008 -#define DW_IC_INTR_TX_EMPTY 0x010 -#define DW_IC_INTR_RD_REQ 0x020 -#define DW_IC_INTR_TX_ABRT 0x040 -#define DW_IC_INTR_RX_DONE 0x080 -#define DW_IC_INTR_ACTIVITY 0x100 -#define DW_IC_INTR_STOP_DET 0x200 -#define DW_IC_INTR_START_DET 0x400 -#define DW_IC_INTR_GEN_CALL 0x800 -#define DW_IC_INTR_RESTART_DET 0x1000 +#define DW_IC_INTR_RX_UNDER BIT(0) +#define DW_IC_INTR_RX_OVER BIT(1) +#define DW_IC_INTR_RX_FULL BIT(2) +#define DW_IC_INTR_TX_OVER BIT(3) +#define DW_IC_INTR_TX_EMPTY BIT(4) +#define DW_IC_INTR_RD_REQ BIT(5) +#define DW_IC_INTR_TX_ABRT BIT(6) +#define DW_IC_INTR_RX_DONE BIT(7) +#define DW_IC_INTR_ACTIVITY BIT(8) +#define DW_IC_INTR_STOP_DET BIT(9) +#define DW_IC_INTR_START_DET BIT(10) +#define DW_IC_INTR_GEN_CALL BIT(11) +#define DW_IC_INTR_RESTART_DET BIT(12) #define DW_IC_INTR_DEFAULT_MASK (DW_IC_INTR_RX_FULL | \ DW_IC_INTR_TX_ABRT | \ @@ -105,13 +105,13 @@ DW_IC_INTR_RX_UNDER | \ DW_IC_INTR_RD_REQ) -#define DW_IC_STATUS_ACTIVITY 0x1 +#define DW_IC_STATUS_ACTIVITY BIT(0) #define DW_IC_STATUS_TFE BIT(2) #define DW_IC_STATUS_MASTER_ACTIVITY BIT(5) #define DW_IC_STATUS_SLAVE_ACTIVITY BIT(6) #define DW_IC_SDA_HOLD_RX_SHIFT 16 -#define DW_IC_SDA_HOLD_RX_MASK GENMASK(23, DW_IC_SDA_HOLD_RX_SHIFT) +#define DW_IC_SDA_HOLD_RX_MASK GENMASK(23, 16) #define DW_IC_ERR_TX_ABRT 0x1 @@ -154,20 +154,20 @@ #define ABRT_SLAVE_ARBLOST 14 #define ABRT_SLAVE_RD_INTX 15 -#define DW_IC_TX_ABRT_7B_ADDR_NOACK (1UL << ABRT_7B_ADDR_NOACK) -#define DW_IC_TX_ABRT_10ADDR1_NOACK (1UL << ABRT_10ADDR1_NOACK) -#define DW_IC_TX_ABRT_10ADDR2_NOACK (1UL << ABRT_10ADDR2_NOACK) -#define DW_IC_TX_ABRT_TXDATA_NOACK (1UL << ABRT_TXDATA_NOACK) -#define DW_IC_TX_ABRT_GCALL_NOACK (1UL << ABRT_GCALL_NOACK) -#define DW_IC_TX_ABRT_GCALL_READ (1UL << ABRT_GCALL_READ) -#define DW_IC_TX_ABRT_SBYTE_ACKDET (1UL << ABRT_SBYTE_ACKDET) -#define DW_IC_TX_ABRT_SBYTE_NORSTRT (1UL << ABRT_SBYTE_NORSTRT) -#define DW_IC_TX_ABRT_10B_RD_NORSTRT (1UL << ABRT_10B_RD_NORSTRT) -#define DW_IC_TX_ABRT_MASTER_DIS (1UL << ABRT_MASTER_DIS) -#define DW_IC_TX_ARB_LOST (1UL << ARB_LOST) -#define DW_IC_RX_ABRT_SLAVE_RD_INTX (1UL << ABRT_SLAVE_RD_INTX) -#define DW_IC_RX_ABRT_SLAVE_ARBLOST (1UL << ABRT_SLAVE_ARBLOST) -#define DW_IC_RX_ABRT_SLAVE_FLUSH_TXFIFO (1UL << ABRT_SLAVE_FLUSH_TXFIFO) +#define DW_IC_TX_ABRT_7B_ADDR_NOACK BIT(ABRT_7B_ADDR_NOACK) +#define DW_IC_TX_ABRT_10ADDR1_NOACK BIT(ABRT_10ADDR1_NOACK) +#define DW_IC_TX_ABRT_10ADDR2_NOACK BIT(ABRT_10ADDR2_NOACK) +#define DW_IC_TX_ABRT_TXDATA_NOACK BIT(ABRT_TXDATA_NOACK) +#define DW_IC_TX_ABRT_GCALL_NOACK BIT(ABRT_GCALL_NOACK) +#define DW_IC_TX_ABRT_GCALL_READ BIT(ABRT_GCALL_READ) +#define DW_IC_TX_ABRT_SBYTE_ACKDET BIT(ABRT_SBYTE_ACKDET) +#define DW_IC_TX_ABRT_SBYTE_NORSTRT BIT(ABRT_SBYTE_NORSTRT) +#define DW_IC_TX_ABRT_10B_RD_NORSTRT BIT(ABRT_10B_RD_NORSTRT) +#define DW_IC_TX_ABRT_MASTER_DIS BIT(ABRT_MASTER_DIS) +#define DW_IC_TX_ARB_LOST BIT(ARB_LOST) +#define DW_IC_RX_ABRT_SLAVE_RD_INTX BIT(ABRT_SLAVE_RD_INTX) +#define DW_IC_RX_ABRT_SLAVE_ARBLOST BIT(ABRT_SLAVE_ARBLOST) +#define DW_IC_RX_ABRT_SLAVE_FLUSH_TXFIFO BIT(ABRT_SLAVE_FLUSH_TXFIFO) #define DW_IC_TX_ABRT_NOACK (DW_IC_TX_ABRT_7B_ADDR_NOACK | \ DW_IC_TX_ABRT_10ADDR1_NOACK | \ @@ -288,12 +288,12 @@ struct dw_i2c_dev { bool suspended; }; -#define ACCESS_INTR_MASK 0x00000001 -#define ACCESS_NO_IRQ_SUSPEND 0x00000002 +#define ACCESS_INTR_MASK BIT(0) +#define ACCESS_NO_IRQ_SUSPEND BIT(1) -#define MODEL_MSCC_OCELOT 0x00000100 -#define MODEL_BAIKAL_BT1 0x00000200 -#define MODEL_MASK 0x00000f00 +#define MODEL_MSCC_OCELOT BIT(8) +#define MODEL_BAIKAL_BT1 BIT(9) +#define MODEL_MASK GENMASK(11, 8) int i2c_dw_init_regmap(struct dw_i2c_dev *dev); u32 i2c_dw_scl_hcnt(u32 ic_clk, u32 tSYMBOL, u32 tf, int cond, int offset); -- cgit v1.2.3 From 8f95c13228116b56d42736b0849a55b97267806c Mon Sep 17 00:00:00 2001 From: Andy Shevchenko Date: Tue, 8 Dec 2020 16:03:36 +0200 Subject: i2c: designware: Make register offsets all of the same width For the sake of consistency add leading 0 to first register offsets to make them all of the same width. Signed-off-by: Andy Shevchenko Acked-by: Jarkko Nikula Signed-off-by: Wolfram Sang --- drivers/i2c/busses/i2c-designware-core.h | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/i2c/busses/i2c-designware-core.h b/drivers/i2c/busses/i2c-designware-core.h index c129074be63c..85307cfa7109 100644 --- a/drivers/i2c/busses/i2c-designware-core.h +++ b/drivers/i2c/busses/i2c-designware-core.h @@ -41,9 +41,9 @@ /* * Registers offset */ -#define DW_IC_CON 0x0 -#define DW_IC_TAR 0x4 -#define DW_IC_SAR 0x8 +#define DW_IC_CON 0x00 +#define DW_IC_TAR 0x04 +#define DW_IC_SAR 0x08 #define DW_IC_DATA_CMD 0x10 #define DW_IC_SS_SCL_HCNT 0x14 #define DW_IC_SS_SCL_LCNT 0x18 -- cgit v1.2.3 From cbfa5b3987c42fe5cd25747aee4fe654b1092fab Mon Sep 17 00:00:00 2001 From: Aswath Govindraju Date: Wed, 9 Dec 2020 22:27:33 +0530 Subject: dt-bindings: i2c: Add compatible string for AM64 SoC Add compatible string for AM64 SoC in device tree binding of OMAP I2C modules as the same IP is used. Signed-off-by: Aswath Govindraju Acked-by: Rob Herring Signed-off-by: Wolfram Sang --- Documentation/devicetree/bindings/i2c/i2c-omap.txt | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/i2c/i2c-omap.txt b/Documentation/devicetree/bindings/i2c/i2c-omap.txt index a44573d7c118..a425b91af48f 100644 --- a/Documentation/devicetree/bindings/i2c/i2c-omap.txt +++ b/Documentation/devicetree/bindings/i2c/i2c-omap.txt @@ -8,6 +8,7 @@ Required properties : "ti,omap4-i2c" for OMAP4+ SoCs "ti,am654-i2c", "ti,omap4-i2c" for AM654 SoCs "ti,j721e-i2c", "ti,omap4-i2c" for J721E SoCs + "ti,am64-i2c", "ti,omap4-i2c" for AM64 SoCs - ti,hwmods : Must be "i2c", n being the instance number (1-based) - #address-cells = <1>; - #size-cells = <0>; -- cgit v1.2.3 From bfbccd70eee93c059e22d0d233f57cc164f03687 Mon Sep 17 00:00:00 2001 From: Yash Shah Date: Tue, 8 Dec 2020 10:25:38 +0530 Subject: dt-bindings: i2c: Update DT binding docs to support SiFive FU740 SoC Add new compatible strings to the DT binding documents to support SiFive FU740-C000. Signed-off-by: Yash Shah Reviewed-by: Rob Herring Signed-off-by: Wolfram Sang --- Documentation/devicetree/bindings/i2c/i2c-ocores.txt | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/i2c/i2c-ocores.txt b/Documentation/devicetree/bindings/i2c/i2c-ocores.txt index 6b25a80ae8d3..a37c9455b244 100644 --- a/Documentation/devicetree/bindings/i2c/i2c-ocores.txt +++ b/Documentation/devicetree/bindings/i2c/i2c-ocores.txt @@ -5,8 +5,12 @@ Required properties: "aeroflexgaisler,i2cmst" "sifive,fu540-c000-i2c", "sifive,i2c0" For Opencore based I2C IP block reimplemented in - FU540-C000 SoC. Please refer to sifive-blocks-ip-versioning.txt - for additional details. + FU540-C000 SoC. + "sifive,fu740-c000-i2c", "sifive,i2c0" + For Opencore based I2C IP block reimplemented in + FU740-C000 SoC. + Please refer to sifive-blocks-ip-versioning.txt for + additional details. - reg : bus address start and address range size of device - clocks : handle to the controller clock; see the note below. Mutually exclusive with opencores,ip-clock-frequency -- cgit v1.2.3 From 71637c620a826434ca6f888b0364a036faa27ffa Mon Sep 17 00:00:00 2001 From: Uwe Kleine-König Date: Thu, 26 Nov 2020 08:23:30 +0100 Subject: i2c: Warn when device removing fails MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The driver core ignores the return value of struct bus_type::remove. So warn if there is an error that went unnoticed before and return 0 unconditionally in i2c_device_remove(). This prepares changing struct bus_type::remove to return void. Signed-off-by: Uwe Kleine-König [wsa: added a comment and removed unneeded initializtion] Signed-off-by: Wolfram Sang --- drivers/i2c/i2c-core-base.c | 9 +++++++-- 1 file changed, 7 insertions(+), 2 deletions(-) diff --git a/drivers/i2c/i2c-core-base.c b/drivers/i2c/i2c-core-base.c index 573b5da145d1..6528d9e8f3ae 100644 --- a/drivers/i2c/i2c-core-base.c +++ b/drivers/i2c/i2c-core-base.c @@ -551,15 +551,19 @@ static int i2c_device_remove(struct device *dev) { struct i2c_client *client = i2c_verify_client(dev); struct i2c_driver *driver; - int status = 0; if (!client || !dev->driver) return 0; driver = to_i2c_driver(dev->driver); if (driver->remove) { + int status; + dev_dbg(dev, "remove\n"); + status = driver->remove(client); + if (status) + dev_warn(dev, "remove failed (%pe), will be ignored\n", ERR_PTR(status)); } dev_pm_domain_detach(&client->dev, true); @@ -571,7 +575,8 @@ static int i2c_device_remove(struct device *dev) if (client->flags & I2C_CLIENT_HOST_NOTIFY) pm_runtime_put(&client->adapter->dev); - return status; + /* return always 0 because there is WIP to make remove-functions void */ + return 0; } static void i2c_device_shutdown(struct device *dev) -- cgit v1.2.3 From 4e970a0ada5299d017a4263074f725227c2d2852 Mon Sep 17 00:00:00 2001 From: Uwe Kleine-König Date: Thu, 26 Nov 2020 08:23:31 +0100 Subject: i2c: remove check that can never be true MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit A driver remove callback is only called if the device was bound before. So it's sure that both dev and dev->driver are valid and dev is an i2c device. If the check fails something louder than "return 0" might be appropriate because the problem is grave (something like memory corruption), otherwise the check is useless. Signed-off-by: Uwe Kleine-König Signed-off-by: Wolfram Sang --- drivers/i2c/i2c-core-base.c | 5 +---- 1 file changed, 1 insertion(+), 4 deletions(-) diff --git a/drivers/i2c/i2c-core-base.c b/drivers/i2c/i2c-core-base.c index 6528d9e8f3ae..63ebf722a424 100644 --- a/drivers/i2c/i2c-core-base.c +++ b/drivers/i2c/i2c-core-base.c @@ -549,12 +549,9 @@ put_sync_adapter: static int i2c_device_remove(struct device *dev) { - struct i2c_client *client = i2c_verify_client(dev); + struct i2c_client *client = to_i2c_client(dev); struct i2c_driver *driver; - if (!client || !dev->driver) - return 0; - driver = to_i2c_driver(dev->driver); if (driver->remove) { int status; -- cgit v1.2.3