From e790a4ce529041bb21ec0b69a38c1b92f29df2cf Mon Sep 17 00:00:00 2001 From: Jonathan Corbet Date: Wed, 3 May 2023 16:47:22 -0600 Subject: arm: docs: Move Arm documentation to Documentation/arch/ Architecture-specific documentation is being moved into Documentation/arch/ as a way of cleaning up the top-level documentation directory and making the docs hierarchy more closely match the source hierarchy. Move Documentation/arm into arch/ (along with the Chinese equvalent translations). Cc: Maxime Coquelin Cc: Chen-Yu Tsai Cc: Jernej Skrabec Cc: Samuel Holland Cc: Krzysztof Kozlowski Cc: Alim Akhtar Cc: Alex Shi Cc: linux-doc@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org Cc: linux-arch@vger.kernel.org Acked-by: Alexandre TORGUE Reviewed-by: Yanteng Si Signed-off-by: Jonathan Corbet --- Documentation/arch/arm/swp_emulation.rst | 27 +++++++++++++++++++++++++++ 1 file changed, 27 insertions(+) create mode 100644 Documentation/arch/arm/swp_emulation.rst (limited to 'Documentation/arch/arm/swp_emulation.rst') diff --git a/Documentation/arch/arm/swp_emulation.rst b/Documentation/arch/arm/swp_emulation.rst new file mode 100644 index 000000000000..6a608a9c3715 --- /dev/null +++ b/Documentation/arch/arm/swp_emulation.rst @@ -0,0 +1,27 @@ +Software emulation of deprecated SWP instruction (CONFIG_SWP_EMULATE) +--------------------------------------------------------------------- + +ARMv6 architecture deprecates use of the SWP/SWPB instructions, and recommeds +moving to the load-locked/store-conditional instructions LDREX and STREX. + +ARMv7 multiprocessing extensions introduce the ability to disable these +instructions, triggering an undefined instruction exception when executed. +Trapped instructions are emulated using an LDREX/STREX or LDREXB/STREXB +sequence. If a memory access fault (an abort) occurs, a segmentation fault is +signalled to the triggering process. + +/proc/cpu/swp_emulation holds some statistics/information, including the PID of +the last process to trigger the emulation to be invocated. For example:: + + Emulated SWP: 12 + Emulated SWPB: 0 + Aborted SWP{B}: 1 + Last process: 314 + + +NOTE: + when accessing uncached shared regions, LDREX/STREX rely on an external + transaction monitoring block called a global monitor to maintain update + atomicity. If your system does not implement a global monitor, this option can + cause programs that perform SWP operations to uncached memory to deadlock, as + the STREX operation will always fail. -- cgit v1.2.3