From 659bf8e582fcf11d5f769e2a988722b33059b0d8 Mon Sep 17 00:00:00 2001 From: Hector Martin Date: Fri, 13 Jan 2023 19:50:24 +0900 Subject: dt-bindings: iommu: dart: add t8110 compatible t600x SoCs use this DART style for the Thunderbolt ports, and t8112 SoCs use them everywhere. Add a compatible for it. No other binding changes necessary. Reviewed-by: Sven Peter Acked-by: Krzysztof Kozlowski Signed-off-by: Hector Martin Link: https://lore.kernel.org/r/20230113105029.26654-2-marcan@marcan.st Signed-off-by: Joerg Roedel --- Documentation/devicetree/bindings/iommu/apple,dart.yaml | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation/devicetree/bindings/iommu') diff --git a/Documentation/devicetree/bindings/iommu/apple,dart.yaml b/Documentation/devicetree/bindings/iommu/apple,dart.yaml index 06af2bacbe97..903edf85d72e 100644 --- a/Documentation/devicetree/bindings/iommu/apple,dart.yaml +++ b/Documentation/devicetree/bindings/iommu/apple,dart.yaml @@ -24,6 +24,7 @@ properties: compatible: enum: - apple,t8103-dart + - apple,t8110-dart - apple,t6000-dart reg: -- cgit v1.2.3 From 6bc6af375c7025663fbc36bcb7e91f3af653742b Mon Sep 17 00:00:00 2001 From: Konrad Dybcio Date: Tue, 15 Nov 2022 16:27:19 +0100 Subject: dt-bindings: arm-smmu: Allow 3 power domains on SM6375 MMU500 The SMMU on SM6375 requires 3 power domains to be active. Add an appropriate description of that. Signed-off-by: Konrad Dybcio Reviewed-by: Krzysztof Kozlowski Acked-by: Will Deacon Link: https://lore.kernel.org/r/20221115152727.9736-2-konrad.dybcio@linaro.org Signed-off-by: Will Deacon --- .../devicetree/bindings/iommu/arm,smmu.yaml | 23 +++++++++++++++++++++- 1 file changed, 22 insertions(+), 1 deletion(-) (limited to 'Documentation/devicetree/bindings/iommu') diff --git a/Documentation/devicetree/bindings/iommu/arm,smmu.yaml b/Documentation/devicetree/bindings/iommu/arm,smmu.yaml index b28c5c2b0ff2..895ec8418465 100644 --- a/Documentation/devicetree/bindings/iommu/arm,smmu.yaml +++ b/Documentation/devicetree/bindings/iommu/arm,smmu.yaml @@ -201,7 +201,8 @@ properties: maxItems: 7 power-domains: - maxItems: 1 + minItems: 1 + maxItems: 3 nvidia,memory-controller: description: | @@ -366,6 +367,26 @@ allOf: - description: interface clock required to access smmu's registers through the TCU's programming interface. + - if: + properties: + compatible: + contains: + const: qcom,sm6375-smmu-500 + then: + properties: + power-domains: + items: + - description: SNoC MMU TBU RT GDSC + - description: SNoC MMU TBU NRT GDSC + - description: SNoC TURING MMU TBU0 GDSC + + required: + - power-domains + else: + properties: + power-domains: + maxItems: 1 + examples: - |+ /* SMMU with stream matching or stream indexing */ -- cgit v1.2.3 From 11321f7763d08aaf2057fe6e3055009770dd2b7a Mon Sep 17 00:00:00 2001 From: Marijn Suijten Date: Tue, 13 Dec 2022 01:26:25 +0100 Subject: dt-bindings: arm-smmu: Add sm8150-smmu-500 to the list of Adreno smmus sm8150 has an smmu-500 specifically for Adreno, where the GPU is allowed to switch pagetables. Document the allowed 3-compatibles for this, similar to sc7280 and sm8250. Signed-off-by: Marijn Suijten Signed-off-by: Konrad Dybcio Acked-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20221213002626.260267-1-konrad.dybcio@linaro.org Signed-off-by: Will Deacon --- Documentation/devicetree/bindings/iommu/arm,smmu.yaml | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation/devicetree/bindings/iommu') diff --git a/Documentation/devicetree/bindings/iommu/arm,smmu.yaml b/Documentation/devicetree/bindings/iommu/arm,smmu.yaml index 895ec8418465..b97181d4a399 100644 --- a/Documentation/devicetree/bindings/iommu/arm,smmu.yaml +++ b/Documentation/devicetree/bindings/iommu/arm,smmu.yaml @@ -84,6 +84,7 @@ properties: items: - enum: - qcom,sc7280-smmu-500 + - qcom,sm8150-smmu-500 - qcom,sm8250-smmu-500 - const: qcom,adreno-smmu - const: arm,mmu-500 -- cgit v1.2.3 From 6dbffe465b7c4807c266d696f9a66fb582f8e6f4 Mon Sep 17 00:00:00 2001 From: Luca Weiss Date: Sat, 5 Nov 2022 15:20:17 +0100 Subject: dt-bindings: iommu: qcom: Add Qualcomm MSM8953 compatible Document the compatible used for IOMMU on the msm8953 SoC. Acked-by: Rob Herring Signed-off-by: Luca Weiss Link: https://lore.kernel.org/r/20221105142016.93406-1-luca@z3ntu.xyz Signed-off-by: Will Deacon --- Documentation/devicetree/bindings/iommu/qcom,iommu.txt | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation/devicetree/bindings/iommu') diff --git a/Documentation/devicetree/bindings/iommu/qcom,iommu.txt b/Documentation/devicetree/bindings/iommu/qcom,iommu.txt index 059139abce35..e6cecfd360eb 100644 --- a/Documentation/devicetree/bindings/iommu/qcom,iommu.txt +++ b/Documentation/devicetree/bindings/iommu/qcom,iommu.txt @@ -10,6 +10,7 @@ to non-secure vs secure interrupt line. - compatible : Should be one of: "qcom,msm8916-iommu" + "qcom,msm8953-iommu" Followed by "qcom,msm-iommu-v1". -- cgit v1.2.3 From d565d60d3da7f0f390c479c3bc6d5846c061760c Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Thu, 22 Dec 2022 10:23:55 +0100 Subject: dt-bindings: arm-smmu: disallow clocks when not used Disallow clocks for variants other than: 1. SMMUs with platform-specific compatibles which list explicit clocks and clock-names, 2. SMMUs using only generic compatibles, e.g. arm,mmu-500, which have a variable clocks on different implementations. This requires such variants with platform-specific compatible, to explicitly list the clocks or omit them, making the binding more constraint. Signed-off-by: Krzysztof Kozlowski Reviewed-by: Marijn Suijten Acked-by: Rob Herring Link: https://lore.kernel.org/r/20221222092355.74586-1-krzysztof.kozlowski@linaro.org Signed-off-by: Will Deacon --- .../devicetree/bindings/iommu/arm,smmu.yaml | 28 ++++++++++++++++++++++ 1 file changed, 28 insertions(+) (limited to 'Documentation/devicetree/bindings/iommu') diff --git a/Documentation/devicetree/bindings/iommu/arm,smmu.yaml b/Documentation/devicetree/bindings/iommu/arm,smmu.yaml index b97181d4a399..426d7c4bba7f 100644 --- a/Documentation/devicetree/bindings/iommu/arm,smmu.yaml +++ b/Documentation/devicetree/bindings/iommu/arm,smmu.yaml @@ -368,6 +368,34 @@ allOf: - description: interface clock required to access smmu's registers through the TCU's programming interface. + # Disallow clocks for all other platforms with specific compatibles + - if: + properties: + compatible: + contains: + enum: + - cavium,smmu-v2 + - marvell,ap806-smmu-500 + - nvidia,smmu-500 + - qcom,qcm2290-smmu-500 + - qcom,qdu1000-smmu-500 + - qcom,sc7180-smmu-500 + - qcom,sc8180x-smmu-500 + - qcom,sc8280xp-smmu-500 + - qcom,sdm670-smmu-500 + - qcom,sdm845-smmu-500 + - qcom,sdx55-smmu-500 + - qcom,sdx65-smmu-500 + - qcom,sm6115-smmu-500 + - qcom,sm6350-smmu-500 + - qcom,sm6375-smmu-500 + - qcom,sm8350-smmu-500 + - qcom,sm8450-smmu-500 + then: + properties: + clock-names: false + clocks: false + - if: properties: compatible: -- cgit v1.2.3 From 0802999c9b7c3549ce7627d3e6d704f3a127904b Mon Sep 17 00:00:00 2001 From: Bartosz Golaszewski Date: Thu, 12 Jan 2023 16:45:54 +0100 Subject: dt-bindings: arm-smmu: document the smmu on Qualcomm SA8775P Document the qcom,smmu-500 SMMU on SA8775P platforms. Signed-off-by: Bartosz Golaszewski Acked-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20230112154554.442808-1-brgl@bgdev.pl Signed-off-by: Will Deacon --- Documentation/devicetree/bindings/iommu/arm,smmu.yaml | 2 ++ 1 file changed, 2 insertions(+) (limited to 'Documentation/devicetree/bindings/iommu') diff --git a/Documentation/devicetree/bindings/iommu/arm,smmu.yaml b/Documentation/devicetree/bindings/iommu/arm,smmu.yaml index 426d7c4bba7f..52982ec9ad13 100644 --- a/Documentation/devicetree/bindings/iommu/arm,smmu.yaml +++ b/Documentation/devicetree/bindings/iommu/arm,smmu.yaml @@ -36,6 +36,7 @@ properties: - enum: - qcom,qcm2290-smmu-500 - qcom,qdu1000-smmu-500 + - qcom,sa8775p-smmu-500 - qcom,sc7180-smmu-500 - qcom,sc7280-smmu-500 - qcom,sc8180x-smmu-500 @@ -379,6 +380,7 @@ allOf: - nvidia,smmu-500 - qcom,qcm2290-smmu-500 - qcom,qdu1000-smmu-500 + - qcom,sa8775p-smmu-500 - qcom,sc7180-smmu-500 - qcom,sc8180x-smmu-500 - qcom,sc8280xp-smmu-500 -- cgit v1.2.3 From 822765f44ec1996cf1137b49ff65001098af2714 Mon Sep 17 00:00:00 2001 From: Martin Botka Date: Thu, 22 Dec 2022 20:32:51 +0100 Subject: dt-bindings: arm-smmu: Document smmu-500 binding for SM6125 Document smmu-500 compatibility with the SM6125 SoC. Signed-off-by: Martin Botka [Marijn: Move compatible to the new, generic, qcom,smmu-500 list] Signed-off-by: Marijn Suijten Acked-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20221222193254.126925-2-marijn.suijten@somainline.org Signed-off-by: Will Deacon --- Documentation/devicetree/bindings/iommu/arm,smmu.yaml | 2 ++ 1 file changed, 2 insertions(+) (limited to 'Documentation/devicetree/bindings/iommu') diff --git a/Documentation/devicetree/bindings/iommu/arm,smmu.yaml b/Documentation/devicetree/bindings/iommu/arm,smmu.yaml index 52982ec9ad13..93c6a4ddcf2c 100644 --- a/Documentation/devicetree/bindings/iommu/arm,smmu.yaml +++ b/Documentation/devicetree/bindings/iommu/arm,smmu.yaml @@ -44,6 +44,7 @@ properties: - qcom,sdm670-smmu-500 - qcom,sdm845-smmu-500 - qcom,sm6115-smmu-500 + - qcom,sm6125-smmu-500 - qcom,sm6350-smmu-500 - qcom,sm6375-smmu-500 - qcom,sm8150-smmu-500 @@ -389,6 +390,7 @@ allOf: - qcom,sdx55-smmu-500 - qcom,sdx65-smmu-500 - qcom,sm6115-smmu-500 + - qcom,sm6125-smmu-500 - qcom,sm6350-smmu-500 - qcom,sm6375-smmu-500 - qcom,sm8350-smmu-500 -- cgit v1.2.3 From eb9181a3ae6021d7a12ed7f1d6a15804628cbe98 Mon Sep 17 00:00:00 2001 From: Manivannan Sadhasivam Date: Mon, 23 Jan 2023 18:49:29 +0530 Subject: dt-bindings: arm-smmu: Fix binding for SDX55 and SDX65 Both SDX55 and SDX66 SoCs are using the Qualcomm version of the SMMU-500 IP. But the binding lists them under the non-qcom implementation which is not correct. So fix the binding by moving these two SoCs under "qcom,smmu-500" implementation. Fixes: 6c84bbd103d8 ("dt-bindings: arm-smmu: Add generic qcom,smmu-500 bindings") Signed-off-by: Manivannan Sadhasivam Acked-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20230123131931.263024-2-manivannan.sadhasivam@linaro.org Signed-off-by: Will Deacon --- Documentation/devicetree/bindings/iommu/arm,smmu.yaml | 10 ++-------- 1 file changed, 2 insertions(+), 8 deletions(-) (limited to 'Documentation/devicetree/bindings/iommu') diff --git a/Documentation/devicetree/bindings/iommu/arm,smmu.yaml b/Documentation/devicetree/bindings/iommu/arm,smmu.yaml index 93c6a4ddcf2c..807cb511fe18 100644 --- a/Documentation/devicetree/bindings/iommu/arm,smmu.yaml +++ b/Documentation/devicetree/bindings/iommu/arm,smmu.yaml @@ -43,6 +43,8 @@ properties: - qcom,sc8280xp-smmu-500 - qcom,sdm670-smmu-500 - qcom,sdm845-smmu-500 + - qcom,sdx55-smmu-500 + - qcom,sdx65-smmu-500 - qcom,sm6115-smmu-500 - qcom,sm6125-smmu-500 - qcom,sm6350-smmu-500 @@ -54,14 +56,6 @@ properties: - const: qcom,smmu-500 - const: arm,mmu-500 - - description: Qcom SoCs implementing "arm,mmu-500" (non-qcom implementation) - deprecated: true - items: - - enum: - - qcom,sdx55-smmu-500 - - qcom,sdx65-smmu-500 - - const: arm,mmu-500 - - description: Qcom SoCs implementing "arm,mmu-500" (legacy binding) deprecated: true items: -- cgit v1.2.3 From 1505e7215eb73b20bb2bcc7c4a7e328c615811d7 Mon Sep 17 00:00:00 2001 From: Yoshihiro Shimoda Date: Thu, 19 Jan 2023 22:18:33 +0900 Subject: dt-bindings: iommu: renesas,ipmmu-vmsa: add r8a779g0 support Document the compatible values for the IPMMU-VMSA blocks in the Renesas R-Car V4H (R8A779G0) SoC. Signed-off-by: Yoshihiro Shimoda Link: https://lore.kernel.org/r/20230119131833.1008752-1-yoshihiro.shimoda.uh@renesas.com Signed-off-by: Joerg Roedel --- Documentation/devicetree/bindings/iommu/renesas,ipmmu-vmsa.yaml | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation/devicetree/bindings/iommu') diff --git a/Documentation/devicetree/bindings/iommu/renesas,ipmmu-vmsa.yaml b/Documentation/devicetree/bindings/iommu/renesas,ipmmu-vmsa.yaml index 26d0a5121f02..72308a4c14e7 100644 --- a/Documentation/devicetree/bindings/iommu/renesas,ipmmu-vmsa.yaml +++ b/Documentation/devicetree/bindings/iommu/renesas,ipmmu-vmsa.yaml @@ -49,6 +49,7 @@ properties: - enum: - renesas,ipmmu-r8a779a0 # R-Car V3U - renesas,ipmmu-r8a779f0 # R-Car S4-8 + - renesas,ipmmu-r8a779g0 # R-Car V4H - const: renesas,rcar-gen4-ipmmu-vmsa # R-Car Gen4 reg: -- cgit v1.2.3