From 88362275240303455bbec05c249daa84aff07059 Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Thu, 3 Aug 2023 09:24:24 +0200 Subject: dt-bindings: spi: spi-cadence: Describe power-domains property ZynqMP Cadence SPI IP core has own power domain that's why describe it as optional property. Signed-off-by: Michal Simek Acked-by: Conor Dooley Link: https://lore.kernel.org/r/987430ee905fd299fe962663d94f848b341c87df.1691047461.git.michal.simek@amd.com Signed-off-by: Mark Brown --- Documentation/devicetree/bindings/spi/spi-cadence.yaml | 3 +++ 1 file changed, 3 insertions(+) (limited to 'Documentation/devicetree/bindings/spi') diff --git a/Documentation/devicetree/bindings/spi/spi-cadence.yaml b/Documentation/devicetree/bindings/spi/spi-cadence.yaml index b7552739b554..9eda7f0d2869 100644 --- a/Documentation/devicetree/bindings/spi/spi-cadence.yaml +++ b/Documentation/devicetree/bindings/spi/spi-cadence.yaml @@ -49,6 +49,9 @@ properties: enum: [ 0, 1 ] default: 0 + power-domains: + maxItems: 1 + required: - compatible - reg -- cgit v1.2.3