From 3865a64284cc4845c61cf3dc6c7246349d80cc49 Mon Sep 17 00:00:00 2001 From: Nitheesh Sekar Date: Thu, 31 Aug 2023 08:35:03 +0530 Subject: dt-bindings: usb: dwc3: Add IPQ5018 compatible Document the IPQ5018 dwc3 compatible. Reviewed-by: Krzysztof Kozlowski Signed-off-by: Nitheesh Sekar Link: https://lore.kernel.org/r/20230831030503.17100-1-quic_nsekar@quicinc.com Signed-off-by: Greg Kroah-Hartman --- Documentation/devicetree/bindings/usb/qcom,dwc3.yaml | 3 +++ 1 file changed, 3 insertions(+) (limited to 'Documentation/devicetree/bindings/usb') diff --git a/Documentation/devicetree/bindings/usb/qcom,dwc3.yaml b/Documentation/devicetree/bindings/usb/qcom,dwc3.yaml index 67591057f234..1ad62e55dfe2 100644 --- a/Documentation/devicetree/bindings/usb/qcom,dwc3.yaml +++ b/Documentation/devicetree/bindings/usb/qcom,dwc3.yaml @@ -14,6 +14,7 @@ properties: items: - enum: - qcom,ipq4019-dwc3 + - qcom,ipq5018-dwc3 - qcom,ipq5332-dwc3 - qcom,ipq6018-dwc3 - qcom,ipq8064-dwc3 @@ -238,6 +239,7 @@ allOf: compatible: contains: enum: + - qcom,ipq5018-dwc3 - qcom,ipq5332-dwc3 - qcom,msm8994-dwc3 - qcom,qcs404-dwc3 @@ -411,6 +413,7 @@ allOf: compatible: contains: enum: + - qcom,ipq5018-dwc3 - qcom,ipq5332-dwc3 - qcom,sdm660-dwc3 then: -- cgit v1.2.3 From ca58c4ae75b65e1d78408b134f129ea91e9595b8 Mon Sep 17 00:00:00 2001 From: Krishna Kurapati Date: Mon, 28 Aug 2023 19:00:21 +0530 Subject: dt-bindings: usb: qcom,dwc3: Add bindings for SC8280 Multiport Add the compatible string for SC8280 Multiport USB controller from Qualcomm. There are 4 power event irq interrupts supported by this controller (one for each port of multiport). Added all the 4 as non-optional interrupts for SC8280XP-MP Also each port of multiport has one DP and oen DM IRQ. Add all DP/DM IRQ's related to 4 ports of SC8280XP Teritiary controller. Also added ss phy irq for both SS Ports. Signed-off-by: Krishna Kurapati Reviewed-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20230828133033.11988-2-quic_kriskura@quicinc.com Signed-off-by: Greg Kroah-Hartman --- .../devicetree/bindings/usb/qcom,dwc3.yaml | 29 ++++++++++++++++++++++ 1 file changed, 29 insertions(+) (limited to 'Documentation/devicetree/bindings/usb') diff --git a/Documentation/devicetree/bindings/usb/qcom,dwc3.yaml b/Documentation/devicetree/bindings/usb/qcom,dwc3.yaml index 1ad62e55dfe2..b4be38804df7 100644 --- a/Documentation/devicetree/bindings/usb/qcom,dwc3.yaml +++ b/Documentation/devicetree/bindings/usb/qcom,dwc3.yaml @@ -30,6 +30,7 @@ properties: - qcom,sc7180-dwc3 - qcom,sc7280-dwc3 - qcom,sc8280xp-dwc3 + - qcom,sc8280xp-dwc3-mp - qcom,sdm660-dwc3 - qcom,sdm670-dwc3 - qcom,sdm845-dwc3 @@ -260,6 +261,7 @@ allOf: contains: enum: - qcom,sc8280xp-dwc3 + - qcom,sc8280xp-dwc3-mp then: properties: clocks: @@ -482,6 +484,33 @@ allOf: - const: dm_hs_phy_irq - const: ss_phy_irq + - if: + properties: + compatible: + contains: + enum: + - qcom,sc8280xp-dwc3-mp + then: + properties: + interrupts: + maxItems: 14 + interrupt-names: + items: + - const: pwr_event_1 + - const: pwr_event_2 + - const: pwr_event_3 + - const: pwr_event_4 + - const: dp_hs_phy_1 + - const: dm_hs_phy_1 + - const: dp_hs_phy_2 + - const: dm_hs_phy_2 + - const: dp_hs_phy_3 + - const: dm_hs_phy_3 + - const: dp_hs_phy_4 + - const: dm_hs_phy_4 + - const: ss_phy_1 + - const: ss_phy_2 + additionalProperties: false examples: -- cgit v1.2.3 From eb3f1d9e42b1499152442e97b51bc1bcfee29d71 Mon Sep 17 00:00:00 2001 From: Krishna Kurapati Date: Mon, 28 Aug 2023 19:00:22 +0530 Subject: dt-bindings: usb: Add bindings for multiport properties on DWC3 controller Add bindings to indicate properties required to support multiport on Synopsys DWC3 controller. Suggested-by: Bjorn Andersson Signed-off-by: Krishna Kurapati Reviewed-by: Rob Herring Link: https://lore.kernel.org/r/20230828133033.11988-3-quic_kriskura@quicinc.com Signed-off-by: Greg Kroah-Hartman --- Documentation/devicetree/bindings/usb/snps,dwc3.yaml | 13 +++++++------ 1 file changed, 7 insertions(+), 6 deletions(-) (limited to 'Documentation/devicetree/bindings/usb') diff --git a/Documentation/devicetree/bindings/usb/snps,dwc3.yaml b/Documentation/devicetree/bindings/usb/snps,dwc3.yaml index a696f23730d3..5bc941355b43 100644 --- a/Documentation/devicetree/bindings/usb/snps,dwc3.yaml +++ b/Documentation/devicetree/bindings/usb/snps,dwc3.yaml @@ -85,15 +85,16 @@ properties: phys: minItems: 1 - maxItems: 2 + maxItems: 8 phy-names: minItems: 1 - maxItems: 2 - items: - enum: - - usb2-phy - - usb3-phy + maxItems: 8 + oneOf: + - items: + enum: [ usb2-phy, usb3-phy ] + - items: + pattern: "^usb[23]-port[0-3]$" power-domains: description: -- cgit v1.2.3 From a3d19c289bedc99f01010020074f00b60640ade8 Mon Sep 17 00:00:00 2001 From: Stanley Chang Date: Sat, 26 Aug 2023 11:10:07 +0800 Subject: dt-bindings: usb: dwc3: Add Realtek DHC RTD SoC DWC3 USB Document the DWC3 USB bindings for Realtek SoCs. Signed-off-by: Stanley Chang Reviewed-by: Rob Herring Link: https://lore.kernel.org/r/20230826031028.1892-2-stanley_chang@realtek.com Signed-off-by: Greg Kroah-Hartman --- .../devicetree/bindings/usb/realtek,rtd-dwc3.yaml | 80 ++++++++++++++++++++++ 1 file changed, 80 insertions(+) create mode 100644 Documentation/devicetree/bindings/usb/realtek,rtd-dwc3.yaml (limited to 'Documentation/devicetree/bindings/usb') diff --git a/Documentation/devicetree/bindings/usb/realtek,rtd-dwc3.yaml b/Documentation/devicetree/bindings/usb/realtek,rtd-dwc3.yaml new file mode 100644 index 000000000000..345d0132d4a5 --- /dev/null +++ b/Documentation/devicetree/bindings/usb/realtek,rtd-dwc3.yaml @@ -0,0 +1,80 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +# Copyright 2023 Realtek Semiconductor Corporation +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/usb/realtek,rtd-dwc3.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Realtek DWC3 USB SoC Controller Glue + +maintainers: + - Stanley Chang + +description: + The Realtek DHC SoC embeds a DWC3 USB IP Core configured for USB 2.0 + and USB 3.0 in host or dual-role mode. + +properties: + compatible: + items: + - enum: + - realtek,rtd1295-dwc3 + - realtek,rtd1315e-dwc3 + - realtek,rtd1319-dwc3 + - realtek,rtd1319d-dwc3 + - realtek,rtd1395-dwc3 + - realtek,rtd1619-dwc3 + - realtek,rtd1619b-dwc3 + - const: realtek,rtd-dwc3 + + reg: + items: + - description: Address and length of register set for wrapper of dwc3 core. + - description: Address and length of register set for pm control. + + '#address-cells': + const: 1 + + '#size-cells': + const: 1 + + ranges: true + +patternProperties: + "^usb@[0-9a-f]+$": + $ref: snps,dwc3.yaml# + description: Required child node + +required: + - compatible + - reg + - "#address-cells" + - "#size-cells" + - ranges + +additionalProperties: false + +examples: + - | + usb@98013e00 { + compatible = "realtek,rtd1319d-dwc3", "realtek,rtd-dwc3"; + reg = <0x98013e00 0x140>, <0x98013f60 0x4>; + #address-cells = <1>; + #size-cells = <1>; + ranges; + + usb@98050000 { + compatible = "snps,dwc3"; + reg = <0x98050000 0x9000>; + interrupts = <0 94 4>; + phys = <&usb2phy &usb3phy>; + phy-names = "usb2-phy", "usb3-phy"; + dr_mode = "otg"; + usb-role-switch; + role-switch-default-mode = "host"; + snps,dis_u2_susphy_quirk; + snps,parkmode-disable-ss-quirk; + snps,parkmode-disable-hs-quirk; + maximum-speed = "high-speed"; + }; + }; -- cgit v1.2.3 From 6591e278f05c13f2525e0adb805e18174eda7024 Mon Sep 17 00:00:00 2001 From: Stanley Chang Date: Tue, 12 Sep 2023 12:19:03 +0800 Subject: dt-bindings: usb: dwc3: Add DWC_usb3 TX/RX threshold configurable In Synopsys's dwc3 data book: To avoid underrun and overrun during the burst, in a high-latency bus system (like USB), threshold and burst size control is provided through GTXTHRCFG and GRXTHRCFG registers. By default, USB TX and RX threshold are not enabled. To enable TX or RX threshold, both packet threshold count and max burst size properties must be set to a valid non-zero value. In Realtek DHC SoC, DWC3 USB 3.0 uses AHB system bus. When dwc3 is connected with USB 2.5G Ethernet, there will be overrun problem. Therefore, setting TX/RX thresholds can avoid this issue. Signed-off-by: Stanley Chang Reviewed-by: Rob Herring Link: https://lore.kernel.org/r/20230912041904.30721-2-stanley_chang@realtek.com Signed-off-by: Greg Kroah-Hartman --- .../devicetree/bindings/usb/snps,dwc3.yaml | 56 ++++++++++++++++++++++ 1 file changed, 56 insertions(+) (limited to 'Documentation/devicetree/bindings/usb') diff --git a/Documentation/devicetree/bindings/usb/snps,dwc3.yaml b/Documentation/devicetree/bindings/usb/snps,dwc3.yaml index 5bc941355b43..d81c2e849ca9 100644 --- a/Documentation/devicetree/bindings/usb/snps,dwc3.yaml +++ b/Documentation/devicetree/bindings/usb/snps,dwc3.yaml @@ -311,6 +311,62 @@ properties: maximum: 62 deprecated: true + snps,rx-thr-num-pkt: + description: + USB RX packet threshold count. In host mode, this field specifies + the space that must be available in the RX FIFO before the core can + start the corresponding USB RX transaction (burst). + In device mode, this field specifies the space that must be + available in the RX FIFO before the core can send ERDY for a + flow-controlled endpoint. It is only used for SuperSpeed. + The valid values for this field are from 1 to 15. (DWC3 SuperSpeed + USB 3.0 Controller Databook) + $ref: /schemas/types.yaml#/definitions/uint8 + minimum: 1 + maximum: 15 + + snps,rx-max-burst: + description: + Max USB RX burst size. In host mode, this field specifies the + Maximum Bulk IN burst the DWC_usb3 core can perform. When the system + bus is slower than the USB, RX FIFO can overrun during a long burst. + You can program a smaller value to this field to limit the RX burst + size that the core can perform. It only applies to SS Bulk, + Isochronous, and Interrupt IN endpoints in the host mode. + In device mode, this field specifies the NUMP value that is sent in + ERDY for an OUT endpoint. + The valid values for this field are from 1 to 16. (DWC3 SuperSpeed + USB 3.0 Controller Databook) + $ref: /schemas/types.yaml#/definitions/uint8 + minimum: 1 + maximum: 16 + + snps,tx-thr-num-pkt: + description: + USB TX packet threshold count. This field specifies the number of + packets that must be in the TXFIFO before the core can start + transmission for the corresponding USB transaction (burst). + This count is valid in both host and device modes. It is only used + for SuperSpeed operation. + Valid values are from 1 to 15. (DWC3 SuperSpeed USB 3.0 Controller + Databook) + $ref: /schemas/types.yaml#/definitions/uint8 + minimum: 1 + maximum: 15 + + snps,tx-max-burst: + description: + Max USB TX burst size. When the system bus is slower than the USB, + TX FIFO can underrun during a long burst. Program a smaller value + to this field to limit the TX burst size that the core can execute. + In Host mode, it only applies to SS Bulk, Isochronous, and Interrupt + OUT endpoints. This value is not used in device mode. + Valid values are from 1 to 16. (DWC3 SuperSpeed USB 3.0 Controller + Databook) + $ref: /schemas/types.yaml#/definitions/uint8 + minimum: 1 + maximum: 16 + snps,rx-thr-num-pkt-prd: description: Periodic ESS RX packet threshold count (host mode only). Set this and -- cgit v1.2.3 From 91da60e3fda8bc917d48ba387942f08296e2af87 Mon Sep 17 00:00:00 2001 From: Rohit Agarwal Date: Fri, 22 Sep 2023 10:42:03 +0530 Subject: dt-bindings: usb: qcom,dwc3: Fix SDX65 clocks SDX65 has 5 clocks so mention in the bindings. Fixes: 16946a60715c ("dt-bindings: usb: qcom,dwc3: fix clock matching") Signed-off-by: Rohit Agarwal Acked-by: Rob Herring Link: https://lore.kernel.org/r/1695359525-4548-4-git-send-email-quic_rohiagar@quicinc.com Signed-off-by: Greg Kroah-Hartman --- Documentation/devicetree/bindings/usb/qcom,dwc3.yaml | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation/devicetree/bindings/usb') diff --git a/Documentation/devicetree/bindings/usb/qcom,dwc3.yaml b/Documentation/devicetree/bindings/usb/qcom,dwc3.yaml index b4be38804df7..a76b09290c40 100644 --- a/Documentation/devicetree/bindings/usb/qcom,dwc3.yaml +++ b/Documentation/devicetree/bindings/usb/qcom,dwc3.yaml @@ -182,6 +182,7 @@ allOf: - qcom,sdm670-dwc3 - qcom,sdm845-dwc3 - qcom,sdx55-dwc3 + - qcom,sdx65-dwc3 - qcom,sm6350-dwc3 then: properties: -- cgit v1.2.3 From f2b5cdb003e4047b6c55a24fd7d3a2482b9e1300 Mon Sep 17 00:00:00 2001 From: Rohit Agarwal Date: Fri, 22 Sep 2023 10:42:04 +0530 Subject: dt-bindings: usb: dwc3: Add SDX75 compatible Document the SDX75 dwc3 compatible. Signed-off-by: Rohit Agarwal Reviewed-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/1695359525-4548-5-git-send-email-quic_rohiagar@quicinc.com Signed-off-by: Greg Kroah-Hartman --- Documentation/devicetree/bindings/usb/qcom,dwc3.yaml | 3 +++ 1 file changed, 3 insertions(+) (limited to 'Documentation/devicetree/bindings/usb') diff --git a/Documentation/devicetree/bindings/usb/qcom,dwc3.yaml b/Documentation/devicetree/bindings/usb/qcom,dwc3.yaml index a76b09290c40..51a5581ce692 100644 --- a/Documentation/devicetree/bindings/usb/qcom,dwc3.yaml +++ b/Documentation/devicetree/bindings/usb/qcom,dwc3.yaml @@ -36,6 +36,7 @@ properties: - qcom,sdm845-dwc3 - qcom,sdx55-dwc3 - qcom,sdx65-dwc3 + - qcom,sdx75-dwc3 - qcom,sm4250-dwc3 - qcom,sm6115-dwc3 - qcom,sm6125-dwc3 @@ -183,6 +184,7 @@ allOf: - qcom,sdm845-dwc3 - qcom,sdx55-dwc3 - qcom,sdx65-dwc3 + - qcom,sdx75-dwc3 - qcom,sm6350-dwc3 then: properties: @@ -368,6 +370,7 @@ allOf: - qcom,sdm845-dwc3 - qcom,sdx55-dwc3 - qcom,sdx65-dwc3 + - qcom,sdx75-dwc3 - qcom,sm4250-dwc3 - qcom,sm6125-dwc3 - qcom,sm6350-dwc3 -- cgit v1.2.3 From 0e650c94a422be51b1dbe3cb4598ab247adabb29 Mon Sep 17 00:00:00 2001 From: Fabio Estevam Date: Sun, 24 Sep 2023 13:03:51 -0300 Subject: dt-bindings: usb: ci-hdrc-usb2: Allow "fsl,imx27-usb" to be passed alone imx27.dtsi describes its usb nodes as: compatible = "fsl,imx27-usb"; Adjust the bindings to allow it and avoid the following schema warning: usb@10024000: compatible: 'oneOf' conditional failed, one must be fixed: ['fsl,imx27-usb'] is too short Signed-off-by: Fabio Estevam Reviewed-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20230924160351.692867-1-festevam@gmail.com Signed-off-by: Greg Kroah-Hartman --- Documentation/devicetree/bindings/usb/ci-hdrc-usb2.yaml | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation/devicetree/bindings/usb') diff --git a/Documentation/devicetree/bindings/usb/ci-hdrc-usb2.yaml b/Documentation/devicetree/bindings/usb/ci-hdrc-usb2.yaml index 1394557517b1..cd58ab3cc143 100644 --- a/Documentation/devicetree/bindings/usb/ci-hdrc-usb2.yaml +++ b/Documentation/devicetree/bindings/usb/ci-hdrc-usb2.yaml @@ -15,6 +15,7 @@ properties: oneOf: - enum: - chipidea,usb2 + - fsl,imx27-usb - lsi,zevio-usb - nvidia,tegra20-ehci - nvidia,tegra20-udc -- cgit v1.2.3 From bb9f10ff6709e15fb935c954f1fb715ac1f970e7 Mon Sep 17 00:00:00 2001 From: Jerome Brunet Date: Mon, 2 Oct 2023 14:29:08 +0200 Subject: dt-bindings: usb: add device for Genesys Logic hub gl3510 Add gl3510 USB 3 root hub device id Acked-by: Krzysztof Kozlowski Signed-off-by: Jerome Brunet Link: https://lore.kernel.org/r/20231002122909.2338049-2-jbrunet@baylibre.com Signed-off-by: Greg Kroah-Hartman --- Documentation/devicetree/bindings/usb/genesys,gl850g.yaml | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) (limited to 'Documentation/devicetree/bindings/usb') diff --git a/Documentation/devicetree/bindings/usb/genesys,gl850g.yaml b/Documentation/devicetree/bindings/usb/genesys,gl850g.yaml index d0927f6768a4..ee08b9c3721f 100644 --- a/Documentation/devicetree/bindings/usb/genesys,gl850g.yaml +++ b/Documentation/devicetree/bindings/usb/genesys,gl850g.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/usb/genesys,gl850g.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Genesys Logic GL850G USB 2.0 hub controller +title: Genesys Logic USB hub controller maintainers: - Icenowy Zheng @@ -18,6 +18,7 @@ properties: - usb5e3,608 - usb5e3,610 - usb5e3,620 + - usb5e3,626 reg: true -- cgit v1.2.3 From af313201946a7e64f6985711136ef02f9113a8fc Mon Sep 17 00:00:00 2001 From: Fabio Estevam Date: Wed, 27 Sep 2023 09:35:10 -0300 Subject: dt-bindings: usb: gpio-sbu-mux: Add an entry for CBDTU02043 Add a compatible entry for the NXP CBDTU02043 GPIO-based mux hardware used for connecting, disconnecting and switching orientation of the SBU lines in USB Type-C applications. CBTU02043 datasheet: https://www.nxp.com/docs/en/data-sheet/CBTU02043.pdf Signed-off-by: Fabio Estevam Acked-by: Conor Dooley Link: https://lore.kernel.org/r/20230927123511.45085-1-festevam@gmail.com Signed-off-by: Greg Kroah-Hartman --- Documentation/devicetree/bindings/usb/gpio-sbu-mux.yaml | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation/devicetree/bindings/usb') diff --git a/Documentation/devicetree/bindings/usb/gpio-sbu-mux.yaml b/Documentation/devicetree/bindings/usb/gpio-sbu-mux.yaml index f196beb826d8..b61dcf8b4aad 100644 --- a/Documentation/devicetree/bindings/usb/gpio-sbu-mux.yaml +++ b/Documentation/devicetree/bindings/usb/gpio-sbu-mux.yaml @@ -19,6 +19,7 @@ properties: compatible: items: - enum: + - nxp,cbdtu02043 - onnn,fsusb43l10x - pericom,pi3usb102 - const: gpio-sbu-mux -- cgit v1.2.3 From 6060d554e89162e6d8c87e9322e26d0fe1f0dd47 Mon Sep 17 00:00:00 2001 From: Abdel Alkuor Date: Tue, 3 Oct 2023 11:58:34 -0400 Subject: dt-bindings: usb: tps6598x: Add tps25750 TPS25750 is USB TypeC PD controller which is a subset of TPS6598x. Signed-off-by: Abdel Alkuor Reviewed-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20231003155842.57313-2-alkuor@gmail.com Signed-off-by: Greg Kroah-Hartman --- .../devicetree/bindings/usb/ti,tps6598x.yaml | 81 +++++++++++++++++++++- 1 file changed, 80 insertions(+), 1 deletion(-) (limited to 'Documentation/devicetree/bindings/usb') diff --git a/Documentation/devicetree/bindings/usb/ti,tps6598x.yaml b/Documentation/devicetree/bindings/usb/ti,tps6598x.yaml index 5497a60cddbc..72ac534e6ed2 100644 --- a/Documentation/devicetree/bindings/usb/ti,tps6598x.yaml +++ b/Documentation/devicetree/bindings/usb/ti,tps6598x.yaml @@ -20,8 +20,23 @@ properties: enum: - ti,tps6598x - apple,cd321x + - ti,tps25750 + reg: - maxItems: 1 + minItems: 1 + items: + - description: main PD controller address + - description: | + I2C slave address field in PBMs input data + which is used as the device address when writing the + patch for TPS25750. + The patch address can be any value except 0x00, 0x20, + 0x21, 0x22, and 0x23 + + reg-names: + items: + - const: main + - const: patch-address wakeup-source: true @@ -32,10 +47,42 @@ properties: items: - const: irq + firmware-name: + description: | + Should contain the name of the default patch binary + file located on the firmware search path which is + used to switch the controller into APP mode. + This is used when tps25750 doesn't have an EEPROM + connected to it. + maxItems: 1 + required: - compatible - reg +allOf: + - if: + properties: + compatible: + contains: + const: ti,tps25750 + then: + properties: + reg: + maxItems: 2 + + connector: + required: + - data-role + + required: + - connector + - reg-names + else: + properties: + reg: + maxItems: 1 + additionalProperties: true examples: @@ -68,4 +115,36 @@ examples: }; }; }; + + - | + #include + i2c { + #address-cells = <1>; + #size-cells = <0>; + + typec@21 { + compatible = "ti,tps25750"; + reg = <0x21>, <0x0f>; + reg-names = "main", "patch-address"; + + interrupt-parent = <&msmgpio>; + interrupts = <100 IRQ_TYPE_LEVEL_LOW>; + interrupt-names = "irq"; + firmware-name = "tps25750.bin"; + + pinctrl-names = "default"; + pinctrl-0 = <&typec_pins>; + + typec_con0: connector { + compatible = "usb-c-connector"; + label = "USB-C"; + data-role = "dual"; + port { + typec_ep0: endpoint { + remote-endpoint = <&otg_ep>; + }; + }; + }; + }; + }; ... -- cgit v1.2.3 From 5220d8b04a840fa09434072c866d032b163419e3 Mon Sep 17 00:00:00 2001 From: Fabio Estevam Date: Mon, 16 Oct 2023 10:11:41 -0300 Subject: dt-bindings: usb: gpio-sbu-mux: Make 'mode-switch' not required On a i.MX8QXP MEK board that has an NXP CBDTU02043 mux, there is no mode-switch support, only orientation switch. Make the 'mode-switch' property a non-required one. Signed-off-by: Fabio Estevam Acked-by: Conor Dooley Link: https://lore.kernel.org/r/20231016131141.680517-1-festevam@gmail.com Signed-off-by: Greg Kroah-Hartman --- Documentation/devicetree/bindings/usb/gpio-sbu-mux.yaml | 1 - 1 file changed, 1 deletion(-) (limited to 'Documentation/devicetree/bindings/usb') diff --git a/Documentation/devicetree/bindings/usb/gpio-sbu-mux.yaml b/Documentation/devicetree/bindings/usb/gpio-sbu-mux.yaml index b61dcf8b4aad..d3b2b666ec2a 100644 --- a/Documentation/devicetree/bindings/usb/gpio-sbu-mux.yaml +++ b/Documentation/devicetree/bindings/usb/gpio-sbu-mux.yaml @@ -51,7 +51,6 @@ required: - compatible - enable-gpios - select-gpios - - mode-switch - orientation-switch - port -- cgit v1.2.3 From 4936eb7567c3e44065979e1036ba3c018dd6b9a1 Mon Sep 17 00:00:00 2001 From: Jisheng Zhang Date: Wed, 18 Oct 2023 23:04:48 +0800 Subject: dt-bindings: usb: vialab,vl817: remove reset-gpios from required list The "reset-gpios" is optional in real case, for example reset pin is is hard wired to "high". And this fact is also reflected by the devm_gpio_get_optional() calling in driver code. Signed-off-by: Jisheng Zhang Acked-by: Conor Dooley Link: https://lore.kernel.org/r/20231018150448.1980-1-jszhang@kernel.org Signed-off-by: Greg Kroah-Hartman --- Documentation/devicetree/bindings/usb/vialab,vl817.yaml | 1 - 1 file changed, 1 deletion(-) (limited to 'Documentation/devicetree/bindings/usb') diff --git a/Documentation/devicetree/bindings/usb/vialab,vl817.yaml b/Documentation/devicetree/bindings/usb/vialab,vl817.yaml index 76db9071b352..c815010ba9c2 100644 --- a/Documentation/devicetree/bindings/usb/vialab,vl817.yaml +++ b/Documentation/devicetree/bindings/usb/vialab,vl817.yaml @@ -37,7 +37,6 @@ properties: required: - compatible - reg - - reset-gpios - vdd-supply - peer-hub -- cgit v1.2.3 From ceae398f15b32ebce8db73c15f2603c3b72eca32 Mon Sep 17 00:00:00 2001 From: Tomer Maimon Date: Tue, 17 Oct 2023 22:59:02 +0300 Subject: dt-bindings: usb: ci-hdrc-usb2: add npcm750 and npcm845 compatible Add a compatible string for Nuvoton BMC NPCM750 and Nuvoton BMC NPCM845. Signed-off-by: Tomer Maimon Reviewed-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20231017195903.1665260-3-tmaimon77@gmail.com Signed-off-by: Greg Kroah-Hartman --- Documentation/devicetree/bindings/usb/ci-hdrc-usb2.yaml | 6 ++++++ 1 file changed, 6 insertions(+) (limited to 'Documentation/devicetree/bindings/usb') diff --git a/Documentation/devicetree/bindings/usb/ci-hdrc-usb2.yaml b/Documentation/devicetree/bindings/usb/ci-hdrc-usb2.yaml index cd58ab3cc143..b7e664f7395b 100644 --- a/Documentation/devicetree/bindings/usb/ci-hdrc-usb2.yaml +++ b/Documentation/devicetree/bindings/usb/ci-hdrc-usb2.yaml @@ -17,6 +17,7 @@ properties: - chipidea,usb2 - fsl,imx27-usb - lsi,zevio-usb + - nuvoton,npcm750-udc - nvidia,tegra20-ehci - nvidia,tegra20-udc - nvidia,tegra30-ehci @@ -67,6 +68,10 @@ properties: - items: - const: xlnx,zynq-usb-2.20a - const: chipidea,usb2 + - items: + - enum: + - nuvoton,npcm845-udc + - const: nuvoton,npcm750-udc reg: minItems: 1 @@ -389,6 +394,7 @@ allOf: enum: - chipidea,usb2 - lsi,zevio-usb + - nuvoton,npcm750-udc - nvidia,tegra20-udc - nvidia,tegra30-udc - nvidia,tegra114-udc -- cgit v1.2.3 From 915360a5ce96f0c8e22730b21c50dd1a1f271930 Mon Sep 17 00:00:00 2001 From: Luca Weiss Date: Fri, 20 Oct 2023 12:35:46 +0200 Subject: dt-bindings: usb: add NXP PTN36502 Type-C redriver bindings Document bindings for this Type-C USB 3.1 Gen 1 and DisplayPort v1.2 combo redriver. The PTN36502 can also run in GPIO mode where it is configured differently, without any I2C connection, but this is not supported yet. Reviewed-by: Krzysztof Kozlowski Signed-off-by: Luca Weiss Link: https://lore.kernel.org/r/20231020-ptn36502-v2-1-b37a337d463e@fairphone.com Signed-off-by: Greg Kroah-Hartman --- .../devicetree/bindings/usb/nxp,ptn36502.yaml | 94 ++++++++++++++++++++++ 1 file changed, 94 insertions(+) create mode 100644 Documentation/devicetree/bindings/usb/nxp,ptn36502.yaml (limited to 'Documentation/devicetree/bindings/usb') diff --git a/Documentation/devicetree/bindings/usb/nxp,ptn36502.yaml b/Documentation/devicetree/bindings/usb/nxp,ptn36502.yaml new file mode 100644 index 000000000000..eee548ac1abe --- /dev/null +++ b/Documentation/devicetree/bindings/usb/nxp,ptn36502.yaml @@ -0,0 +1,94 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/usb/nxp,ptn36502.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: NXP PTN36502 Type-C USB 3.1 Gen 1 and DisplayPort v1.2 combo redriver + +maintainers: + - Luca Weiss + +properties: + compatible: + enum: + - nxp,ptn36502 + + reg: + maxItems: 1 + + vdd18-supply: + description: Power supply for VDD18 pin + + retimer-switch: + description: Flag the port as possible handle of SuperSpeed signals retiming + type: boolean + + orientation-switch: + description: Flag the port as possible handler of orientation switching + type: boolean + + ports: + $ref: /schemas/graph.yaml#/properties/ports + properties: + port@0: + $ref: /schemas/graph.yaml#/properties/port + description: Super Speed (SS) Output endpoint to the Type-C connector + + port@1: + $ref: /schemas/graph.yaml#/properties/port + description: Super Speed (SS) Input endpoint from the Super-Speed PHY + + port@2: + $ref: /schemas/graph.yaml#/properties/port + description: + Sideband Use (SBU) AUX lines endpoint to the Type-C connector for the purpose of + handling altmode muxing and orientation switching. + +required: + - compatible + - reg + +additionalProperties: false + +examples: + - | + i2c { + #address-cells = <1>; + #size-cells = <0>; + + typec-mux@1a { + compatible = "nxp,ptn36502"; + reg = <0x1a>; + + vdd18-supply = <&usb_redrive_1v8>; + + retimer-switch; + orientation-switch; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + usb_con_ss: endpoint { + remote-endpoint = <&typec_con_ss>; + }; + }; + port@1 { + reg = <1>; + phy_con_ss: endpoint { + remote-endpoint = <&usb_phy_ss>; + }; + }; + port@2 { + reg = <2>; + usb_con_sbu: endpoint { + remote-endpoint = <&typec_dp_aux>; + }; + }; + }; + }; + }; +... -- cgit v1.2.3 From 98bad5bc447ec962988a48c92f7d0f8c4dc473d2 Mon Sep 17 00:00:00 2001 From: Sebastian Reichel Date: Fri, 20 Oct 2023 16:11:40 +0200 Subject: dt-bindings: usb: add rk3588 compatible to rockchip,dwc3 RK3588 has three DWC3 controllers. Two of them are fully functional in host, device and OTG mode including USB2 support. They are connected to dedicated PHYs, that also support USB-C's DisplayPort alternate mode. The third controller is connected to one of the combphy's shared with PCIe and SATA. It can only be used in host mode and does not support USB2. Compared to the other controllers this one needs some extra clocks. While adding the extra clocks required by RK3588, I noticed grf_clk is not available on RK3568, so I disallowed it for that platform. Signed-off-by: Sebastian Reichel Reviewed-by: Conor Dooley Link: https://lore.kernel.org/r/20231020150022.48725-2-sebastian.reichel@collabora.com Signed-off-by: Greg Kroah-Hartman --- .../devicetree/bindings/usb/rockchip,dwc3.yaml | 60 ++++++++++++++++++++-- 1 file changed, 55 insertions(+), 5 deletions(-) (limited to 'Documentation/devicetree/bindings/usb') diff --git a/Documentation/devicetree/bindings/usb/rockchip,dwc3.yaml b/Documentation/devicetree/bindings/usb/rockchip,dwc3.yaml index 291844c8f3e1..264c2178d61d 100644 --- a/Documentation/devicetree/bindings/usb/rockchip,dwc3.yaml +++ b/Documentation/devicetree/bindings/usb/rockchip,dwc3.yaml @@ -20,9 +20,6 @@ description: Type-C PHY Documentation/devicetree/bindings/phy/phy-rockchip-typec.txt -allOf: - - $ref: snps,dwc3.yaml# - select: properties: compatible: @@ -30,6 +27,7 @@ select: enum: - rockchip,rk3328-dwc3 - rockchip,rk3568-dwc3 + - rockchip,rk3588-dwc3 required: - compatible @@ -39,6 +37,7 @@ properties: - enum: - rockchip,rk3328-dwc3 - rockchip,rk3568-dwc3 + - rockchip,rk3588-dwc3 - const: snps,dwc3 reg: @@ -58,7 +57,9 @@ properties: Master/Core clock, must to be >= 62.5 MHz for SS operation and >= 30MHz for HS operation - description: - Controller grf clock + Controller grf clock OR UTMI clock + - description: + PIPE clock clock-names: minItems: 3 @@ -66,7 +67,10 @@ properties: - const: ref_clk - const: suspend_clk - const: bus_clk - - const: grf_clk + - enum: + - grf_clk + - utmi + - const: pipe power-domains: maxItems: 1 @@ -86,6 +90,52 @@ required: - clocks - clock-names +allOf: + - $ref: snps,dwc3.yaml# + - if: + properties: + compatible: + contains: + const: rockchip,rk3328-dwc3 + then: + properties: + clocks: + minItems: 3 + maxItems: 4 + clock-names: + minItems: 3 + items: + - const: ref_clk + - const: suspend_clk + - const: bus_clk + - const: grf_clk + - if: + properties: + compatible: + contains: + const: rockchip,rk3568-dwc3 + then: + properties: + clocks: + maxItems: 3 + clock-names: + maxItems: 3 + - if: + properties: + compatible: + contains: + const: rockchip,rk3588-dwc3 + then: + properties: + clock-names: + minItems: 3 + items: + - const: ref_clk + - const: suspend_clk + - const: bus_clk + - const: utmi + - const: pipe + examples: - | #include -- cgit v1.2.3 From d026fc7b73a58ea3b2fe567674e71cccd90f6a84 Mon Sep 17 00:00:00 2001 From: Greg Kroah-Hartman Date: Tue, 24 Oct 2023 11:50:57 +0200 Subject: Revert "dt-bindings: usb: qcom,dwc3: Add bindings for SC8280 Multiport" This reverts commit ca58c4ae75b65e1d78408b134f129ea91e9595b8. The patches for the features that these bindings described are still under active development, so odds are these bindings will also have to be changed in the future. As no in-tree code requires these bindings at the moment, revert them. Reported-by: Johan Hovold Link: https://lore.kernel.org/r/ZTeObdjSSok0tttg@hovoldconsulting.com Cc: Krishna Kurapati Cc: Krzysztof Kozlowski Signed-off-by: Greg Kroah-Hartman --- .../devicetree/bindings/usb/qcom,dwc3.yaml | 29 ---------------------- 1 file changed, 29 deletions(-) (limited to 'Documentation/devicetree/bindings/usb') diff --git a/Documentation/devicetree/bindings/usb/qcom,dwc3.yaml b/Documentation/devicetree/bindings/usb/qcom,dwc3.yaml index 51a5581ce692..e889158ca205 100644 --- a/Documentation/devicetree/bindings/usb/qcom,dwc3.yaml +++ b/Documentation/devicetree/bindings/usb/qcom,dwc3.yaml @@ -30,7 +30,6 @@ properties: - qcom,sc7180-dwc3 - qcom,sc7280-dwc3 - qcom,sc8280xp-dwc3 - - qcom,sc8280xp-dwc3-mp - qcom,sdm660-dwc3 - qcom,sdm670-dwc3 - qcom,sdm845-dwc3 @@ -264,7 +263,6 @@ allOf: contains: enum: - qcom,sc8280xp-dwc3 - - qcom,sc8280xp-dwc3-mp then: properties: clocks: @@ -488,33 +486,6 @@ allOf: - const: dm_hs_phy_irq - const: ss_phy_irq - - if: - properties: - compatible: - contains: - enum: - - qcom,sc8280xp-dwc3-mp - then: - properties: - interrupts: - maxItems: 14 - interrupt-names: - items: - - const: pwr_event_1 - - const: pwr_event_2 - - const: pwr_event_3 - - const: pwr_event_4 - - const: dp_hs_phy_1 - - const: dm_hs_phy_1 - - const: dp_hs_phy_2 - - const: dm_hs_phy_2 - - const: dp_hs_phy_3 - - const: dm_hs_phy_3 - - const: dp_hs_phy_4 - - const: dm_hs_phy_4 - - const: ss_phy_1 - - const: ss_phy_2 - additionalProperties: false examples: -- cgit v1.2.3 From ec098970364234411f39cd6821e6f95937b4070c Mon Sep 17 00:00:00 2001 From: Greg Kroah-Hartman Date: Tue, 24 Oct 2023 11:51:04 +0200 Subject: Revert "dt-bindings: usb: Add bindings for multiport properties on DWC3 controller" This reverts commit eb3f1d9e42b1499152442e97b51bc1bcfee29d71. The patches for the features that these bindings described are still under active development, so odds are these bindings will also have to be changed in the future. As no in-tree code requires these bindings at the moment, revert them. Reported-by: Johan Hovold Link: https://lore.kernel.org/r/ZTeObdjSSok0tttg@hovoldconsulting.com Cc: Bjorn Andersson Cc: Krishna Kurapati Signed-off-by: Greg Kroah-Hartman --- Documentation/devicetree/bindings/usb/snps,dwc3.yaml | 13 ++++++------- 1 file changed, 6 insertions(+), 7 deletions(-) (limited to 'Documentation/devicetree/bindings/usb') diff --git a/Documentation/devicetree/bindings/usb/snps,dwc3.yaml b/Documentation/devicetree/bindings/usb/snps,dwc3.yaml index d81c2e849ca9..ee5af4b381b1 100644 --- a/Documentation/devicetree/bindings/usb/snps,dwc3.yaml +++ b/Documentation/devicetree/bindings/usb/snps,dwc3.yaml @@ -85,16 +85,15 @@ properties: phys: minItems: 1 - maxItems: 8 + maxItems: 2 phy-names: minItems: 1 - maxItems: 8 - oneOf: - - items: - enum: [ usb2-phy, usb3-phy ] - - items: - pattern: "^usb[23]-port[0-3]$" + maxItems: 2 + items: + enum: + - usb2-phy + - usb3-phy power-domains: description: -- cgit v1.2.3 From fad89aa14c35f469ea7d3bf49ee1d5840eea0375 Mon Sep 17 00:00:00 2001 From: Luca Weiss Date: Fri, 20 Oct 2023 11:33:18 +0200 Subject: dt-bindings: usb: fsa4480: Add data-lanes property to endpoint Allow specifying data-lanes to reverse the muxing orientation between AUX+/- and SBU1/2 where necessary by the hardware design. In the mux there's a switch that needs to be controlled from the OS, and it either connects AUX+ -> SBU1 and AUX- -> SBU2, or the reverse: AUX+ -> SBU2 and AUX- -> SBU1, depending on the orientation of how the USB-C connector is plugged in. With this data-lanes property we can now specify that AUX+ and AUX- connections are swapped between the SoC and the mux, therefore the OS needs to consider this and reverse the direction of this switch in the mux. _______ _______ | | | |-- HP --| | |-- MIC --| |or SoC | | MUX |-- SBU1 ---> To the USB-C Codec |-- AUX+ --| |-- SBU2 ---> connected |-- AUX- --| | ______| |_____| (thanks to Neil Armstrong for this ASCII art) Signed-off-by: Luca Weiss Reviewed-by: Rob Herring Link: https://lore.kernel.org/r/20231020-fsa4480-swap-v2-1-9a7f9bb59873@fairphone.com Signed-off-by: Greg Kroah-Hartman --- .../devicetree/bindings/usb/fcs,fsa4480.yaml | 29 +++++++++++++++++++++- 1 file changed, 28 insertions(+), 1 deletion(-) (limited to 'Documentation/devicetree/bindings/usb') diff --git a/Documentation/devicetree/bindings/usb/fcs,fsa4480.yaml b/Documentation/devicetree/bindings/usb/fcs,fsa4480.yaml index f6e7a5c1ff0b..86f6d633c2fb 100644 --- a/Documentation/devicetree/bindings/usb/fcs,fsa4480.yaml +++ b/Documentation/devicetree/bindings/usb/fcs,fsa4480.yaml @@ -32,10 +32,37 @@ properties: type: boolean port: - $ref: /schemas/graph.yaml#/properties/port + $ref: /schemas/graph.yaml#/$defs/port-base description: A port node to link the FSA4480 to a TypeC controller for the purpose of handling altmode muxing and orientation switching. + unevaluatedProperties: false + + properties: + endpoint: + $ref: /schemas/graph.yaml#/$defs/endpoint-base + unevaluatedProperties: false + + properties: + data-lanes: + $ref: /schemas/types.yaml#/definitions/uint32-array + description: + Specifies how the AUX+/- lines are connected to SBU1/2. + oneOf: + - items: + - const: 0 + - const: 1 + description: | + Default AUX/SBU layout + - AUX+ connected to SBU2 + - AUX- connected to SBU1 + - items: + - const: 1 + - const: 0 + description: | + Swapped AUX/SBU layout + - AUX+ connected to SBU1 + - AUX- connected to SBU2 required: - compatible -- cgit v1.2.3 From c3097719e438ab6d07b8b20b5575f985ab07b5a5 Mon Sep 17 00:00:00 2001 From: Luca Weiss Date: Fri, 20 Oct 2023 11:33:20 +0200 Subject: dt-bindings: usb: fsa4480: Add compatible for OCP96011 The Orient-Chip OCP96011 is generally compatible with the FSA4480, add a compatible for it with the fallback on fsa4480. However the AUX/SBU connections are expected to be swapped compared to FSA4480, so document this in the data-lanes description. Signed-off-by: Luca Weiss Reviewed-by: Rob Herring Link: https://lore.kernel.org/r/20231020-fsa4480-swap-v2-3-9a7f9bb59873@fairphone.com Signed-off-by: Greg Kroah-Hartman --- Documentation/devicetree/bindings/usb/fcs,fsa4480.yaml | 18 ++++++++++++++---- 1 file changed, 14 insertions(+), 4 deletions(-) (limited to 'Documentation/devicetree/bindings/usb') diff --git a/Documentation/devicetree/bindings/usb/fcs,fsa4480.yaml b/Documentation/devicetree/bindings/usb/fcs,fsa4480.yaml index 86f6d633c2fb..f9410eb76a62 100644 --- a/Documentation/devicetree/bindings/usb/fcs,fsa4480.yaml +++ b/Documentation/devicetree/bindings/usb/fcs,fsa4480.yaml @@ -11,8 +11,12 @@ maintainers: properties: compatible: - enum: - - fcs,fsa4480 + oneOf: + - const: fcs,fsa4480 + - items: + - enum: + - ocs,ocp96011 + - const: fcs,fsa4480 reg: maxItems: 1 @@ -53,16 +57,22 @@ properties: - const: 0 - const: 1 description: | - Default AUX/SBU layout + Default AUX/SBU layout (FSA4480) - AUX+ connected to SBU2 - AUX- connected to SBU1 + Default AUX/SBU layout (OCP96011) + - AUX+ connected to SBU1 + - AUX- connected to SBU2 - items: - const: 1 - const: 0 description: | - Swapped AUX/SBU layout + Swapped AUX/SBU layout (FSA4480) - AUX+ connected to SBU1 - AUX- connected to SBU2 + Swapped AUX/SBU layout (OCP96011) + - AUX+ connected to SBU2 + - AUX- connected to SBU1 required: - compatible -- cgit v1.2.3