From b1992c3772e69a6fd0e3fc81cd4d2820c8b6eca0 Mon Sep 17 00:00:00 2001 From: Masahiro Yamada Date: Sat, 27 Apr 2024 23:55:02 +0900 Subject: kbuild: use $(src) instead of $(srctree)/$(src) for source directory Kbuild conventionally uses $(obj)/ for generated files, and $(src)/ for checked-in source files. It is merely a convention without any functional difference. In fact, $(obj) and $(src) are exactly the same, as defined in scripts/Makefile.build: src := $(obj) When the kernel is built in a separate output directory, $(src) does not accurately reflect the source directory location. While Kbuild resolves this discrepancy by specifying VPATH=$(srctree) to search for source files, it does not cover all cases. For example, when adding a header search path for local headers, -I$(srctree)/$(src) is typically passed to the compiler. This introduces inconsistency between upstream and downstream Makefiles because $(src) is used instead of $(srctree)/$(src) for the latter. To address this inconsistency, this commit changes the semantics of $(src) so that it always points to the directory in the source tree. Going forward, the variables used in Makefiles will have the following meanings: $(obj) - directory in the object tree $(src) - directory in the source tree (changed by this commit) $(objtree) - the top of the kernel object tree $(srctree) - the top of the kernel source tree Consequently, $(srctree)/$(src) in upstream Makefiles need to be replaced with $(src). Signed-off-by: Masahiro Yamada Reviewed-by: Nicolas Schier --- Documentation/kbuild/makefiles.rst | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) (limited to 'Documentation/kbuild/makefiles.rst') diff --git a/Documentation/kbuild/makefiles.rst b/Documentation/kbuild/makefiles.rst index ad118b7a1806..991ce6081e35 100644 --- a/Documentation/kbuild/makefiles.rst +++ b/Documentation/kbuild/makefiles.rst @@ -346,7 +346,7 @@ ccflags-y, asflags-y and ldflags-y Example:: #arch/cris/boot/compressed/Makefile - ldflags-y += -T $(srctree)/$(src)/decompress_$(arch-y).lds + ldflags-y += -T $(src)/decompress_$(arch-y).lds subdir-ccflags-y, subdir-asflags-y The two flags listed above are similar to ccflags-y and asflags-y. @@ -426,14 +426,14 @@ path to prerequisite files and target files. Two variables are used when defining custom rules: $(src) - $(src) is a relative path which points to the directory - where the Makefile is located. Always use $(src) when + $(src) is the directory where the Makefile is located. Always use $(src) when referring to files located in the src tree. $(obj) - $(obj) is a relative path which points to the directory - where the target is saved. Always use $(obj) when - referring to generated files. + $(obj) is the directory where the target is saved. Always use $(obj) when + referring to generated files. Use $(obj) for pattern rules that need to work + for both generated files and real sources (VPATH will help to find the + prerequisites not only in the object tree but also in the source tree). Example:: -- cgit v1.2.3