From 6a79162fe5d5e0eb55bc48e99450982b0daf0a0f Mon Sep 17 00:00:00 2001 From: "bilbao@vt.edu" Date: Tue, 27 Apr 2021 13:28:29 -0400 Subject: docs: Fix typo in Documentation/x86/x86_64/5level-paging.rst fix two typos in the documentation (Documentation/x86/x86_64/5level-paging.rst), changing 'paing' for 'paging' and using the right verbal form for plural on 'some vendors offer'. Signed-off-by: Carlos Bilbao Link: https://lore.kernel.org/r/2599991.mvXUDI8C0e@iron-maiden Signed-off-by: Jonathan Corbet --- Documentation/x86/x86_64/5level-paging.rst | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'Documentation/x86') diff --git a/Documentation/x86/x86_64/5level-paging.rst b/Documentation/x86/x86_64/5level-paging.rst index 44856417e6a5..b792bbdc0b01 100644 --- a/Documentation/x86/x86_64/5level-paging.rst +++ b/Documentation/x86/x86_64/5level-paging.rst @@ -6,9 +6,9 @@ Overview ======== -Original x86-64 was limited by 4-level paing to 256 TiB of virtual address +Original x86-64 was limited by 4-level paging to 256 TiB of virtual address space and 64 TiB of physical address space. We are already bumping into -this limit: some vendors offers servers with 64 TiB of memory today. +this limit: some vendors offer servers with 64 TiB of memory today. To overcome the limitation upcoming hardware will introduce support for 5-level paging. It is a straight-forward extension of the current page -- cgit v1.2.3